main.c 7.5 KB

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  1. /**
  2. * Copyright (c) 2017 - 2019, Nordic Semiconductor ASA
  3. *
  4. * All rights reserved.
  5. *
  6. * Redistribution and use in source and binary forms, with or without modification,
  7. * are permitted provided that the following conditions are met:
  8. *
  9. * 1. Redistributions of source code must retain the above copyright notice, this
  10. * list of conditions and the following disclaimer.
  11. *
  12. * 2. Redistributions in binary form, except as embedded into a Nordic
  13. * Semiconductor ASA integrated circuit in a product or a software update for
  14. * such product, must reproduce the above copyright notice, this list of
  15. * conditions and the following disclaimer in the documentation and/or other
  16. * materials provided with the distribution.
  17. *
  18. * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
  19. * contributors may be used to endorse or promote products derived from this
  20. * software without specific prior written permission.
  21. *
  22. * 4. This software, with or without modification, must only be used with a
  23. * Nordic Semiconductor ASA integrated circuit.
  24. *
  25. * 5. Any software provided in binary form under this license must not be reverse
  26. * engineered, decompiled, modified and/or disassembled.
  27. *
  28. * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
  29. * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  30. * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
  31. * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
  32. * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  33. * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
  34. * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  35. * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  36. * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
  37. * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  38. *
  39. */
  40. #include "ssi_pal_types.h"
  41. #include "ssi_pal_mem.h"
  42. #include "sns_silib.h"
  43. #include "integration_test_plat_defs.h"
  44. #include "integration_test_ssi_data.h"
  45. #include "integration_test_ssi_defs.h"
  46. #ifdef DX_LINUX_PLATFORM /*for linux platform only !!*/
  47. #include <pthread.h>
  48. #endif
  49. /*HASH test data vectors*/
  50. extern hashDataStuct hashVectors[];
  51. /*RNG Global variables*/
  52. extern CRYS_RND_State_t* rndState_ptr;
  53. extern CRYS_RND_WorkBuff_t* rndWorkBuff_ptr;
  54. int hash_tests(void)
  55. {
  56. uint32_t ret = 0;
  57. int test_index;
  58. OperationType_t operation_index;
  59. uint8_t dataInBuff[MAX_TEST_DATA_SIZE];
  60. CRYS_HASH_Result_t hashOutBuff={0};
  61. CRYS_HASHUserContext_t ContextID;
  62. /*Run all HASH tests*/
  63. for(operation_index = INTEGRATED_OPERATION; operation_index <= NON_INTEGRATED_OPERATION; operation_index++){
  64. for (test_index = 0; test_index < HASH_TESTS_NUMBER; test_index++)
  65. {
  66. SaSi_PalMemSetZero(dataInBuff,MAX_TEST_DATA_SIZE);
  67. SaSi_PalMemCopy(dataInBuff, hashVectors[test_index].hashTest_InputData, hashVectors[test_index].hashTest_InputDataSize);
  68. INTEG_TEST_PRINT("\n HASH Test number 0x%x Parameters : \n-----%s-----\n",test_index,(uint32_t)hashVectors[test_index].hashTest_Name);
  69. if (operation_index == INTEGRATED_OPERATION){ /*Perform Inegrated operation*/
  70. INTEG_TEST_PRINT("Integrated operation ");
  71. ret = CRYS_HASH(hashVectors[test_index].hashTest_TST_OperationMode,
  72. dataInBuff,
  73. hashVectors[test_index].hashTest_InputDataSize,
  74. hashOutBuff);
  75. if (ret != SA_SILIB_RET_OK){
  76. INTEG_TEST_PRINT(" CRYS_HASH failed with 0x%x \n",ret);
  77. goto end;
  78. }
  79. } else { /*Perform NonInegrated operation*/
  80. INTEG_TEST_PRINT("\n Non integrated operation ");
  81. ret = CRYS_HASH_Init(&ContextID,
  82. hashVectors[test_index].hashTest_TST_OperationMode);
  83. if (ret != SA_SILIB_RET_OK){
  84. INTEG_TEST_PRINT(" CRYS_HASH_Init failed with 0x%x \n",ret);
  85. goto end;
  86. }
  87. ret = CRYS_HASH_Update(&ContextID,
  88. dataInBuff,
  89. hashVectors[test_index].hashTest_InputDataSize);
  90. if (ret != SA_SILIB_RET_OK){
  91. INTEG_TEST_PRINT(" CRYS_HASH_Update failed with 0x%x \n",ret);
  92. goto end;
  93. }
  94. ret = CRYS_HASH_Finish(&ContextID ,
  95. hashOutBuff);
  96. if (ret != SA_SILIB_RET_OK){
  97. INTEG_TEST_PRINT(" CRYS_HASH_Finish failed with 0x%x \n",ret);
  98. goto end;
  99. }
  100. }
  101. /*Compare HASH output with expected data*/
  102. ret = SaSi_PalMemCmp(hashOutBuff,hashVectors[test_index].hashTest_ExpOutData,hashVectors[test_index].hashTest_ExpOutDataSize);
  103. if (ret != SA_SILIB_RET_OK){
  104. INTEG_TEST_PRINT(" SaSi_PalMemCmp failed \n");
  105. goto end;
  106. }
  107. INTEG_TEST_PRINT("\n ======= Passed =============\n");
  108. }
  109. }
  110. end:
  111. return ret;
  112. }
  113. #ifdef DX_LINUX_PLATFORM /*for linux platform only -> we need to use contiguous memory for stack !!*/
  114. int hash_wrap_tests(void){
  115. uint32_t rc = 0;
  116. pthread_t threadId;
  117. pthread_attr_t threadAttr;
  118. int threadRc;
  119. void *threadRet;
  120. int num = 6;
  121. threadRc = pthread_attr_init(&threadAttr);
  122. if (threadRc != 0) {
  123. INTEG_TEST_PRINT("pthread_attr_init failed\n");
  124. return -1;
  125. }
  126. threadRc = pthread_attr_setstack(&threadAttr, g_test_stack_base_addr, PTHREAD_STACK_SIZE);
  127. if (threadRc != 0) {
  128. INTEG_TEST_PRINT("pthread_attr_setstack failed\n");
  129. return -1;
  130. }
  131. /* Create independent thread which run with */
  132. threadRc = pthread_create( &threadId, &threadAttr, (void *)hash_tests, &num);
  133. if (threadRc != 0) {
  134. INTEG_TEST_PRINT( "pthread_create failed\n");
  135. return -1;
  136. }
  137. /* Wait till thread is complete before main continues */
  138. threadRc = pthread_join( threadId, &threadRet);
  139. if (threadRc != 0) {
  140. INTEG_TEST_PRINT( "pthread_join failed\n");
  141. return -1;
  142. }
  143. if (threadRet != NULL)
  144. {
  145. INTEG_TEST_PRINT("pthread_join retval is %x\n",(size_t)threadRet);
  146. }
  147. threadRc = pthread_attr_destroy(&threadAttr);
  148. if (threadRc != 0) {
  149. INTEG_TEST_PRINT("pthread_attr_destroy failed\n");
  150. }
  151. return (rc + (uint32_t)threadRet);
  152. }
  153. #endif
  154. int main(void)
  155. {
  156. int ret = 0;
  157. /*Perform memory mapping*/
  158. ret = integration_tests_setup();
  159. if (ret != 0)
  160. {
  161. INTEG_TEST_PRINT("integration_tests_setup failed\n");
  162. return ret;
  163. }
  164. /*Init SaSi library*/
  165. ret = SaSi_LibInit();
  166. if (ret != SA_SILIB_RET_OK) {
  167. INTEG_TEST_PRINT("Failed SaSi_LibInit - ret = 0x%x\n", ret);
  168. goto exit_1;
  169. }
  170. ret = CRYS_RndInit(rndState_ptr, rndWorkBuff_ptr);
  171. if (ret != SA_SILIB_RET_OK) {
  172. INTEG_TEST_PRINT("Failed CRYS_RndInit - ret = 0x%x\n", ret);
  173. goto exit_1;
  174. }
  175. /*Call hash test*/
  176. #ifdef DX_LINUX_PLATFORM
  177. ret = hash_wrap_tests(); /*Call wrap function to create thread and to define stack's address to use contiguous memory*/
  178. #else
  179. ret = hash_tests();
  180. #endif
  181. if (ret != SA_SILIB_RET_OK) {
  182. INTEG_TEST_PRINT("Failure in hash_tests,ret = 0x%x\n", ret);
  183. goto exit_0;
  184. }
  185. INTEG_TEST_PRINT("All tests passed \n");
  186. exit_0:
  187. /*Finish SaSi library*/
  188. SaSi_LibFini();
  189. ret = CRYS_RND_UnInstantiation(rndState_ptr);
  190. if (ret) {
  191. INTEG_TEST_PRINT("Failure in CRYS_RND_UnInstantiation,ret = 0x%x\n", ret);
  192. }
  193. exit_1:
  194. integration_tests_clear();
  195. return ret;
  196. }