main.c 9.0 KB

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  1. /**
  2. * Copyright (c) 2017 - 2019, Nordic Semiconductor ASA
  3. *
  4. * All rights reserved.
  5. *
  6. * Redistribution and use in source and binary forms, with or without modification,
  7. * are permitted provided that the following conditions are met:
  8. *
  9. * 1. Redistributions of source code must retain the above copyright notice, this
  10. * list of conditions and the following disclaimer.
  11. *
  12. * 2. Redistributions in binary form, except as embedded into a Nordic
  13. * Semiconductor ASA integrated circuit in a product or a software update for
  14. * such product, must reproduce the above copyright notice, this list of
  15. * conditions and the following disclaimer in the documentation and/or other
  16. * materials provided with the distribution.
  17. *
  18. * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
  19. * contributors may be used to endorse or promote products derived from this
  20. * software without specific prior written permission.
  21. *
  22. * 4. This software, with or without modification, must only be used with a
  23. * Nordic Semiconductor ASA integrated circuit.
  24. *
  25. * 5. Any software provided in binary form under this license must not be reverse
  26. * engineered, decompiled, modified and/or disassembled.
  27. *
  28. * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
  29. * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  30. * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
  31. * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
  32. * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  33. * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
  34. * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  35. * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  36. * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
  37. * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  38. *
  39. */
  40. #include "ssi_pal_types.h"
  41. #include "ssi_pal_mem.h"
  42. #include "sns_silib.h"
  43. #include "crys_rnd_error.h"
  44. #include "integration_test_plat_defs.h"
  45. #include "integration_test_ssi_data.h"
  46. #include "integration_test_ssi_defs.h"
  47. /*RND test data vector*/
  48. extern rndDataStuct rndVectors[];
  49. /*RND global variables*/
  50. extern CRYS_RND_State_t* rndState_ptr;
  51. extern CRYS_RND_WorkBuff_t* rndWorkBuff_ptr;
  52. /*rnd_test - performs basic integration test for RND module*/
  53. int rnd_tests(void)
  54. {
  55. uint32_t ret = 0/*,MaxVectorSize = 0*/;
  56. int test_index = 0;
  57. /*Set additional input for rng seed*/
  58. ret = CRYS_RND_AddAdditionalInput(rndState_ptr,
  59. rndVectors[test_index].rndTest_AddInputData,
  60. rndVectors[test_index].rndTest_AddInputSize);
  61. if (ret != SA_SILIB_RET_OK){
  62. INTEG_TEST_PRINT("\n CRYS_RND_AddAdditionalInput failed with 0x%x \n",ret);
  63. return ret;
  64. }
  65. INTEG_TEST_PRINT("\n CRYS_RND_AddAdditionalInput passed\n");
  66. /*Reseed rnd using added input (new seed will be generated using additional input)*/
  67. ret = CRYS_RND_Reseeding (rndState_ptr,
  68. rndWorkBuff_ptr);
  69. if (ret != SA_SILIB_RET_OK){
  70. INTEG_TEST_PRINT("\n CRYS_RND_Reseeding failed with 0x%x \n",ret);
  71. return ret;
  72. }
  73. INTEG_TEST_PRINT("\n CRYS_RND_Reseeding passed\n");
  74. /*Generate random vector 1*/
  75. ret = CRYS_RND_GenerateVector(rndState_ptr,
  76. rndVectors[test_index].rndTest_RandomVectorSize,
  77. rndVectors[test_index].rndTest_RandomVectorData1);
  78. if (ret != SA_SILIB_RET_OK){
  79. INTEG_TEST_PRINT("\n CRYS_RND_GenerateVector for vector 1 failed with 0x%x \n",ret);
  80. return ret;
  81. }
  82. INTEG_TEST_PRINT("\n CRYS_RND_GenerateVector for first vector passed\n");
  83. /*Generate rnadom vector 2*/
  84. ret = CRYS_RND_GenerateVector(rndState_ptr,
  85. rndVectors[test_index].rndTest_RandomVectorSize,
  86. rndVectors[test_index].rndTest_RandomVectorData2);
  87. if (ret != SA_SILIB_RET_OK){
  88. INTEG_TEST_PRINT("\n CRYS_RND_GenerateVector for vector 2 failed with 0x%x \n",ret);
  89. return ret;
  90. }
  91. INTEG_TEST_PRINT("\n CRYS_RND_GenerateVector for second vector passed\n");
  92. /*Compare two generated vectors - should not be the same value*/
  93. ret = SaSi_PalMemCmp(rndVectors[test_index].rndTest_RandomVectorData1,
  94. rndVectors[test_index].rndTest_RandomVectorData2,
  95. rndVectors[test_index].rndTest_RandomVectorSize);
  96. if (ret == SA_SILIB_RET_OK){
  97. INTEG_TEST_PRINT("\n Two random vectors should not are the same \n");
  98. return ret;
  99. }
  100. INTEG_TEST_PRINT("\n Two generated vectors are different as expected\n");
  101. /*Generate random vector in range when max value is NULL*/
  102. ret = CRYS_RND_GenerateVectorInRange(rndState_ptr, CRYS_RND_GenerateVector,
  103. rndVectors[test_index].rndTest_RandomVectorInRangeSize1,
  104. NULL,
  105. rndVectors[test_index].rndTest_RandomVectorInRangeData);
  106. if (ret != SA_SILIB_RET_OK){
  107. INTEG_TEST_PRINT("\n CRYS_RND_GenerateVectorInRange for vector with fixed size failed with 0x%x \n",ret);
  108. return ret;
  109. }
  110. INTEG_TEST_PRINT("\n CRYS_RND_GenerateVectorInRange 1 passed\n");
  111. /*Generate random vector in range with max vector */
  112. ret = CRYS_RND_GenerateVectorInRange(rndState_ptr, CRYS_RND_GenerateVector,
  113. rndVectors[test_index].rndTest_RandomVectorInRangeSize2,
  114. rndVectors[test_index].rndTest_MaxVectorInRange2,
  115. rndVectors[test_index].rndTest_RandomVectorInRangeData2);
  116. if (ret != SA_SILIB_RET_OK){
  117. INTEG_TEST_PRINT("\n CRYS_RND_GenerateVectorInRange failed with 0x%x \n",ret);
  118. return ret;
  119. }
  120. INTEG_TEST_PRINT("\n CRYS_RND_GenerateVectorInRange 2 passed\n");
  121. /*Perform UnInstantiation*/
  122. ret = CRYS_RND_UnInstantiation(rndState_ptr);
  123. if (ret != SA_SILIB_RET_OK){
  124. INTEG_TEST_PRINT("\n CRYS_RND_UnInstantiation failed with 0x%x \n",ret);
  125. return ret;
  126. }
  127. INTEG_TEST_PRINT("\n CRYS_RND_UnInstantiation passed\n");
  128. /*Try to create random vector without instantiation - should fail*/
  129. ret = CRYS_RND_GenerateVector(rndState_ptr,
  130. rndVectors[test_index].rndTest_RandomVectorSize,
  131. rndVectors[test_index].rndTest_RandomVectorData2);
  132. if (ret != CRYS_RND_STATE_VALIDATION_TAG_ERROR){
  133. INTEG_TEST_PRINT("\n CRYS_RND_GenerateVector returned wrong error 0x%x,\n CRYS_RND_STATE_VALIDATION_TAG_ERROR should be returned\n",ret);
  134. return ret;
  135. }
  136. INTEG_TEST_PRINT("\n CRYS_RND_GenerateVector failed as expected\n");
  137. /*Set additional input for RND seed*/
  138. ret = CRYS_RND_AddAdditionalInput(rndState_ptr,
  139. rndVectors[test_index].rndTest_AddInputData,
  140. rndVectors[test_index].rndTest_AddInputSize);
  141. if (ret != SA_SILIB_RET_OK){
  142. INTEG_TEST_PRINT("\n CRYS_RND_AddAdditionalInput failed with 0x%x \n",ret);
  143. return ret;
  144. }
  145. INTEG_TEST_PRINT("\n CRYS_RND_AddAdditionalInput passed\n");
  146. /*Perform instantiation for new seed*/
  147. ret = CRYS_RND_Instantiation(rndState_ptr,
  148. rndWorkBuff_ptr);
  149. if (ret != SA_SILIB_RET_OK){
  150. INTEG_TEST_PRINT("\n CRYS_RND_Instantiation failed with 0x%x \n",ret);
  151. return ret;
  152. }
  153. INTEG_TEST_PRINT("\n CRYS_RND_Instantiation passed\n");
  154. /*Try to create two vectors and check that the vectors are different*/
  155. ret = CRYS_RND_GenerateVector(rndState_ptr,
  156. rndVectors[test_index].rndTest_RandomVectorSize,
  157. rndVectors[test_index].rndTest_RandomVectorData1);
  158. if (ret != SA_SILIB_RET_OK){
  159. INTEG_TEST_PRINT("\n CRYS_RND_GenerateVector for vector 1 failed with 0x%x \n",ret);
  160. return ret;
  161. }
  162. INTEG_TEST_PRINT("\n CRYS_RND_GenerateVector 1 passed\n");
  163. ret = CRYS_RND_GenerateVector(rndState_ptr,
  164. rndVectors[test_index].rndTest_RandomVectorSize,
  165. rndVectors[test_index].rndTest_RandomVectorData2);
  166. if (ret != SA_SILIB_RET_OK){
  167. INTEG_TEST_PRINT(" CRYS_RND_GenerateVector for vector 2 failed with 0x%x \n",ret);
  168. return ret;
  169. }
  170. INTEG_TEST_PRINT("\n CRYS_RND_GenerateVector 2 passed\n");
  171. ret = SaSi_PalMemCmp(rndVectors[test_index].rndTest_RandomVectorData1,
  172. rndVectors[test_index].rndTest_RandomVectorData2,
  173. rndVectors[test_index].rndTest_RandomVectorSize);
  174. if (ret == SA_SILIB_RET_OK){
  175. INTEG_TEST_PRINT(" Two random vectors should not are the same \n");
  176. return ret;
  177. }
  178. INTEG_TEST_PRINT("\n Compare passed\n");
  179. INTEG_TEST_PRINT("\n All RND tests passed\n");
  180. INTEG_TEST_PRINT("\n==========================\n");
  181. ret = SA_SILIB_RET_OK;
  182. return ret;
  183. }
  184. int main(void)
  185. {
  186. int ret = 0;
  187. /*Perform memory mapping*/
  188. ret = integration_tests_setup();
  189. if (ret != 0)
  190. {
  191. INTEG_TEST_PRINT("integration_tests_setup failed\n");
  192. return ret;
  193. }
  194. /*Init SaSi library*/
  195. ret = SaSi_LibInit();
  196. if (ret != SA_SILIB_RET_OK) {
  197. INTEG_TEST_PRINT("Failed SaSi_LibInit - ret = 0x%x\n", ret);
  198. goto exit_1;
  199. }
  200. ret = CRYS_RndInit(rndState_ptr, rndWorkBuff_ptr);
  201. if (ret != SA_SILIB_RET_OK) {
  202. INTEG_TEST_PRINT("Failed CRYS_RndInit - ret = 0x%x\n", ret);
  203. goto exit_1;
  204. }
  205. /*Call ecc test*/
  206. ret = rnd_tests();
  207. if (ret != SA_SILIB_RET_OK) {
  208. INTEG_TEST_PRINT("Failure in rnd_test,ret = 0x%x\n", ret);
  209. goto exit_0;
  210. }
  211. INTEG_TEST_PRINT("All tests passed \n");
  212. exit_0:
  213. /*Finish SaSi library*/
  214. SaSi_LibFini();
  215. ret = CRYS_RND_UnInstantiation(rndState_ptr);
  216. if (ret) {
  217. INTEG_TEST_PRINT("Failure in CRYS_RND_UnInstantiation,ret = 0x%x\n", ret);
  218. }
  219. exit_1:
  220. /*Unmap memory*/
  221. integration_tests_clear();
  222. return ret;
  223. }