nrf_ppi.h 19 KB

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  1. /**
  2. * Copyright (c) 2015 - 2020, Nordic Semiconductor ASA
  3. *
  4. * All rights reserved.
  5. *
  6. * Redistribution and use in source and binary forms, with or without modification,
  7. * are permitted provided that the following conditions are met:
  8. *
  9. * 1. Redistributions of source code must retain the above copyright notice, this
  10. * list of conditions and the following disclaimer.
  11. *
  12. * 2. Redistributions in binary form, except as embedded into a Nordic
  13. * Semiconductor ASA integrated circuit in a product or a software update for
  14. * such product, must reproduce the above copyright notice, this list of
  15. * conditions and the following disclaimer in the documentation and/or other
  16. * materials provided with the distribution.
  17. *
  18. * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
  19. * contributors may be used to endorse or promote products derived from this
  20. * software without specific prior written permission.
  21. *
  22. * 4. This software, with or without modification, must only be used with a
  23. * Nordic Semiconductor ASA integrated circuit.
  24. *
  25. * 5. Any software provided in binary form under this license must not be reverse
  26. * engineered, decompiled, modified and/or disassembled.
  27. *
  28. * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
  29. * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  30. * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
  31. * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
  32. * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  33. * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
  34. * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  35. * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  36. * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
  37. * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  38. *
  39. */
  40. #ifndef NRF_PPI_H__
  41. #define NRF_PPI_H__
  42. #include <nrfx.h>
  43. #ifdef __cplusplus
  44. extern "C" {
  45. #endif
  46. /**
  47. * @defgroup nrf_ppi_hal PPI HAL
  48. * @{
  49. * @ingroup nrf_ppi
  50. * @brief Hardware access layer (HAL) for managing the Programmable Peripheral Interconnect (PPI)
  51. * channels.
  52. */
  53. /** @brief PPI channels. */
  54. typedef enum
  55. {
  56. NRF_PPI_CHANNEL0 = PPI_CHEN_CH0_Pos, /**< Channel 0. */
  57. NRF_PPI_CHANNEL1 = PPI_CHEN_CH1_Pos, /**< Channel 1. */
  58. NRF_PPI_CHANNEL2 = PPI_CHEN_CH2_Pos, /**< Channel 2. */
  59. NRF_PPI_CHANNEL3 = PPI_CHEN_CH3_Pos, /**< Channel 3. */
  60. NRF_PPI_CHANNEL4 = PPI_CHEN_CH4_Pos, /**< Channel 4. */
  61. NRF_PPI_CHANNEL5 = PPI_CHEN_CH5_Pos, /**< Channel 5. */
  62. NRF_PPI_CHANNEL6 = PPI_CHEN_CH6_Pos, /**< Channel 6. */
  63. NRF_PPI_CHANNEL7 = PPI_CHEN_CH7_Pos, /**< Channel 7. */
  64. NRF_PPI_CHANNEL8 = PPI_CHEN_CH8_Pos, /**< Channel 8. */
  65. NRF_PPI_CHANNEL9 = PPI_CHEN_CH9_Pos, /**< Channel 9. */
  66. NRF_PPI_CHANNEL10 = PPI_CHEN_CH10_Pos, /**< Channel 10. */
  67. NRF_PPI_CHANNEL11 = PPI_CHEN_CH11_Pos, /**< Channel 11. */
  68. NRF_PPI_CHANNEL12 = PPI_CHEN_CH12_Pos, /**< Channel 12. */
  69. NRF_PPI_CHANNEL13 = PPI_CHEN_CH13_Pos, /**< Channel 13. */
  70. NRF_PPI_CHANNEL14 = PPI_CHEN_CH14_Pos, /**< Channel 14. */
  71. NRF_PPI_CHANNEL15 = PPI_CHEN_CH15_Pos, /**< Channel 15. */
  72. #if (PPI_CH_NUM > 16) || defined(__NRFX_DOXYGEN__)
  73. NRF_PPI_CHANNEL16 = PPI_CHEN_CH16_Pos, /**< Channel 16. */
  74. NRF_PPI_CHANNEL17 = PPI_CHEN_CH17_Pos, /**< Channel 17. */
  75. NRF_PPI_CHANNEL18 = PPI_CHEN_CH18_Pos, /**< Channel 18. */
  76. NRF_PPI_CHANNEL19 = PPI_CHEN_CH19_Pos, /**< Channel 19. */
  77. #endif
  78. NRF_PPI_CHANNEL20 = PPI_CHEN_CH20_Pos, /**< Channel 20. */
  79. NRF_PPI_CHANNEL21 = PPI_CHEN_CH21_Pos, /**< Channel 21. */
  80. NRF_PPI_CHANNEL22 = PPI_CHEN_CH22_Pos, /**< Channel 22. */
  81. NRF_PPI_CHANNEL23 = PPI_CHEN_CH23_Pos, /**< Channel 23. */
  82. NRF_PPI_CHANNEL24 = PPI_CHEN_CH24_Pos, /**< Channel 24. */
  83. NRF_PPI_CHANNEL25 = PPI_CHEN_CH25_Pos, /**< Channel 25. */
  84. NRF_PPI_CHANNEL26 = PPI_CHEN_CH26_Pos, /**< Channel 26. */
  85. NRF_PPI_CHANNEL27 = PPI_CHEN_CH27_Pos, /**< Channel 27. */
  86. NRF_PPI_CHANNEL28 = PPI_CHEN_CH28_Pos, /**< Channel 28. */
  87. NRF_PPI_CHANNEL29 = PPI_CHEN_CH29_Pos, /**< Channel 29. */
  88. NRF_PPI_CHANNEL30 = PPI_CHEN_CH30_Pos, /**< Channel 30. */
  89. NRF_PPI_CHANNEL31 = PPI_CHEN_CH31_Pos /**< Channel 31. */
  90. } nrf_ppi_channel_t;
  91. /** @brief PPI channel groups. */
  92. typedef enum
  93. {
  94. NRF_PPI_CHANNEL_GROUP0 = 0, /**< Channel group 0. */
  95. NRF_PPI_CHANNEL_GROUP1 = 1, /**< Channel group 1. */
  96. NRF_PPI_CHANNEL_GROUP2 = 2, /**< Channel group 2. */
  97. NRF_PPI_CHANNEL_GROUP3 = 3, /**< Channel group 3. */
  98. #if (PPI_GROUP_NUM > 4) || defined(__NRFX_DOXYGEN__)
  99. NRF_PPI_CHANNEL_GROUP4 = 4, /**< Channel group 4. */
  100. NRF_PPI_CHANNEL_GROUP5 = 5 /**< Channel group 5. */
  101. #endif
  102. } nrf_ppi_channel_group_t;
  103. /** @brief Definition of whether a PPI channel belongs to a group. */
  104. typedef enum
  105. {
  106. NRF_PPI_CHANNEL_EXCLUDE = PPI_CHG_CH0_Excluded, /**< Channel excluded from a group. */
  107. NRF_PPI_CHANNEL_INCLUDE = PPI_CHG_CH0_Included /**< Channel included in a group. */
  108. } nrf_ppi_channel_include_t;
  109. /** @brief Definition of whether a PPI channel is enabled. */
  110. typedef enum
  111. {
  112. NRF_PPI_CHANNEL_DISABLED = PPI_CHEN_CH0_Disabled, /**< Channel disabled. */
  113. NRF_PPI_CHANNEL_ENABLED = PPI_CHEN_CH0_Enabled /**< Channel enabled. */
  114. } nrf_ppi_channel_enable_t;
  115. /** @brief PPI tasks. */
  116. typedef enum
  117. {
  118. NRF_PPI_TASK_CHG0_EN = offsetof(NRF_PPI_Type, TASKS_CHG[0].EN), /**< Task for enabling channel group 0. */
  119. NRF_PPI_TASK_CHG0_DIS = offsetof(NRF_PPI_Type, TASKS_CHG[0].DIS), /**< Task for disabling channel group 0. */
  120. NRF_PPI_TASK_CHG1_EN = offsetof(NRF_PPI_Type, TASKS_CHG[1].EN), /**< Task for enabling channel group 1. */
  121. NRF_PPI_TASK_CHG1_DIS = offsetof(NRF_PPI_Type, TASKS_CHG[1].DIS), /**< Task for disabling channel group 1. */
  122. NRF_PPI_TASK_CHG2_EN = offsetof(NRF_PPI_Type, TASKS_CHG[2].EN), /**< Task for enabling channel group 2. */
  123. NRF_PPI_TASK_CHG2_DIS = offsetof(NRF_PPI_Type, TASKS_CHG[2].DIS), /**< Task for disabling channel group 2. */
  124. NRF_PPI_TASK_CHG3_EN = offsetof(NRF_PPI_Type, TASKS_CHG[3].EN), /**< Task for enabling channel group 3. */
  125. NRF_PPI_TASK_CHG3_DIS = offsetof(NRF_PPI_Type, TASKS_CHG[3].DIS), /**< Task for disabling channel group 3. */
  126. #if (PPI_GROUP_NUM > 4) || defined(__NRFX_DOXYGEN__)
  127. NRF_PPI_TASK_CHG4_EN = offsetof(NRF_PPI_Type, TASKS_CHG[4].EN), /**< Task for enabling channel group 4. */
  128. NRF_PPI_TASK_CHG4_DIS = offsetof(NRF_PPI_Type, TASKS_CHG[4].DIS), /**< Task for disabling channel group 4. */
  129. NRF_PPI_TASK_CHG5_EN = offsetof(NRF_PPI_Type, TASKS_CHG[5].EN), /**< Task for enabling channel group 5. */
  130. NRF_PPI_TASK_CHG5_DIS = offsetof(NRF_PPI_Type, TASKS_CHG[5].DIS) /**< Task for disabling channel group 5. */
  131. #endif
  132. } nrf_ppi_task_t;
  133. /**
  134. * @brief Function for enabling a given PPI channel.
  135. *
  136. * @details This function enables only one channel.
  137. *
  138. * @param[in] channel Channel to be enabled.
  139. */
  140. __STATIC_INLINE void nrf_ppi_channel_enable(nrf_ppi_channel_t channel);
  141. /**
  142. * @brief Function for disabling a given PPI channel.
  143. *
  144. * @details This function disables only one channel.
  145. *
  146. * @param[in] channel Channel to be disabled.
  147. */
  148. __STATIC_INLINE void nrf_ppi_channel_disable(nrf_ppi_channel_t channel);
  149. /**
  150. * @brief Function for checking if a given PPI channel is enabled.
  151. *
  152. * @details This function checks only one channel.
  153. *
  154. * @param[in] channel Channel to be checked.
  155. *
  156. * @retval NRF_PPI_CHANNEL_ENABLED The channel is enabled.
  157. * @retval NRF_PPI_CHANNEL_DISABLED The channel is not enabled.
  158. *
  159. */
  160. __STATIC_INLINE nrf_ppi_channel_enable_t nrf_ppi_channel_enable_get(nrf_ppi_channel_t channel);
  161. /** @brief Function for disabling all PPI channels. */
  162. __STATIC_INLINE void nrf_ppi_channel_disable_all(void);
  163. /**
  164. * @brief Function for enabling multiple PPI channels.
  165. *
  166. * @param[in] mask Channel mask.
  167. */
  168. __STATIC_INLINE void nrf_ppi_channels_enable(uint32_t mask);
  169. /**
  170. * @brief Function for disabling multiple PPI channels.
  171. *
  172. * @param[in] mask Channel mask.
  173. */
  174. __STATIC_INLINE void nrf_ppi_channels_disable(uint32_t mask);
  175. /**
  176. * @brief Function for setting up event and task endpoints for a given PPI channel.
  177. *
  178. * @param[in] eep Event register address.
  179. * @param[in] tep Task register address.
  180. * @param[in] channel Channel to which the given endpoints are assigned.
  181. */
  182. __STATIC_INLINE void nrf_ppi_channel_endpoint_setup(nrf_ppi_channel_t channel,
  183. uint32_t eep,
  184. uint32_t tep);
  185. /**
  186. * @brief Function for setting up the event endpoint for a given PPI channel.
  187. *
  188. * @param[in] eep Event register address.
  189. * @param[in] channel Channel to which the given endpoint is assigned.
  190. */
  191. __STATIC_INLINE void nrf_ppi_event_endpoint_setup(nrf_ppi_channel_t channel,
  192. uint32_t eep);
  193. /**
  194. * @brief Function for setting up the task endpoint for a given PPI channel.
  195. *
  196. * @param[in] tep Task register address.
  197. * @param[in] channel Channel to which the given endpoint is assigned.
  198. */
  199. __STATIC_INLINE void nrf_ppi_task_endpoint_setup(nrf_ppi_channel_t channel,
  200. uint32_t tep);
  201. #if defined(PPI_FEATURE_FORKS_PRESENT) || defined(__NRFX_DOXYGEN__)
  202. /**
  203. * @brief Function for setting up task endpoint for a given PPI fork.
  204. *
  205. * @param[in] fork_tep Task register address.
  206. * @param[in] channel Channel to which the given fork endpoint is assigned.
  207. */
  208. __STATIC_INLINE void nrf_ppi_fork_endpoint_setup(nrf_ppi_channel_t channel,
  209. uint32_t fork_tep);
  210. /**
  211. * @brief Function for setting up event and task endpoints for a given PPI channel and fork.
  212. *
  213. * @param[in] eep Event register address.
  214. * @param[in] tep Task register address.
  215. * @param[in] fork_tep Fork task register address (register value).
  216. * @param[in] channel Channel to which the given endpoints are assigned.
  217. */
  218. __STATIC_INLINE void nrf_ppi_channel_and_fork_endpoint_setup(nrf_ppi_channel_t channel,
  219. uint32_t eep,
  220. uint32_t tep,
  221. uint32_t fork_tep);
  222. #endif
  223. /**
  224. * @brief Function for including a PPI channel in a channel group.
  225. *
  226. * @details This function adds only one channel to the group.
  227. *
  228. * @param[in] channel Channel to be included in the group.
  229. * @param[in] channel_group Channel group.
  230. */
  231. __STATIC_INLINE void nrf_ppi_channel_include_in_group(nrf_ppi_channel_t channel,
  232. nrf_ppi_channel_group_t channel_group);
  233. /**
  234. * @brief Function for including multiple PPI channels in a channel group.
  235. *
  236. * @details This function adds all specified channels to the group.
  237. *
  238. * @param[in] channel_mask Channels to be included in the group.
  239. * @param[in] channel_group Channel group.
  240. */
  241. __STATIC_INLINE void nrf_ppi_channels_include_in_group(uint32_t channel_mask,
  242. nrf_ppi_channel_group_t channel_group);
  243. /**
  244. * @brief Function for removing a PPI channel from a channel group.
  245. *
  246. * @details This function removes only one channel from the group.
  247. *
  248. * @param[in] channel Channel to be removed from the group.
  249. * @param[in] channel_group Channel group.
  250. */
  251. __STATIC_INLINE void nrf_ppi_channel_remove_from_group(nrf_ppi_channel_t channel,
  252. nrf_ppi_channel_group_t channel_group);
  253. /**
  254. * @brief Function for removing multiple PPI channels from a channel group.
  255. *
  256. * @details This function removes all specified channels from the group.
  257. *
  258. * @param[in] channel_mask Channels to be removed from the group.
  259. * @param[in] channel_group Channel group.
  260. */
  261. __STATIC_INLINE void nrf_ppi_channels_remove_from_group(uint32_t channel_mask,
  262. nrf_ppi_channel_group_t channel_group);
  263. /**
  264. * @brief Function for removing all PPI channels from a channel group.
  265. *
  266. * @param[in] group Channel group.
  267. */
  268. __STATIC_INLINE void nrf_ppi_channel_group_clear(nrf_ppi_channel_group_t group);
  269. /**
  270. * @brief Function for enabling a channel group.
  271. *
  272. * @param[in] group Channel group.
  273. */
  274. __STATIC_INLINE void nrf_ppi_group_enable(nrf_ppi_channel_group_t group);
  275. /**
  276. * @brief Function for disabling a channel group.
  277. *
  278. * @param[in] group Channel group.
  279. */
  280. __STATIC_INLINE void nrf_ppi_group_disable(nrf_ppi_channel_group_t group);
  281. /**
  282. * @brief Function for setting a PPI task.
  283. *
  284. * @param[in] ppi_task PPI task to be set.
  285. */
  286. __STATIC_INLINE void nrf_ppi_task_trigger(nrf_ppi_task_t ppi_task);
  287. /**
  288. * @brief Function for getting the address of the specified PPI task register.
  289. *
  290. * @param[in] ppi_task PPI task.
  291. *
  292. * @return Address of the requested PPI task register.
  293. */
  294. __STATIC_INLINE uint32_t * nrf_ppi_task_address_get(nrf_ppi_task_t ppi_task);
  295. /**
  296. * @brief Function for getting the PPI enable task address of the specified group.
  297. *
  298. * @param[in] group PPI group.
  299. *
  300. * @return PPI enable task address of the specified group.
  301. */
  302. __STATIC_INLINE uint32_t * nrf_ppi_task_group_enable_address_get(nrf_ppi_channel_group_t group);
  303. /**
  304. * @brief Function for getting the PPI disable task address of the specified group.
  305. *
  306. * @param[in] group PPI group.
  307. *
  308. * @return PPI disable task address of the specified group.
  309. */
  310. __STATIC_INLINE uint32_t * nrf_ppi_task_group_disable_address_get(nrf_ppi_channel_group_t group);
  311. /**
  312. * @brief Function for getting the ENABLE task associated with the specified channel group.
  313. *
  314. * @param[in] index Channel group index.
  315. *
  316. * @return Requested ENABLE task.
  317. */
  318. __STATIC_INLINE nrf_ppi_task_t nrf_ppi_group_enable_task_get(uint8_t index);
  319. /**
  320. * @brief Function for getting the DISABLE task associated with the specified channel group.
  321. *
  322. * @param[in] index Channel group index.
  323. *
  324. * @return Requested DISABLE task.
  325. */
  326. __STATIC_INLINE nrf_ppi_task_t nrf_ppi_group_disable_task_get(uint8_t index);
  327. #ifndef SUPPRESS_INLINE_IMPLEMENTATION
  328. __STATIC_INLINE void nrf_ppi_channel_enable(nrf_ppi_channel_t channel)
  329. {
  330. NRF_PPI->CHENSET = PPI_CHENSET_CH0_Set << ((uint32_t) channel);
  331. }
  332. __STATIC_INLINE void nrf_ppi_channel_disable(nrf_ppi_channel_t channel)
  333. {
  334. NRF_PPI->CHENCLR = PPI_CHENCLR_CH0_Clear << ((uint32_t) channel);
  335. }
  336. __STATIC_INLINE nrf_ppi_channel_enable_t nrf_ppi_channel_enable_get(nrf_ppi_channel_t channel)
  337. {
  338. if (NRF_PPI->CHEN & (PPI_CHEN_CH0_Msk << ((uint32_t) channel)))
  339. {
  340. return NRF_PPI_CHANNEL_ENABLED;
  341. }
  342. else
  343. {
  344. return NRF_PPI_CHANNEL_DISABLED;
  345. }
  346. }
  347. __STATIC_INLINE void nrf_ppi_channel_disable_all(void)
  348. {
  349. NRF_PPI->CHENCLR = ((uint32_t)0xFFFFFFFFuL);
  350. }
  351. __STATIC_INLINE void nrf_ppi_channels_enable(uint32_t mask)
  352. {
  353. NRF_PPI->CHENSET = mask;
  354. }
  355. __STATIC_INLINE void nrf_ppi_channels_disable(uint32_t mask)
  356. {
  357. NRF_PPI->CHENCLR = mask;
  358. }
  359. __STATIC_INLINE void nrf_ppi_channel_endpoint_setup(nrf_ppi_channel_t channel,
  360. uint32_t eep,
  361. uint32_t tep)
  362. {
  363. NRF_PPI->CH[(uint32_t) channel].EEP = eep;
  364. NRF_PPI->CH[(uint32_t) channel].TEP = tep;
  365. }
  366. __STATIC_INLINE void nrf_ppi_event_endpoint_setup(nrf_ppi_channel_t channel,
  367. uint32_t eep)
  368. {
  369. NRF_PPI->CH[(uint32_t) channel].EEP = eep;
  370. }
  371. __STATIC_INLINE void nrf_ppi_task_endpoint_setup(nrf_ppi_channel_t channel,
  372. uint32_t tep)
  373. {
  374. NRF_PPI->CH[(uint32_t) channel].TEP = tep;
  375. }
  376. #if defined(PPI_FEATURE_FORKS_PRESENT)
  377. __STATIC_INLINE void nrf_ppi_fork_endpoint_setup(nrf_ppi_channel_t channel,
  378. uint32_t fork_tep)
  379. {
  380. NRF_PPI->FORK[(uint32_t) channel].TEP = fork_tep;
  381. }
  382. __STATIC_INLINE void nrf_ppi_channel_and_fork_endpoint_setup(nrf_ppi_channel_t channel,
  383. uint32_t eep,
  384. uint32_t tep,
  385. uint32_t fork_tep)
  386. {
  387. nrf_ppi_channel_endpoint_setup(channel, eep, tep);
  388. nrf_ppi_fork_endpoint_setup(channel, fork_tep);
  389. }
  390. #endif
  391. __STATIC_INLINE void nrf_ppi_channel_include_in_group(nrf_ppi_channel_t channel,
  392. nrf_ppi_channel_group_t channel_group)
  393. {
  394. NRF_PPI->CHG[(uint32_t) channel_group] =
  395. NRF_PPI->CHG[(uint32_t) channel_group] | (PPI_CHG_CH0_Included << ((uint32_t) channel));
  396. }
  397. __STATIC_INLINE void nrf_ppi_channels_include_in_group(uint32_t channel_mask,
  398. nrf_ppi_channel_group_t channel_group)
  399. {
  400. NRF_PPI->CHG[(uint32_t) channel_group] =
  401. NRF_PPI->CHG[(uint32_t) channel_group] | (channel_mask);
  402. }
  403. __STATIC_INLINE void nrf_ppi_channel_remove_from_group(nrf_ppi_channel_t channel,
  404. nrf_ppi_channel_group_t channel_group)
  405. {
  406. NRF_PPI->CHG[(uint32_t) channel_group] =
  407. NRF_PPI->CHG[(uint32_t) channel_group] & ~(PPI_CHG_CH0_Included << ((uint32_t) channel));
  408. }
  409. __STATIC_INLINE void nrf_ppi_channels_remove_from_group(uint32_t channel_mask,
  410. nrf_ppi_channel_group_t channel_group)
  411. {
  412. NRF_PPI->CHG[(uint32_t) channel_group] =
  413. NRF_PPI->CHG[(uint32_t) channel_group] & ~(channel_mask);
  414. }
  415. __STATIC_INLINE void nrf_ppi_channel_group_clear(nrf_ppi_channel_group_t group)
  416. {
  417. NRF_PPI->CHG[(uint32_t) group] = 0;
  418. }
  419. __STATIC_INLINE void nrf_ppi_group_enable(nrf_ppi_channel_group_t group)
  420. {
  421. NRF_PPI->TASKS_CHG[(uint32_t) group].EN = 1UL;
  422. }
  423. __STATIC_INLINE void nrf_ppi_group_disable(nrf_ppi_channel_group_t group)
  424. {
  425. NRF_PPI->TASKS_CHG[(uint32_t) group].DIS = 1UL;
  426. }
  427. __STATIC_INLINE void nrf_ppi_task_trigger(nrf_ppi_task_t ppi_task)
  428. {
  429. *((volatile uint32_t *) ((uint8_t *) NRF_PPI_BASE + (uint32_t) ppi_task)) = 1UL;
  430. }
  431. __STATIC_INLINE uint32_t * nrf_ppi_task_address_get(nrf_ppi_task_t ppi_task)
  432. {
  433. return (uint32_t *) ((uint8_t *) NRF_PPI_BASE + (uint32_t) ppi_task);
  434. }
  435. __STATIC_INLINE uint32_t * nrf_ppi_task_group_enable_address_get(nrf_ppi_channel_group_t group)
  436. {
  437. return (uint32_t *) &NRF_PPI->TASKS_CHG[(uint32_t) group].EN;
  438. }
  439. __STATIC_INLINE uint32_t * nrf_ppi_task_group_disable_address_get(nrf_ppi_channel_group_t group)
  440. {
  441. return (uint32_t *) &NRF_PPI->TASKS_CHG[(uint32_t) group].DIS;
  442. }
  443. __STATIC_INLINE nrf_ppi_task_t nrf_ppi_group_enable_task_get(uint8_t index)
  444. {
  445. NRFX_ASSERT(index < NRFX_ARRAY_SIZE(NRF_PPI->TASKS_CHG));
  446. return (nrf_ppi_task_t)NRFX_OFFSETOF(NRF_PPI_Type, TASKS_CHG[index].EN);
  447. }
  448. __STATIC_INLINE nrf_ppi_task_t nrf_ppi_group_disable_task_get(uint8_t index)
  449. {
  450. NRFX_ASSERT(index < NRFX_ARRAY_SIZE(NRF_PPI->TASKS_CHG));
  451. return (nrf_ppi_task_t)NRFX_OFFSETOF(NRF_PPI_Type, TASKS_CHG[index].DIS);
  452. }
  453. #endif // SUPPRESS_INLINE_IMPLEMENTATION
  454. /** @} */
  455. #ifdef __cplusplus
  456. }
  457. #endif
  458. #endif // NRF_PPI_H__