nrf_egu.h 20 KB

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  1. /**
  2. * Copyright (c) 2015 - 2020, Nordic Semiconductor ASA
  3. *
  4. * All rights reserved.
  5. *
  6. * Redistribution and use in source and binary forms, with or without modification,
  7. * are permitted provided that the following conditions are met:
  8. *
  9. * 1. Redistributions of source code must retain the above copyright notice, this
  10. * list of conditions and the following disclaimer.
  11. *
  12. * 2. Redistributions in binary form, except as embedded into a Nordic
  13. * Semiconductor ASA integrated circuit in a product or a software update for
  14. * such product, must reproduce the above copyright notice, this list of
  15. * conditions and the following disclaimer in the documentation and/or other
  16. * materials provided with the distribution.
  17. *
  18. * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
  19. * contributors may be used to endorse or promote products derived from this
  20. * software without specific prior written permission.
  21. *
  22. * 4. This software, with or without modification, must only be used with a
  23. * Nordic Semiconductor ASA integrated circuit.
  24. *
  25. * 5. Any software provided in binary form under this license must not be reverse
  26. * engineered, decompiled, modified and/or disassembled.
  27. *
  28. * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
  29. * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  30. * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
  31. * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
  32. * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  33. * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
  34. * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  35. * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  36. * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
  37. * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  38. *
  39. */
  40. #ifndef NRF_EGU_H__
  41. #define NRF_EGU_H__
  42. #include <nrfx.h>
  43. #ifdef __cplusplus
  44. extern "C" {
  45. #endif
  46. /**
  47. * @defgroup nrf_egu_hal EGU HAL
  48. * @{
  49. * @ingroup nrf_swi_egu
  50. * @brief Hardware access layer for managing the Event Generator Unit (EGU) peripheral.
  51. */
  52. /** @brief EGU tasks. */
  53. typedef enum
  54. {
  55. NRF_EGU_TASK_TRIGGER0 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[0]), /**< Trigger 0 for triggering the corresponding TRIGGERED[0] event. */
  56. NRF_EGU_TASK_TRIGGER1 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[1]), /**< Trigger 1 for triggering the corresponding TRIGGERED[1] event. */
  57. NRF_EGU_TASK_TRIGGER2 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[2]), /**< Trigger 2 for triggering the corresponding TRIGGERED[2] event. */
  58. NRF_EGU_TASK_TRIGGER3 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[3]), /**< Trigger 3 for triggering the corresponding TRIGGERED[3] event. */
  59. NRF_EGU_TASK_TRIGGER4 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[4]), /**< Trigger 4 for triggering the corresponding TRIGGERED[4] event. */
  60. NRF_EGU_TASK_TRIGGER5 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[5]), /**< Trigger 5 for triggering the corresponding TRIGGERED[5] event. */
  61. NRF_EGU_TASK_TRIGGER6 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[6]), /**< Trigger 6 for triggering the corresponding TRIGGERED[6] event. */
  62. NRF_EGU_TASK_TRIGGER7 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[7]), /**< Trigger 7 for triggering the corresponding TRIGGERED[7] event. */
  63. NRF_EGU_TASK_TRIGGER8 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[8]), /**< Trigger 8 for triggering the corresponding TRIGGERED[8] event. */
  64. NRF_EGU_TASK_TRIGGER9 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[9]), /**< Trigger 9 for triggering the corresponding TRIGGERED[9] event. */
  65. NRF_EGU_TASK_TRIGGER10 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[10]), /**< Trigger 10 for triggering the corresponding TRIGGERED[10] event. */
  66. NRF_EGU_TASK_TRIGGER11 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[11]), /**< Trigger 11 for triggering the corresponding TRIGGERED[11] event. */
  67. NRF_EGU_TASK_TRIGGER12 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[12]), /**< Trigger 12 for triggering the corresponding TRIGGERED[12] event. */
  68. NRF_EGU_TASK_TRIGGER13 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[13]), /**< Trigger 13 for triggering the corresponding TRIGGERED[13] event. */
  69. NRF_EGU_TASK_TRIGGER14 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[14]), /**< Trigger 14 for triggering the corresponding TRIGGERED[14] event. */
  70. NRF_EGU_TASK_TRIGGER15 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[15]) /**< Trigger 15 for triggering the corresponding TRIGGERED[15] event. */
  71. } nrf_egu_task_t;
  72. /** @brief EGU events. */
  73. typedef enum
  74. {
  75. NRF_EGU_EVENT_TRIGGERED0 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[0]), /**< Event number 0 generated by triggering the corresponding TRIGGER[0] task. */
  76. NRF_EGU_EVENT_TRIGGERED1 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[1]), /**< Event number 1 generated by triggering the corresponding TRIGGER[1] task. */
  77. NRF_EGU_EVENT_TRIGGERED2 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[2]), /**< Event number 2 generated by triggering the corresponding TRIGGER[2] task. */
  78. NRF_EGU_EVENT_TRIGGERED3 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[3]), /**< Event number 3 generated by triggering the corresponding TRIGGER[3] task. */
  79. NRF_EGU_EVENT_TRIGGERED4 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[4]), /**< Event number 4 generated by triggering the corresponding TRIGGER[4] task. */
  80. NRF_EGU_EVENT_TRIGGERED5 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[5]), /**< Event number 5 generated by triggering the corresponding TRIGGER[5] task. */
  81. NRF_EGU_EVENT_TRIGGERED6 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[6]), /**< Event number 6 generated by triggering the corresponding TRIGGER[6] task. */
  82. NRF_EGU_EVENT_TRIGGERED7 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[7]), /**< Event number 7 generated by triggering the corresponding TRIGGER[7] task. */
  83. NRF_EGU_EVENT_TRIGGERED8 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[8]), /**< Event number 8 generated by triggering the corresponding TRIGGER[8] task. */
  84. NRF_EGU_EVENT_TRIGGERED9 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[9]), /**< Event number 9 generated by triggering the corresponding TRIGGER[9] task. */
  85. NRF_EGU_EVENT_TRIGGERED10 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[10]), /**< Event number 10 generated by triggering the corresponding TRIGGER[10] task. */
  86. NRF_EGU_EVENT_TRIGGERED11 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[11]), /**< Event number 11 generated by triggering the corresponding TRIGGER[11] task. */
  87. NRF_EGU_EVENT_TRIGGERED12 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[12]), /**< Event number 12 generated by triggering the corresponding TRIGGER[12] task. */
  88. NRF_EGU_EVENT_TRIGGERED13 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[13]), /**< Event number 13 generated by triggering the corresponding TRIGGER[13] task. */
  89. NRF_EGU_EVENT_TRIGGERED14 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[14]), /**< Event number 14 generated by triggering the corresponding TRIGGER[14] task. */
  90. NRF_EGU_EVENT_TRIGGERED15 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[15]) /**< Event number 15 generated by triggering the corresponding TRIGGER[15] task. */
  91. } nrf_egu_event_t;
  92. /** @brief EGU interrupts. */
  93. typedef enum
  94. {
  95. NRF_EGU_INT_TRIGGERED0 = EGU_INTENSET_TRIGGERED0_Msk, /**< Interrupt on EVENTS_TRIGGERED[0] event. */
  96. NRF_EGU_INT_TRIGGERED1 = EGU_INTENSET_TRIGGERED1_Msk, /**< Interrupt on EVENTS_TRIGGERED[1] event. */
  97. NRF_EGU_INT_TRIGGERED2 = EGU_INTENSET_TRIGGERED2_Msk, /**< Interrupt on EVENTS_TRIGGERED[2] event. */
  98. NRF_EGU_INT_TRIGGERED3 = EGU_INTENSET_TRIGGERED3_Msk, /**< Interrupt on EVENTS_TRIGGERED[3] event. */
  99. NRF_EGU_INT_TRIGGERED4 = EGU_INTENSET_TRIGGERED4_Msk, /**< Interrupt on EVENTS_TRIGGERED[4] event. */
  100. NRF_EGU_INT_TRIGGERED5 = EGU_INTENSET_TRIGGERED5_Msk, /**< Interrupt on EVENTS_TRIGGERED[5] event. */
  101. NRF_EGU_INT_TRIGGERED6 = EGU_INTENSET_TRIGGERED6_Msk, /**< Interrupt on EVENTS_TRIGGERED[6] event. */
  102. NRF_EGU_INT_TRIGGERED7 = EGU_INTENSET_TRIGGERED7_Msk, /**< Interrupt on EVENTS_TRIGGERED[7] event. */
  103. NRF_EGU_INT_TRIGGERED8 = EGU_INTENSET_TRIGGERED8_Msk, /**< Interrupt on EVENTS_TRIGGERED[8] event. */
  104. NRF_EGU_INT_TRIGGERED9 = EGU_INTENSET_TRIGGERED9_Msk, /**< Interrupt on EVENTS_TRIGGERED[9] event. */
  105. NRF_EGU_INT_TRIGGERED10 = EGU_INTENSET_TRIGGERED10_Msk, /**< Interrupt on EVENTS_TRIGGERED[10] event. */
  106. NRF_EGU_INT_TRIGGERED11 = EGU_INTENSET_TRIGGERED11_Msk, /**< Interrupt on EVENTS_TRIGGERED[11] event. */
  107. NRF_EGU_INT_TRIGGERED12 = EGU_INTENSET_TRIGGERED12_Msk, /**< Interrupt on EVENTS_TRIGGERED[12] event. */
  108. NRF_EGU_INT_TRIGGERED13 = EGU_INTENSET_TRIGGERED13_Msk, /**< Interrupt on EVENTS_TRIGGERED[13] event. */
  109. NRF_EGU_INT_TRIGGERED14 = EGU_INTENSET_TRIGGERED14_Msk, /**< Interrupt on EVENTS_TRIGGERED[14] event. */
  110. NRF_EGU_INT_TRIGGERED15 = EGU_INTENSET_TRIGGERED15_Msk, /**< Interrupt on EVENTS_TRIGGERED[15] event. */
  111. NRF_EGU_INT_ALL = 0xFFFFuL
  112. } nrf_egu_int_mask_t;
  113. /**
  114. * @brief Function for getting the maximum channel number of the given EGU.
  115. *
  116. * @param NRF_EGUx EGU instance.
  117. *
  118. * @return Number of available channels.
  119. */
  120. __STATIC_INLINE uint32_t nrf_egu_channel_count(NRF_EGU_Type * NRF_EGUx);
  121. /**
  122. * @brief Function for triggering the specified EGU task.
  123. *
  124. * @param NRF_EGUx EGU instance.
  125. * @param egu_task EGU task.
  126. */
  127. __STATIC_INLINE void nrf_egu_task_trigger(NRF_EGU_Type * NRF_EGUx, nrf_egu_task_t egu_task);
  128. /**
  129. * @brief Function for returning the address of the specified EGU task register.
  130. *
  131. * @param NRF_EGUx EGU instance.
  132. * @param egu_task EGU task.
  133. *
  134. * @return Address of the specified EGU task register.
  135. */
  136. __STATIC_INLINE uint32_t * nrf_egu_task_address_get(NRF_EGU_Type * NRF_EGUx,
  137. nrf_egu_task_t egu_task);
  138. /**
  139. * @brief Function for returning the address of the specified EGU TRIGGER task register.
  140. *
  141. * @param NRF_EGUx EGU instance.
  142. * @param channel Channel number.
  143. *
  144. * @return Address of the specified EGU TRIGGER task register.
  145. */
  146. __STATIC_INLINE uint32_t * nrf_egu_task_trigger_address_get(NRF_EGU_Type * NRF_EGUx,
  147. uint8_t channel);
  148. /**
  149. * @brief Function for returning the specified EGU TRIGGER task.
  150. *
  151. * @param NRF_EGUx EGU instance.
  152. * @param channel Channel number.
  153. *
  154. * @return The specified EGU TRIGGER task.
  155. */
  156. __STATIC_INLINE nrf_egu_task_t nrf_egu_task_trigger_get(NRF_EGU_Type * NRF_EGUx, uint8_t channel);
  157. /**
  158. * @brief Function for retrieving the state of the UARTE event.
  159. *
  160. * @param NRF_EGUx EGU instance.
  161. * @param egu_event EGU event to be checked.
  162. *
  163. * @retval true The event has been generated.
  164. * @retval false The event has not been generated.
  165. */
  166. __STATIC_INLINE bool nrf_egu_event_check(NRF_EGU_Type * NRF_EGUx,
  167. nrf_egu_event_t egu_event);
  168. /**
  169. * @brief Function for clearing the specified EGU event.
  170. *
  171. * @param NRF_EGUx EGU instance.
  172. * @param egu_event EGU event to clear.
  173. */
  174. __STATIC_INLINE void nrf_egu_event_clear(NRF_EGU_Type * NRF_EGUx,
  175. nrf_egu_event_t egu_event);
  176. /**
  177. * @brief Function for returning the address of the specified EGU event register.
  178. *
  179. * @param NRF_EGUx EGU instance.
  180. * @param egu_event EGU event.
  181. *
  182. * @return Address of the specified EGU event register.
  183. */
  184. __STATIC_INLINE uint32_t * nrf_egu_event_address_get(NRF_EGU_Type * NRF_EGUx,
  185. nrf_egu_event_t egu_event);
  186. /**
  187. * @brief Function for returning address of the specified EGU TRIGGERED event register.
  188. *
  189. * @param NRF_EGUx EGU instance.
  190. * @param channel Channel number.
  191. *
  192. * @return Address of the specified EGU TRIGGERED event register.
  193. */
  194. __STATIC_INLINE uint32_t * nrf_egu_event_triggered_address_get(NRF_EGU_Type * NRF_EGUx,
  195. uint8_t channel);
  196. /**
  197. * @brief Function for returning the specified EGU TRIGGERED event.
  198. *
  199. * @param NRF_EGUx EGU instance.
  200. * @param channel Channel number.
  201. *
  202. * @return The specified EGU TRIGGERED event.
  203. */
  204. __STATIC_INLINE nrf_egu_event_t nrf_egu_event_triggered_get(NRF_EGU_Type * NRF_EGUx,
  205. uint8_t channel);
  206. /**
  207. * @brief Function for enabling one or more of the EGU interrupts.
  208. *
  209. * @param NRF_EGUx EGU instance.
  210. * @param mask Mask of interrupts to be enabled.
  211. */
  212. __STATIC_INLINE void nrf_egu_int_enable(NRF_EGU_Type * NRF_EGUx, uint32_t mask);
  213. /**
  214. * @brief Function for retrieving the state of one or more of the EGU interrupts.
  215. *
  216. * @param NRF_EGUx EGU instance.
  217. * @param mask Mask of interrupts to be checked.
  218. *
  219. * @retval true All of the specified interrupts are enabled.
  220. * @retval false At least one of the specified interrupts is disabled.
  221. */
  222. __STATIC_INLINE bool nrf_egu_int_enable_check(NRF_EGU_Type * NRF_EGUx, uint32_t mask);
  223. /**
  224. * @brief Function for disabling one or more of the EGU interrupts.
  225. *
  226. * @param NRF_EGUx EGU instance.
  227. * @param mask Mask of interrupts to be disabled.
  228. */
  229. __STATIC_INLINE void nrf_egu_int_disable(NRF_EGU_Type * NRF_EGUx, uint32_t mask);
  230. /**
  231. * @brief Function for retrieving one or more of the EGU interrupts.
  232. *
  233. * @param NRF_EGUx EGU instance.
  234. * @param channel Channel number.
  235. *
  236. * @return EGU interrupt mask.
  237. */
  238. __STATIC_INLINE nrf_egu_int_mask_t nrf_egu_int_get(NRF_EGU_Type * NRF_EGUx, uint8_t channel);
  239. #if defined(DPPI_PRESENT) || defined(__NRFX_DOXYGEN__)
  240. /**
  241. * @brief Function for setting the subscribe configuration for a given
  242. * EGU task.
  243. *
  244. * @param[in] p_reg Pointer to the structure of registers of the peripheral.
  245. * @param[in] task Task for which to set the configuration.
  246. * @param[in] channel Channel through which to subscribe events.
  247. */
  248. __STATIC_INLINE void nrf_egu_subscribe_set(NRF_EGU_Type * p_reg,
  249. nrf_egu_task_t task,
  250. uint8_t channel);
  251. /**
  252. * @brief Function for clearing the subscribe configuration for a given
  253. * EGU task.
  254. *
  255. * @param[in] p_reg Pointer to the structure of registers of the peripheral.
  256. * @param[in] task Task for which to clear the configuration.
  257. */
  258. __STATIC_INLINE void nrf_egu_subscribe_clear(NRF_EGU_Type * p_reg,
  259. nrf_egu_task_t task);
  260. /**
  261. * @brief Function for setting the publish configuration for a given
  262. * EGU event.
  263. *
  264. * @param[in] p_reg Pointer to the structure of registers of the peripheral.
  265. * @param[in] event Event for which to set the configuration.
  266. * @param[in] channel Channel through which to publish the event.
  267. */
  268. __STATIC_INLINE void nrf_egu_publish_set(NRF_EGU_Type * p_reg,
  269. nrf_egu_event_t event,
  270. uint8_t channel);
  271. /**
  272. * @brief Function for clearing the publish configuration for a given
  273. * EGU event.
  274. *
  275. * @param[in] p_reg Pointer to the structure of registers of the peripheral.
  276. * @param[in] event Event for which to clear the configuration.
  277. */
  278. __STATIC_INLINE void nrf_egu_publish_clear(NRF_EGU_Type * p_reg,
  279. nrf_egu_event_t event);
  280. #endif // defined(DPPI_PRESENT) || defined(__NRFX_DOXYGEN__)
  281. #ifndef SUPPRESS_INLINE_IMPLEMENTATION
  282. __STATIC_INLINE uint32_t nrf_egu_channel_count(NRF_EGU_Type * NRF_EGUx)
  283. {
  284. if (NRF_EGUx == NRF_EGU0){
  285. return EGU0_CH_NUM;
  286. }
  287. if (NRF_EGUx == NRF_EGU1){
  288. return EGU1_CH_NUM;
  289. }
  290. #if EGU_COUNT > 2
  291. if (NRF_EGUx == NRF_EGU2){
  292. return EGU2_CH_NUM;
  293. }
  294. if (NRF_EGUx == NRF_EGU3){
  295. return EGU3_CH_NUM;
  296. }
  297. if (NRF_EGUx == NRF_EGU4){
  298. return EGU4_CH_NUM;
  299. }
  300. if (NRF_EGUx == NRF_EGU5){
  301. return EGU5_CH_NUM;
  302. }
  303. #endif
  304. return 0;
  305. }
  306. __STATIC_INLINE void nrf_egu_task_trigger(NRF_EGU_Type * NRF_EGUx, nrf_egu_task_t egu_task)
  307. {
  308. NRFX_ASSERT(NRF_EGUx);
  309. *((volatile uint32_t *)((uint8_t *)NRF_EGUx + (uint32_t)egu_task)) = 0x1UL;
  310. }
  311. __STATIC_INLINE uint32_t * nrf_egu_task_address_get(NRF_EGU_Type * NRF_EGUx,
  312. nrf_egu_task_t egu_task)
  313. {
  314. NRFX_ASSERT(NRF_EGUx);
  315. return (uint32_t *)((uint8_t *)NRF_EGUx + (uint32_t)egu_task);
  316. }
  317. __STATIC_INLINE uint32_t * nrf_egu_task_trigger_address_get(NRF_EGU_Type * NRF_EGUx,
  318. uint8_t channel)
  319. {
  320. NRFX_ASSERT(NRF_EGUx);
  321. NRFX_ASSERT(channel < nrf_egu_channel_count(NRF_EGUx));
  322. return (uint32_t*)&NRF_EGUx->TASKS_TRIGGER[channel];
  323. }
  324. __STATIC_INLINE nrf_egu_task_t nrf_egu_task_trigger_get(NRF_EGU_Type * NRF_EGUx, uint8_t channel)
  325. {
  326. NRFX_ASSERT(NRF_EGUx);
  327. NRFX_ASSERT(channel < nrf_egu_channel_count(NRF_EGUx));
  328. return (nrf_egu_task_t)((uint32_t) NRF_EGU_TASK_TRIGGER0 + (channel * sizeof(uint32_t)));
  329. }
  330. __STATIC_INLINE bool nrf_egu_event_check(NRF_EGU_Type * NRF_EGUx,
  331. nrf_egu_event_t egu_event)
  332. {
  333. NRFX_ASSERT(NRF_EGUx);
  334. return (bool)*(volatile uint32_t *)((uint8_t *)NRF_EGUx + (uint32_t)egu_event);
  335. }
  336. __STATIC_INLINE void nrf_egu_event_clear(NRF_EGU_Type * NRF_EGUx,
  337. nrf_egu_event_t egu_event)
  338. {
  339. NRFX_ASSERT(NRF_EGUx);
  340. *((volatile uint32_t *)((uint8_t *)NRF_EGUx + (uint32_t)egu_event)) = 0x0UL;
  341. #if __CORTEX_M == 0x04
  342. volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)NRF_EGUx + (uint32_t)egu_event));
  343. (void)dummy;
  344. #endif
  345. }
  346. __STATIC_INLINE uint32_t * nrf_egu_event_address_get(NRF_EGU_Type * NRF_EGUx,
  347. nrf_egu_event_t egu_event)
  348. {
  349. NRFX_ASSERT(NRF_EGUx);
  350. return (uint32_t *)((uint8_t *)NRF_EGUx + (uint32_t)egu_event);
  351. }
  352. __STATIC_INLINE uint32_t * nrf_egu_event_triggered_address_get(NRF_EGU_Type * NRF_EGUx,
  353. uint8_t channel)
  354. {
  355. NRFX_ASSERT(NRF_EGUx);
  356. NRFX_ASSERT(channel < nrf_egu_channel_count(NRF_EGUx));
  357. return (uint32_t*)&NRF_EGUx->EVENTS_TRIGGERED[channel];
  358. }
  359. __STATIC_INLINE nrf_egu_event_t nrf_egu_event_triggered_get(NRF_EGU_Type * NRF_EGUx,
  360. uint8_t channel)
  361. {
  362. NRFX_ASSERT(NRF_EGUx);
  363. NRFX_ASSERT(channel < nrf_egu_channel_count(NRF_EGUx));
  364. return (nrf_egu_event_t)((uint32_t) NRF_EGU_EVENT_TRIGGERED0 + (channel * sizeof(uint32_t)));
  365. }
  366. __STATIC_INLINE void nrf_egu_int_enable(NRF_EGU_Type * NRF_EGUx, uint32_t mask)
  367. {
  368. NRFX_ASSERT(NRF_EGUx);
  369. NRF_EGUx->INTENSET = mask;
  370. }
  371. __STATIC_INLINE bool nrf_egu_int_enable_check(NRF_EGU_Type * NRF_EGUx, uint32_t mask)
  372. {
  373. NRFX_ASSERT(NRF_EGUx);
  374. return (bool)(NRF_EGUx->INTENSET & mask);
  375. }
  376. __STATIC_INLINE void nrf_egu_int_disable(NRF_EGU_Type * NRF_EGUx, uint32_t mask)
  377. {
  378. NRFX_ASSERT(NRF_EGUx);
  379. NRF_EGUx->INTENCLR = mask;
  380. }
  381. __STATIC_INLINE nrf_egu_int_mask_t nrf_egu_int_get(NRF_EGU_Type * NRF_EGUx, uint8_t channel)
  382. {
  383. NRFX_ASSERT(NRF_EGUx);
  384. NRFX_ASSERT(channel < nrf_egu_channel_count(NRF_EGUx));
  385. return (nrf_egu_int_mask_t)((uint32_t) (EGU_INTENSET_TRIGGERED0_Msk << channel));
  386. }
  387. #if defined(DPPI_PRESENT)
  388. __STATIC_INLINE void nrf_egu_subscribe_set(NRF_EGU_Type * p_reg,
  389. nrf_egu_task_t task,
  390. uint8_t channel)
  391. {
  392. *((volatile uint32_t *) ((uint8_t *) p_reg + (uint32_t) task + 0x80uL)) =
  393. ((uint32_t)channel | EGU_SUBSCRIBE_TRIGGER_EN_Msk);
  394. }
  395. __STATIC_INLINE void nrf_egu_subscribe_clear(NRF_EGU_Type * p_reg,
  396. nrf_egu_task_t task)
  397. {
  398. *((volatile uint32_t *) ((uint8_t *) p_reg + (uint32_t) task + 0x80uL)) = 0;
  399. }
  400. __STATIC_INLINE void nrf_egu_publish_set(NRF_EGU_Type * p_reg,
  401. nrf_egu_event_t event,
  402. uint8_t channel)
  403. {
  404. *((volatile uint32_t *) ((uint8_t *) p_reg + (uint32_t) event + 0x80uL)) =
  405. ((uint32_t)channel | EGU_PUBLISH_TRIGGERED_EN_Msk);
  406. }
  407. __STATIC_INLINE void nrf_egu_publish_clear(NRF_EGU_Type * p_reg,
  408. nrf_egu_event_t event)
  409. {
  410. *((volatile uint32_t *) ((uint8_t *) p_reg + (uint32_t) event + 0x80uL)) = 0;
  411. }
  412. #endif // defined(DPPI_PRESENT)
  413. #endif // SUPPRESS_INLINE_IMPLEMENTATION
  414. /** @} */
  415. #ifdef __cplusplus
  416. }
  417. #endif
  418. #endif