main.c 4.1 KB

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  1. /**
  2. * Copyright (c) 2015 - 2020, Nordic Semiconductor ASA
  3. *
  4. * All rights reserved.
  5. *
  6. * Redistribution and use in source and binary forms, with or without modification,
  7. * are permitted provided that the following conditions are met:
  8. *
  9. * 1. Redistributions of source code must retain the above copyright notice, this
  10. * list of conditions and the following disclaimer.
  11. *
  12. * 2. Redistributions in binary form, except as embedded into a Nordic
  13. * Semiconductor ASA integrated circuit in a product or a software update for
  14. * such product, must reproduce the above copyright notice, this list of
  15. * conditions and the following disclaimer in the documentation and/or other
  16. * materials provided with the distribution.
  17. *
  18. * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
  19. * contributors may be used to endorse or promote products derived from this
  20. * software without specific prior written permission.
  21. *
  22. * 4. This software, with or without modification, must only be used with a
  23. * Nordic Semiconductor ASA integrated circuit.
  24. *
  25. * 5. Any software provided in binary form under this license must not be reverse
  26. * engineered, decompiled, modified and/or disassembled.
  27. *
  28. * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
  29. * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  30. * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
  31. * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
  32. * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  33. * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
  34. * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  35. * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  36. * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
  37. * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  38. *
  39. */
  40. #include "sdk_config.h"
  41. #include "nrf_drv_spis.h"
  42. #include "nrf_gpio.h"
  43. #include "boards.h"
  44. #include "app_error.h"
  45. #include <string.h>
  46. #include "nrf_log.h"
  47. #include "nrf_log_ctrl.h"
  48. #include "nrf_log_default_backends.h"
  49. #define SPIS_INSTANCE 1 /**< SPIS instance index. */
  50. static const nrf_drv_spis_t spis = NRF_DRV_SPIS_INSTANCE(SPIS_INSTANCE);/**< SPIS instance. */
  51. #define TEST_STRING "Nordic"
  52. static uint8_t m_tx_buf[] = TEST_STRING; /**< TX buffer. */
  53. static uint8_t m_rx_buf[sizeof(TEST_STRING) + 1]; /**< RX buffer. */
  54. static const uint8_t m_length = sizeof(m_tx_buf); /**< Transfer length. */
  55. static volatile bool spis_xfer_done; /**< Flag used to indicate that SPIS instance completed the transfer. */
  56. /**
  57. * @brief SPIS user event handler.
  58. *
  59. * @param event
  60. */
  61. void spis_event_handler(nrf_drv_spis_event_t event)
  62. {
  63. if (event.evt_type == NRF_DRV_SPIS_XFER_DONE)
  64. {
  65. spis_xfer_done = true;
  66. NRF_LOG_INFO(" Transfer completed. Received: %s",(uint32_t)m_rx_buf);
  67. }
  68. }
  69. int main(void)
  70. {
  71. // Enable the constant latency sub power mode to minimize the time it takes
  72. // for the SPIS peripheral to become active after the CSN line is asserted
  73. // (when the CPU is in sleep mode).
  74. NRF_POWER->TASKS_CONSTLAT = 1;
  75. bsp_board_init(BSP_INIT_LEDS);
  76. APP_ERROR_CHECK(NRF_LOG_INIT(NULL));
  77. NRF_LOG_DEFAULT_BACKENDS_INIT();
  78. NRF_LOG_INFO("SPIS example");
  79. nrf_drv_spis_config_t spis_config = NRF_DRV_SPIS_DEFAULT_CONFIG;
  80. spis_config.csn_pin = APP_SPIS_CS_PIN;
  81. spis_config.miso_pin = APP_SPIS_MISO_PIN;
  82. spis_config.mosi_pin = APP_SPIS_MOSI_PIN;
  83. spis_config.sck_pin = APP_SPIS_SCK_PIN;
  84. APP_ERROR_CHECK(nrf_drv_spis_init(&spis, &spis_config, spis_event_handler));
  85. while (1)
  86. {
  87. memset(m_rx_buf, 0, m_length);
  88. spis_xfer_done = false;
  89. APP_ERROR_CHECK(nrf_drv_spis_buffers_set(&spis, m_tx_buf, m_length, m_rx_buf, m_length));
  90. while (!spis_xfer_done)
  91. {
  92. __WFE();
  93. }
  94. NRF_LOG_FLUSH();
  95. bsp_board_led_invert(BSP_BOARD_LED_0);
  96. }
  97. }