main.c 5.2 KB

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  1. /**
  2. * Copyright (c) 2016 - 2020, Nordic Semiconductor ASA
  3. *
  4. * All rights reserved.
  5. *
  6. * Redistribution and use in source and binary forms, with or without modification,
  7. * are permitted provided that the following conditions are met:
  8. *
  9. * 1. Redistributions of source code must retain the above copyright notice, this
  10. * list of conditions and the following disclaimer.
  11. *
  12. * 2. Redistributions in binary form, except as embedded into a Nordic
  13. * Semiconductor ASA integrated circuit in a product or a software update for
  14. * such product, must reproduce the above copyright notice, this list of
  15. * conditions and the following disclaimer in the documentation and/or other
  16. * materials provided with the distribution.
  17. *
  18. * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
  19. * contributors may be used to endorse or promote products derived from this
  20. * software without specific prior written permission.
  21. *
  22. * 4. This software, with or without modification, must only be used with a
  23. * Nordic Semiconductor ASA integrated circuit.
  24. *
  25. * 5. Any software provided in binary form under this license must not be reverse
  26. * engineered, decompiled, modified and/or disassembled.
  27. *
  28. * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
  29. * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  30. * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
  31. * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
  32. * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  33. * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
  34. * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  35. * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  36. * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
  37. * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  38. *
  39. */
  40. /** @file
  41. * @defgroup qspi_example_main main.c
  42. * @{
  43. * @ingroup qspi_example
  44. *
  45. * @brief QSPI Example Application main file.
  46. *
  47. * This file contains the source code for a sample application using QSPI.
  48. */
  49. #include <stdio.h>
  50. #include <string.h>
  51. #include <stdlib.h>
  52. #include "nrf_drv_qspi.h"
  53. #include "nrf_delay.h"
  54. #include "app_util_platform.h"
  55. #include "app_error.h"
  56. #include "boards.h"
  57. #include "nrf_log.h"
  58. #include "nrf_log_ctrl.h"
  59. #include "nrf_log_default_backends.h"
  60. #include "sdk_config.h"
  61. #define QSPI_STD_CMD_WRSR 0x01
  62. #define QSPI_STD_CMD_RSTEN 0x66
  63. #define QSPI_STD_CMD_RST 0x99
  64. #define QSPI_TEST_DATA_SIZE 256
  65. #define WAIT_FOR_PERIPH() do { \
  66. while (!m_finished) {} \
  67. m_finished = false; \
  68. } while (0)
  69. static volatile bool m_finished = false;
  70. static uint8_t m_buffer_tx[QSPI_TEST_DATA_SIZE];
  71. static uint8_t m_buffer_rx[QSPI_TEST_DATA_SIZE];
  72. static void qspi_handler(nrf_drv_qspi_evt_t event, void * p_context)
  73. {
  74. UNUSED_PARAMETER(event);
  75. UNUSED_PARAMETER(p_context);
  76. m_finished = true;
  77. }
  78. static void configure_memory()
  79. {
  80. uint8_t temporary = 0x40;
  81. uint32_t err_code;
  82. nrf_qspi_cinstr_conf_t cinstr_cfg = {
  83. .opcode = QSPI_STD_CMD_RSTEN,
  84. .length = NRF_QSPI_CINSTR_LEN_1B,
  85. .io2_level = true,
  86. .io3_level = true,
  87. .wipwait = true,
  88. .wren = true
  89. };
  90. // Send reset enable
  91. err_code = nrf_drv_qspi_cinstr_xfer(&cinstr_cfg, NULL, NULL);
  92. APP_ERROR_CHECK(err_code);
  93. // Send reset command
  94. cinstr_cfg.opcode = QSPI_STD_CMD_RST;
  95. err_code = nrf_drv_qspi_cinstr_xfer(&cinstr_cfg, NULL, NULL);
  96. APP_ERROR_CHECK(err_code);
  97. // Switch to qspi mode
  98. cinstr_cfg.opcode = QSPI_STD_CMD_WRSR;
  99. cinstr_cfg.length = NRF_QSPI_CINSTR_LEN_2B;
  100. err_code = nrf_drv_qspi_cinstr_xfer(&cinstr_cfg, &temporary, NULL);
  101. APP_ERROR_CHECK(err_code);
  102. }
  103. int main(void)
  104. {
  105. uint32_t i;
  106. uint32_t err_code;
  107. err_code = NRF_LOG_INIT(NULL);
  108. APP_ERROR_CHECK(err_code);
  109. NRF_LOG_DEFAULT_BACKENDS_INIT();
  110. NRF_LOG_INFO(""
  111. "QSPI write and read example using 24bit addressing mode");
  112. srand(0);
  113. for (i = 0; i < QSPI_TEST_DATA_SIZE; ++i)
  114. {
  115. m_buffer_tx[i] = (uint8_t)rand();
  116. }
  117. nrf_drv_qspi_config_t config = NRF_DRV_QSPI_DEFAULT_CONFIG;
  118. err_code = nrf_drv_qspi_init(&config, qspi_handler, NULL);
  119. APP_ERROR_CHECK(err_code);
  120. NRF_LOG_INFO("QSPI example started.");
  121. configure_memory();
  122. m_finished = false;
  123. err_code = nrf_drv_qspi_erase(NRF_QSPI_ERASE_LEN_64KB, 0);
  124. APP_ERROR_CHECK(err_code);
  125. WAIT_FOR_PERIPH();
  126. NRF_LOG_INFO("Process of erasing first block start");
  127. err_code = nrf_drv_qspi_write(m_buffer_tx, QSPI_TEST_DATA_SIZE, 0);
  128. APP_ERROR_CHECK(err_code);
  129. WAIT_FOR_PERIPH();
  130. NRF_LOG_INFO("Process of writing data start");
  131. err_code = nrf_drv_qspi_read(m_buffer_rx, QSPI_TEST_DATA_SIZE, 0);
  132. WAIT_FOR_PERIPH();
  133. NRF_LOG_INFO("Data read");
  134. NRF_LOG_INFO("Compare...");
  135. if (memcmp(m_buffer_tx, m_buffer_rx, QSPI_TEST_DATA_SIZE) == 0)
  136. {
  137. NRF_LOG_INFO("Data consistent");
  138. }
  139. else
  140. {
  141. NRF_LOG_INFO("Data inconsistent");
  142. }
  143. nrf_drv_qspi_uninit();
  144. for (;;)
  145. {
  146. }
  147. }
  148. /** @} */