main.c 9.5 KB

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  1. /**
  2. * Copyright (c) 2014 - 2020, Nordic Semiconductor ASA
  3. *
  4. * All rights reserved.
  5. *
  6. * Redistribution and use in source and binary forms, with or without modification,
  7. * are permitted provided that the following conditions are met:
  8. *
  9. * 1. Redistributions of source code must retain the above copyright notice, this
  10. * list of conditions and the following disclaimer.
  11. *
  12. * 2. Redistributions in binary form, except as embedded into a Nordic
  13. * Semiconductor ASA integrated circuit in a product or a software update for
  14. * such product, must reproduce the above copyright notice, this list of
  15. * conditions and the following disclaimer in the documentation and/or other
  16. * materials provided with the distribution.
  17. *
  18. * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
  19. * contributors may be used to endorse or promote products derived from this
  20. * software without specific prior written permission.
  21. *
  22. * 4. This software, with or without modification, must only be used with a
  23. * Nordic Semiconductor ASA integrated circuit.
  24. *
  25. * 5. Any software provided in binary form under this license must not be reverse
  26. * engineered, decompiled, modified and/or disassembled.
  27. *
  28. * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
  29. * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  30. * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
  31. * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
  32. * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  33. * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
  34. * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  35. * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  36. * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
  37. * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  38. *
  39. */
  40. /** @file
  41. *
  42. * @defgroup ppi_example_main main.c
  43. * @{
  44. * @ingroup ppi_example
  45. * @brief PPI Example Application main file.
  46. *
  47. * This file contains the source code for a sample application using PPI to communicate between timers.
  48. *
  49. */
  50. #include <stdint.h>
  51. #include "nrf_delay.h"
  52. #include "app_error.h"
  53. #include "nrf_drv_ppi.h"
  54. #include "nrf_drv_timer.h"
  55. #include "nrf_log.h"
  56. #include "nrf_log_ctrl.h"
  57. #include "nrf_log_default_backends.h"
  58. #define PPI_EXAMPLE_TIMERS_PHASE_SHIFT_DELAY (10) // 1s = 10 * 100ms (Timer 0 interrupt)
  59. #define PPI_EXAMPLE_TIMER0_INTERVAL (100) // Timer interval in milliseconds
  60. #define PPI_EXAMPLE_TIMER1_INTERVAL (2000) // Timer interval in milliseconds
  61. #define PPI_EXAMPLE_TIMER2_INTERVAL (2000) // Timer interval in milliseconds
  62. static const nrf_drv_timer_t m_timer0 = NRF_DRV_TIMER_INSTANCE(0);
  63. static const nrf_drv_timer_t m_timer1 = NRF_DRV_TIMER_INSTANCE(1);
  64. static const nrf_drv_timer_t m_timer2 = NRF_DRV_TIMER_INSTANCE(2);
  65. static nrf_ppi_channel_t m_ppi_channel1;
  66. static nrf_ppi_channel_t m_ppi_channel2;
  67. static volatile uint32_t m_counter;
  68. static void timer0_event_handler(nrf_timer_event_t event_type, void * p_context)
  69. {
  70. ++m_counter;
  71. }
  72. /* Timer event handler. Not used since Timer1 and Timer2 are used only for PPI. */
  73. static void empty_timer_handler(nrf_timer_event_t event_type, void * p_context)
  74. {
  75. }
  76. /** @brief Function for initializing the PPI peripheral.
  77. */
  78. static void ppi_init(void)
  79. {
  80. uint32_t err_code = NRF_SUCCESS;
  81. err_code = nrf_drv_ppi_init();
  82. APP_ERROR_CHECK(err_code);
  83. /* Configure 1st available PPI channel to stop TIMER0 counter on TIMER1 COMPARE[0] match,
  84. * which is every even number of seconds.
  85. */
  86. err_code = nrf_drv_ppi_channel_alloc(&m_ppi_channel1);
  87. APP_ERROR_CHECK(err_code);
  88. err_code = nrf_drv_ppi_channel_assign(m_ppi_channel1,
  89. nrf_drv_timer_event_address_get(&m_timer1,
  90. NRF_TIMER_EVENT_COMPARE0),
  91. nrf_drv_timer_task_address_get(&m_timer0,
  92. NRF_TIMER_TASK_STOP));
  93. APP_ERROR_CHECK(err_code);
  94. /* Configure 2nd available PPI channel to start TIMER0 counter at TIMER2 COMPARE[0] match,
  95. * which is every odd number of seconds.
  96. */
  97. err_code = nrf_drv_ppi_channel_alloc(&m_ppi_channel2);
  98. APP_ERROR_CHECK(err_code);
  99. err_code = nrf_drv_ppi_channel_assign(m_ppi_channel2,
  100. nrf_drv_timer_event_address_get(&m_timer2,
  101. NRF_TIMER_EVENT_COMPARE0),
  102. nrf_drv_timer_task_address_get(&m_timer0,
  103. NRF_TIMER_TASK_START));
  104. APP_ERROR_CHECK(err_code);
  105. // Enable both configured PPI channels
  106. err_code = nrf_drv_ppi_channel_enable(m_ppi_channel1);
  107. APP_ERROR_CHECK(err_code);
  108. err_code = nrf_drv_ppi_channel_enable(m_ppi_channel2);
  109. APP_ERROR_CHECK(err_code);
  110. }
  111. /** @brief Function for Timer 0 initialization.
  112. * @details Timer 0 will be stopped and started by Timer 1 and Timer 2 respectively using PPI.
  113. * It is configured to generate an interrupt every 100ms.
  114. */
  115. static void timer0_init(void)
  116. {
  117. // Check TIMER0 configuration for details.
  118. nrf_drv_timer_config_t timer_cfg = NRF_DRV_TIMER_DEFAULT_CONFIG;
  119. timer_cfg.frequency = NRF_TIMER_FREQ_31250Hz;
  120. ret_code_t err_code = nrf_drv_timer_init(&m_timer0, &timer_cfg, timer0_event_handler);
  121. APP_ERROR_CHECK(err_code);
  122. nrf_drv_timer_extended_compare(&m_timer0,
  123. NRF_TIMER_CC_CHANNEL0,
  124. nrf_drv_timer_ms_to_ticks(&m_timer0,
  125. PPI_EXAMPLE_TIMER0_INTERVAL),
  126. NRF_TIMER_SHORT_COMPARE0_CLEAR_MASK,
  127. true);
  128. }
  129. /** @brief Function for Timer 1 initialization.
  130. * @details Initializes TIMER1 peripheral to generate an event every 2 seconds. The events are
  131. * generated at even numbers of seconds after starting the example (2, 4, 6 ...) and they
  132. * are used to stop TIMER0 via PPI: TIMER1->EVENT_COMPARE[0] triggers TIMER0->TASK_STOP.
  133. */
  134. static void timer1_init(void)
  135. {
  136. // Check TIMER1 configuration for details.
  137. nrf_drv_timer_config_t timer_cfg = NRF_DRV_TIMER_DEFAULT_CONFIG;
  138. timer_cfg.frequency = NRF_TIMER_FREQ_31250Hz;
  139. ret_code_t err_code = nrf_drv_timer_init(&m_timer1, &timer_cfg, empty_timer_handler);
  140. APP_ERROR_CHECK(err_code);
  141. nrf_drv_timer_extended_compare(&m_timer1,
  142. NRF_TIMER_CC_CHANNEL0,
  143. nrf_drv_timer_ms_to_ticks(&m_timer1,
  144. PPI_EXAMPLE_TIMER1_INTERVAL),
  145. NRF_TIMER_SHORT_COMPARE0_CLEAR_MASK,
  146. false);
  147. }
  148. /** @brief Function for Timer 2 initialization.
  149. * @details Initializes TIMER2 peripheral to generate an event every 2 seconds. The events are
  150. * generated at odd numbers of seconds after starting the example (3, 5, 7 ...) and they
  151. * are used to start TIMER0 via PPI: TIMER2->EVENT_COMPARE[0] triggers TIMER0->TASK_START.
  152. */
  153. static void timer2_init(void)
  154. {
  155. // Check TIMER2 configuration for details.
  156. nrf_drv_timer_config_t timer_cfg = NRF_DRV_TIMER_DEFAULT_CONFIG;
  157. timer_cfg.frequency = NRF_TIMER_FREQ_31250Hz;
  158. ret_code_t err_code = nrf_drv_timer_init(&m_timer2, &timer_cfg, empty_timer_handler);
  159. APP_ERROR_CHECK(err_code);
  160. nrf_drv_timer_extended_compare(&m_timer2,
  161. NRF_TIMER_CC_CHANNEL0,
  162. nrf_drv_timer_ms_to_ticks(&m_timer2,
  163. PPI_EXAMPLE_TIMER2_INTERVAL),
  164. NRF_TIMER_SHORT_COMPARE0_CLEAR_MASK,
  165. false);
  166. }
  167. /**
  168. * @brief Function for application main entry.
  169. */
  170. int main(void)
  171. {
  172. uint32_t old_val = 0;
  173. uint32_t err_code;
  174. err_code = NRF_LOG_INIT(NULL);
  175. APP_ERROR_CHECK(err_code);
  176. NRF_LOG_DEFAULT_BACKENDS_INIT();
  177. ppi_init();
  178. timer0_init(); // Timer used to increase m_counter every 100ms.
  179. timer1_init(); // Timer to generate events on even number of seconds - stopping Timer 0
  180. timer2_init(); // Timer to generate events on odd number of seconds - starting Timer 0
  181. NRF_LOG_INFO("PPI example started.");
  182. // Start clock.
  183. nrf_drv_timer_enable(&m_timer0);
  184. /* Below delay is implemented to ensure that Timer0 interrupt will execute before PPI action.
  185. * Please be aware that such solution was tested only in this simple example code. In case
  186. * of more complex systems with higher level interrupts this may lead to not correct timers
  187. * synchronization.
  188. */
  189. nrf_delay_us(5);
  190. nrf_drv_timer_enable(&m_timer1);
  191. m_counter = (uint32_t)-PPI_EXAMPLE_TIMERS_PHASE_SHIFT_DELAY;
  192. // Timer 2 will start one second after Timer 1 (m_counter will equal 0 after 1s)
  193. while (m_counter != 0)
  194. {
  195. // just wait
  196. }
  197. nrf_drv_timer_enable(&m_timer2);
  198. while (true)
  199. {
  200. uint32_t counter = m_counter;
  201. if (old_val != counter)
  202. {
  203. old_val = counter;
  204. NRF_LOG_INFO("Current count: %u", counter);
  205. NRF_LOG_FLUSH();
  206. }
  207. }
  208. }
  209. /** @} */