add low power

smart_shoes/nRF5_SDK_17.0.0_9d13099/components/drivers_ext/mpu6050/mpu6050.c

@@ -572,6 +572,86 @@ int MPU6050ReadAcc(short *accData)
 }
 
 /**
+  * @brief   mpu6050进入睡眠模式
+  * @param   
+  * @retval  
+  */
+void MPU6050_sheep(void)
+{
+	MPU6050_WriteReg(MPU6050_RA_PWR_MGMT_1,0x80);//0x6f
+		nrf_delay_ms(100);
+	MPU6050_WriteReg(MPU6050_RA_PWR_MGMT_1,0x47);//0x6f
+}
+/**
+  * @brief   mpu6050进入睡眠模式
+  * @param   
+  * @retval  
+  */
+void MPU6050_awaken(void)
+{
+	uint8_t buf;
+  if(!MPU6050_ReadData(MPU6050_RA_PWR_MGMT_1, &buf,1))
+	MPU6050_WriteReg(MPU6050_RA_PWR_MGMT_1,buf &= ~(0x01<<MPU6050_PWR1_SLEEP_BIT));	
+}
+
+
+/**
+  * @brief   初始化MPU6050芯片
+  * @param   
+  * @retval  
+  */
+void MPU6050_Wai_on_Motion(void)
+{
+	uint8_t buf;
+//		MPU6050_WriteReg(MPU6050_RA_PWR_MGMT_1,0x80);//0x6f
+//		nrf_delay_ms(100);
+	//运动中断
+//	MPU6050_WriteReg(MPU6050_RA_MOT_THR, 0x00);	    //运动检测阈值
+//	MPU6050_WriteReg(MPU6050_RA_MOT_DUR, 0x01);	//连续时间阈值ms
+	//静止中断
+//	MPU6050_WriteReg(MPU6050_RA_ZRMOT_THR, 0x01);	    //静止检测阈值
+//	MPU6050_WriteReg(MPU6050_RA_ZRMOT_DUR, 0x01);	//连续时间阈值ms
+	
+	
+	 if(!MPU6050_ReadData(MPU6050_RA_PWR_MGMT_1, &buf,1))
+	 {
+		 buf |= 0x01<<MPU6050_PWR1_CYCLE_BIT;
+		 MPU6050_WriteReg(MPU6050_RA_PWR_MGMT_1,buf);	
+//		 buf |= 0x01<<MPU6050_PWR1_SLEEP_BIT;
+//		 MPU6050_WriteReg(MPU6050_RA_PWR_MGMT_1,buf);	
+		 buf |= 0x01<<MPU6050_PWR1_TEMP_DIS_BIT;
+		MPU6050_WriteReg(MPU6050_RA_PWR_MGMT_1,buf);	
+	 }	
+	
+		//运动中断
+	MPU6050_WriteReg(MPU6050_RA_MOT_THR, 0x00);	    //运动检测阈值
+	MPU6050_WriteReg(MPU6050_RA_MOT_DUR, 0x01);	//连续时间阈值ms
+	
+	MPU6050_WriteReg(MPU6050_RA_PWR_MGMT_2,0x1f);//关闭陀螺仪
+	
+	MPU6050_WriteReg(MPU6050_RA_CONFIG , 0x04);
+	MPU6050_WriteReg(MPU6050_RA_ACCEL_CONFIG , 0x1c);//加速度量程和高通滤波器设置
+	MPU6050_WriteReg(MPU6050_RA_INT_PIN_CFG , 0x1c);
+	MPU6050_WriteReg(MPU6050_RA_INT_ENABLE , 0x40);
+}
+
+
+void MPU6050_Low_power_Acc(void)
+{
+	uint8_t buf;
+	MPU6050_WriteReg(MPU6050_RA_PWR_MGMT_2,0x1f);//关闭陀螺仪
+	if(!MPU6050_ReadData(MPU6050_RA_PWR_MGMT_1, &buf,1))
+	 {
+		 buf |= 0x01<<MPU6050_PWR1_CYCLE_BIT;
+		 MPU6050_WriteReg(MPU6050_RA_PWR_MGMT_1,buf);	
+		 buf |= 0x01<<MPU6050_PWR1_TEMP_DIS_BIT;
+		 MPU6050_WriteReg(MPU6050_RA_PWR_MGMT_1,buf);	
+	 }	
+}
+
+
+
+/**
   * @brief   读取MPU6050的角加速度数据
   * @param   
   * @retval  

smart_shoes/nRF5_SDK_17.0.0_9d13099/components/drivers_ext/mpu6050/mpu6050.h

@@ -391,7 +391,9 @@ int MPU6050ReadGyro(short *gyroData);
 int MPU6050ReadTemp(short *tempData);
 int MPU6050_ReturnTemp(float *Temperature);
 int mpu6050_get_reg_data(short *gyro, short *accel);
-
-
+void MPU6050_sheep(void);
+void MPU6050_awaken(void);
+void MPU6050_Wai_on_Motion(void);
+void MPU6050_Low_power_Acc(void);
 
 #endif  /*__MPU6050*/

smart_shoes/nRF5_SDK_17.0.0_9d13099/examples/Shoes_just_traj_20201208/.gitignore

@@ -0,0 +1,34 @@
+# ---> C
+# Object files
+*.o
+*.ko
+*.obj
+*.elf
+
+# Precompiled Headers
+*.gch
+*.pch
+
+# Libraries
+*.lib
+*.a
+*.la
+*.lo
+
+# Shared objects (inc. Windows DLLs)
+*.dll
+*.so
+*.so.*
+*.dylib
+
+# Executables
+*.exe
+*.out
+*.app
+*.i*86
+*.x86_64
+*.hex
+
+# Debug files
+*.dSYM/
+

smart_shoes/nRF5_SDK_17.0.0_9d13099/examples/Shoes_just_traj_20201208/README.md

@@ -0,0 +1,3 @@
+# OuShoes_Old
+
+智能鞋子，老工程

smart_shoes/nRF5_SDK_17.0.0_9d13099/examples/Shoes_just_traj_20201208/ble_app_uart_03_link_PC/User_Sleep.c

@@ -0,0 +1,161 @@
+
+/*********************************************************************
+ * 
+ * 文件名：  User_Wdt.c
+ * 功能描述：低功耗功能管理
+ * 作者：    陈俊超
+ * 时间：2020-11-20
+ * 
+ ********************************************************************/
+
+#include "User_Sleep.h"
+#include "nrf_pwr_mgmt.h"
+#include "nrf_drv_clock.h"
+#include "nrf_gpio.h"
+#include "app_timer.h"
+#include "nrf_drv_rtc.h"
+#include "nrf_drv_clock.h"
+#include "nrf_drv_gpiote.h"
+#include "app_uart.h"
+
+/********************** 变量区 **************************************/
+#define RAM_RETENTION_OFF       (0x00000003UL)  /**< The flag used to turn off RAM retention on nRF52. */
+const nrf_drv_rtc_t rtc = NRF_DRV_RTC_INSTANCE(2); /**< Declaring an instance of nrf_drv_rtc for RTC2. */
+#define COMPARE_COUNTERTIME  (10UL)               /**< Get Compare event COMPARE_TIME seconds after the counter starts from 0. */
+bool lowpowermode=false;//低功耗标志位
+
+/********************** 函数功能区 **************************************/
+extern void close_timer(void);
+
+extern void open_timer(void);
+/**********************************************************
+ * 函数名字：SleepMode_init
+ * 函数作用：看门狗初始化
+ * 函数参数：无
+ * 函数返回值：无
+ ***********************************************************/
+void SleepMode_init(void)
+{
+	  
+}
+
+/**********************************************************
+ * 函数名字：low_power_in
+ * 函数作用：关闭IO口和串口，进入低电量模式
+ * 函数参数：无
+ * 函数返回值：无
+ ***********************************************************/
+void low_power_in(void)
+{	
+	if(!lowpowermode)
+	{
+		nrf_drv_gpiote_out_set(PIN_OUT);	
+		nrf_drv_gpiote_out_uninit(PIN_OUT);//
+		app_uart_close();
+		close_timer();
+		lowpowermode=true;
+	}
+}
+
+/**********************************************************
+ * 函数名字：low_power_out
+ * 函数作用：关闭IO口和串口，进入低电量模式
+ * 函数参数：无
+ * 函数返回值：无
+ ***********************************************************/
+void low_power_out(void)
+{	
+	if(lowpowermode)
+	{
+		nrf_drv_gpiote_out_config_t out_config = GPIOTE_CONFIG_OUT_SIMPLE(false);
+        nrf_drv_gpiote_out_init(PIN_OUT, &out_config);
+		nrf_drv_gpiote_out_set(PIN_OUT);
+		uart_init();
+		advertising_start();
+		nrf_gpio_pin_clear(PIN_OUT);
+		open_timer();
+		lowpowermode=false;
+	}
+}
+
+static void rtc_handler(nrf_drv_rtc_int_type_t int_type)
+{
+	static int cun=0;
+    if (int_type == NRF_DRV_RTC_INT_COMPARE0)
+    {
+   //   nrf_gpio_pin_toggle(PIN_OUT);
+		//	advertising_start();
+		//	printf("rtc_handler...NRF_DRV_RTC_INT_COMPARE0 \r\n");	
+    }
+    else if (int_type == NRF_DRV_RTC_INT_TICK)
+    {
+   //   
+			cun++;
+			if(cun%(8*5)==0)
+			{				
+				low_power_out();				
+//				printf("rtc_handler...NRF_DRV_RTC_INT_TICK \r\n");
+			}
+    }
+}
+
+/**********************************************************
+ * 函数名字：rtc_config
+ * 函数作用：rtc驱动初始化和设置
+ * 函数参数：无
+ * 函数返回值：无
+ ***********************************************************/
+void rtc_config(void)
+{
+    uint32_t err_code;
+
+    //Initialize RTC instance
+    nrf_drv_rtc_config_t config = NRF_DRV_RTC_DEFAULT_CONFIG;
+    config.prescaler = 8191;//4095;????????=32768/(config.prescaler+1)Hz;
+    err_code = nrf_drv_rtc_init(&rtc, &config, rtc_handler);
+    APP_ERROR_CHECK(err_code);
+
+    //Enable tick event & interrupt
+    nrf_drv_rtc_tick_enable(&rtc,true);
+
+    //Set compare channel to trigger interrupt after COMPARE_COUNTERTIME seconds
+    err_code = nrf_drv_rtc_cc_set(&rtc,0,COMPARE_COUNTERTIME * 8,true);
+    APP_ERROR_CHECK(err_code);
+
+    //Power on RTC instance
+    nrf_drv_rtc_enable(&rtc);
+}
+
+/**********************************************************
+ * 函数名字：IntoSystemOffMode
+ * 函数作用：进入SystemOff超低功耗模式
+ * 注意：    该模式下唤醒设备将会重启
+ * 函数参数：无
+ * 函数返回值：无
+ ***********************************************************/
+void IntoSystemOffMode(void)
+{
+      nrf_gpio_cfg_sense_input(WakeUp_PIN, NRF_GPIO_PIN_PULLUP, NRF_GPIO_PIN_SENSE_LOW );
+      
+	    app_uart_close();//关闭串口
+      #ifdef NRF51
+         NRF_POWER->RAMON |= (POWER_RAMON_OFFRAM0_RAM0Off << POWER_RAMON_OFFRAM0_Pos) |
+                        (POWER_RAMON_OFFRAM1_RAM1Off << POWER_RAMON_OFFRAM1_Pos);
+      #endif //NRF51
+      #ifdef NRF52
+            NRF_POWER->RAM[0].POWER = RAM_RETENTION_OFF;
+            NRF_POWER->RAM[1].POWER = RAM_RETENTION_OFF;
+            NRF_POWER->RAM[2].POWER = RAM_RETENTION_OFF;
+            NRF_POWER->RAM[3].POWER = RAM_RETENTION_OFF;
+            NRF_POWER->RAM[4].POWER = RAM_RETENTION_OFF;
+            NRF_POWER->RAM[5].POWER = RAM_RETENTION_OFF;
+            NRF_POWER->RAM[6].POWER = RAM_RETENTION_OFF;
+            NRF_POWER->RAM[7].POWER = RAM_RETENTION_OFF;
+      #endif //NRF52
+
+    NRF_POWER->SYSTEMOFF = 0x1;
+    (void) NRF_POWER->SYSTEMOFF;
+    while (true);
+}
+
+

smart_shoes/nRF5_SDK_17.0.0_9d13099/examples/Shoes_just_traj_20201208/ble_app_uart_03_link_PC/User_Sleep.h

@@ -0,0 +1,17 @@
+#ifndef  _H_USER_SLEEP_H_
+#define  _H_USER_SLEEP_H_
+
+#include "main.h"
+#include "nrf_drv_gpiote.h"
+#define WakeUp_PIN  3//唤醒引脚
+#define PIN_OUT  10//版本2                  16//方形板  
+
+void SleepMode_init(void);
+void IntoSystemOffMode(void);
+void rtc_config(void);
+void low_power_in(void);
+void low_power_out(void);
+
+#define RXON 		nrf_drv_gpiote_out_set(WakeUp_PIN);//打开rX				
+#define RXOFF 		nrf_drv_gpiote_out_clear(WakeUp_PIN);//打开rX								
+#endif

smart_shoes/nRF5_SDK_17.0.0_9d13099/examples/Shoes_just_traj_20201208/ble_app_uart_03_link_PC/app.c

@@ -0,0 +1,903 @@
+#include "app.h"
+struct 
+{
+	unsigned char systemtime_minute;//距离上一个整点的分钟数
+	unsigned char xiema;//鞋码
+	unsigned char software_ver[2];//软件版本
+	unsigned char hardware_ver[2];//硬件版本
+	unsigned char power;//电量
+	unsigned char time_of_end;//续航时间
+	unsigned char inner_temperature;//内部温度
+	unsigned char pressure[4];//压力
+}pm;
+struct
+{
+	unsigned char power;//电量
+	unsigned char time_of_end;//续航时间
+	unsigned char inner_temperature;//内部温度
+	unsigned char pressure[4];//压力
+}pm_other;
+//。。。。。。。。。。。。。。。。。。。。。。。。。。。。
+//
+const char *fds_err_str(ret_code_t ret)
+{
+    /* Array to map FDS return values to strings. */
+    static char const * err_str[] =
+    {
+        "FDS_ERR_OPERATION_TIMEOUT",
+        "FDS_ERR_NOT_INITIALIZED",
+        "FDS_ERR_UNALIGNED_ADDR",
+        "FDS_ERR_INVALID_ARG",
+        "FDS_ERR_NULL_ARG",
+        "FDS_ERR_NO_OPEN_RECORDS",
+        "FDS_ERR_NO_SPACE_IN_FLASH",
+        "FDS_ERR_NO_SPACE_IN_QUEUES",
+        "FDS_ERR_RECORD_TOO_LARGE",
+        "FDS_ERR_NOT_FOUND",
+        "FDS_ERR_NO_PAGES",
+        "FDS_ERR_USER_LIMIT_REACHED",
+        "FDS_ERR_CRC_CHECK_FAILED",
+        "FDS_ERR_BUSY",
+        "FDS_ERR_INTERNAL",
+    };
+    return err_str[ret - NRF_ERROR_FDS_ERR_BASE];
+}
+
+
+
+typedef struct
+{
+  uint32_t     	device_name;		
+	unsigned char model_number[64];//设备型号
+	unsigned char systemtime[8];//系统时间
+} configuration_t;//需要写到flish中的数据
+
+/* 出工厂参数 */
+static const configuration_t m_dummy_cfg =
+{
+  .device_name =0x123456,
+	.model_number = "smart shose",	
+};
+configuration_t cf;
+
+/* A record containing dummy configuration data. */
+static fds_record_t const m_dummy_record =
+{
+    .file_id           = CONFIG_FILE,
+    .key               = CONFIG_REC_KEY,
+    .data.p_data       = &m_dummy_cfg,
+    /* The length of a record is always expressed in 4-byte units (words). */
+    .data.length_words = (sizeof(m_dummy_cfg) + 3) / sizeof(uint32_t),
+};
+
+
+
+/* Array to map FDS events to strings. */
+static char const * fds_evt_str[] =
+{
+    "FDS_EVT_INIT",
+    "FDS_EVT_WRITE",
+    "FDS_EVT_UPDATE",
+    "FDS_EVT_DEL_RECORD",
+    "FDS_EVT_DEL_FILE",
+    "FDS_EVT_GC",
+};
+extern uint32_t app_uart_put(uint8_t byte);
+void send_uart(unsigned char *bytes,int len)
+{
+	for(int i=0;i<len;i++)
+	{
+		app_uart_put(bytes[i]);
+	}
+}
+
+//加上帧头发送到串口
+void send_to_uart_AABBCC(uint8_t index,uint8_t cmd,uint8_t* dat,uint8_t datLen)
+{
+//	uint32_t err_code;
+	uint8_t buf[50];
+	uint16_t L=0;
+	
+	
+	uint16_t Len = datLen+5;
+	
+	uint8_t i;
+	uint8_t ver = 0;
+	if(Len>50) return;
+	buf[L++] = 0xAA;  ver += 0xAA;	//帧头
+	buf[L++] = Len;   ver += Len;	//长度
+	buf[L++] = ~Len;  ver += (~Len);//长度反码
+	buf[L++] = cmd;   ver += cmd;	//命令
+	for(i=0;i<datLen;i++){ buf[L++] = dat[i]; ver += dat[i];} //数据
+	buf[L++] = ver;   				//校验
+	
+		wakeop_rx();
+		nrf_delay_ms(10);
+	app_uart_put(0x01);
+	for(i=0;i<L;i++)		app_uart_put(buf[i]);	  //串口输出数据
+}
+
+void showflishinfo(void)
+{
+		ret_code_t rc;
+		fds_stat_t stat = {0};
+    rc = fds_stat(&stat);//设置统计数据
+    APP_ERROR_CHECK(rc);
+		
+		//清风带你学蓝牙下册270页有详细讲解
+		NRF_LOG_INFO("pages_available = %d",stat.pages_available);
+		NRF_LOG_INFO("open_records = %d",stat.open_records);
+		NRF_LOG_INFO("valid_records = %d",stat.valid_records);
+		NRF_LOG_INFO("dirty_records = %d",stat.dirty_records);
+		NRF_LOG_INFO("words_reserved = %d",stat.words_reserved);
+		NRF_LOG_INFO("words_used = %d",stat.words_used);
+		NRF_LOG_INFO("largest_contig = %d",stat.largest_contig);
+		NRF_LOG_INFO("freeable_words = %d",stat.freeable_words);
+		NRF_LOG_INFO("done.\r\n");
+}
+///* Keep track of the progress of a delete_all operation. */
+//static struct
+//{
+//    bool delete_next;   //!< Delete next record.
+//    bool pending;       //!< Waiting for an fds FDS_EVT_DEL_RECORD event, to delete the next record.
+//} m_delete_all;
+char flashbusy=0;
+static void fds_evt_handler(fds_evt_t const * p_evt)
+{
+    if (p_evt->result == NRF_SUCCESS)
+    {
+			flashbusy=0;
+        NRF_LOG_INFO("Event: %s received (NRF_SUCCESS)",
+                      fds_evt_str[p_evt->id]);
+    }
+    else
+    {
+        NRF_LOG_INFO("Event: %s received (%s)",
+                      fds_evt_str[p_evt->id],
+                      fds_err_str(p_evt->result));
+    }
+
+    switch (p_evt->id)
+    {
+        case FDS_EVT_INIT:
+            if (p_evt->result == NRF_SUCCESS)
+            {
+                m_fds_initialized = true;
+            }
+            break;
+
+        case FDS_EVT_WRITE:
+					flashbusy=0;
+        {
+            if (p_evt->result == NRF_SUCCESS)
+            {
+                NRF_LOG_INFO("Record ID:\t0x%04x",  p_evt->write.record_id);
+                NRF_LOG_INFO("File ID:\t0x%04x",    p_evt->write.file_id);
+                NRF_LOG_INFO("Record key:\t0x%04x", p_evt->write.record_key);
+            }
+        } break;
+
+        case FDS_EVT_DEL_RECORD:
+					flashbusy=0;
+        {
+            if (p_evt->result == NRF_SUCCESS)
+            {
+                NRF_LOG_INFO("Record ID:\t0x%04x",  p_evt->del.record_id);
+                NRF_LOG_INFO("File ID:\t0x%04x",    p_evt->del.file_id);
+                NRF_LOG_INFO("Record key:\t0x%04x", p_evt->del.record_key);
+            }
+          //  m_delete_all.pending = false;
+        } break;
+
+        default:
+            break;
+    }
+}
+
+
+bool record_delete_next(void)
+{
+    ret_code_t rc;
+    fds_find_token_t  tok   = {0};
+    fds_record_desc_t desc  = {0};
+		rc = fds_record_find(CONFIG_FILE, CONFIG_REC_KEY, &desc, &tok);//查找配置文件记录
+    if (rc == NRF_SUCCESS)
+    {
+        ret_code_t rc = fds_record_delete(&desc);
+        if (rc != NRF_SUCCESS)
+        {
+            return false;
+        }
+        return true;
+    }
+    else
+    {
+        /* No records left to delete. */
+        return false;
+		} 
+}
+
+//每个Record最大保存1019个words 即4076byte 
+//FDS_VIRTUAL_PAGES 宏中记录了整个FDS的空间 = （FDS_VIRTUAL_PAGES - 1）*4076 byte
+void config_file_init(void)
+{
+   ret_code_t rc;
+//	 uint32_t *data;
+  (void) fds_register(fds_evt_handler);//FDS注册
+	  rc = fds_init();//fds初始化
+	
+    APP_ERROR_CHECK(rc);
+	
+	  while (!m_fds_initialized)//等待初始化完成
+    {
+        sd_app_evt_wait();//等待过程中待机
+    }		
+		
+	  fds_stat_t stat = {0};
+    rc = fds_stat(&stat);//设置统计数据
+    APP_ERROR_CHECK(rc);
+		
+		//清风带你学蓝牙下册270页有详细讲解
+//		NRF_LOG_INFO("\r\n");
+//		NRF_LOG_INFO("fds info");
+//		NRF_LOG_INFO("pages_available = %d",stat.pages_available);
+//		NRF_LOG_INFO("open_records = %d",stat.open_records);
+//		NRF_LOG_INFO("valid_records = %d",stat.valid_records);
+//		NRF_LOG_INFO("dirty_records = %d",stat.dirty_records);
+//		NRF_LOG_INFO("words_reserved = %d",stat.words_reserved);
+//		NRF_LOG_INFO("words_used = %d",stat.words_used);
+//		NRF_LOG_INFO("largest_contig = %d",stat.largest_contig);
+//		NRF_LOG_INFO("freeable_words = %d",stat.freeable_words);
+//		NRF_LOG_INFO("done.\r\n");
+					
+		fds_record_desc_t desc = {0};//用来操作记录的描述符结构清零
+    fds_find_token_t  tok  = {0};//保存秘钥的令牌清零
+		
+
+    rc = fds_record_find(CONFIG_FILE, CONFIG_REC_KEY, &desc, &tok);//对应KEY记录查找数据
+		
+		
+		if (rc == NRF_SUCCESS)//如果查找成功
+    {
+        /* A config file is in flash. Let's update it. */
+        fds_flash_record_t config = {0};//把配置清零
+
+        /* Open the record and read its contents. */
+        rc = fds_record_open(&desc, &config);//打开记录读取数据
+        APP_ERROR_CHECK(rc);
+				
+	//			NRF_LOG_INFO("Read DataLen = %d,config file len = %d",config.p_header->length_words,(sizeof(configuration_t)+3)/4);
+				
+				if(config.p_header->length_words != (sizeof(configuration_t)+3)/4)//判断一下读出来的参数结构体长度是否正确 
+				{
+					/* Close the record when done reading. */
+					rc = fds_record_close(&desc);//关闭记录
+					APP_ERROR_CHECK(rc);
+//					NRF_LOG_INFO("Update config file...");
+					//参数结构体不正确
+					record_delete_next();//把所有记录清零
+          rc = fds_record_write(&desc, &m_dummy_record);//重新写记录
+					APP_ERROR_CHECK(rc);
+					
+	//				NRF_LOG_INFO("Update config file..done.");
+					memcpy(&cf, &m_dummy_cfg,sizeof(configuration_t));//以出厂设置作为当前运行参数
+				}
+				else//读出来的长度一样，关闭记录
+				{
+					memcpy(&cf, config.p_data,sizeof(configuration_t));
+					rc = fds_record_close(&desc);//关闭记录
+					APP_ERROR_CHECK(rc);
+					
+	//				NRF_LOG_INFO("Data = ");
+//					data = (uint32_t *)config.p_data;
+//					for (uint16_t i=0;i<config.p_header->length_words;i++)
+//					{
+//						 NRF_LOG_INFO("0x%8x ",data[i]);//打印输出数据
+//					}
+	//				NRF_LOG_INFO("\r\n");				
+				}			
+    }
+    else
+    {
+        /* System config not found; write a new one. */
+        NRF_LOG_INFO("Writing config file...");
+
+        rc = fds_record_write(&desc, &m_dummy_record);//重新写记录
+        APP_ERROR_CHECK(rc);
+    }
+		
+	pm.software_ver[0]=1;
+	pm.software_ver[1]=2;
+	pm.hardware_ver[0]=1;
+	pm.hardware_ver[1]=4;
+		
+		
+}
+//。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。
+
+#define sportdatakey_file_id 0x2111 
+#define sportdatakey_rec_key 0x2323 
+#define step_number_length 24*30
+unsigned short  step_journey_cun=0;//总共保存的数据量
+unsigned int step_number[step_number_length];//用于记录步数和路程,高16位是步数，低16位是路程
+//void write_step_journey(unsigned short step_num,unsigned short jour)
+//{
+//	step_number[step_journey_cun] = (unsigned int)jour;
+//	step_number[step_journey_cun] |= ((unsigned int)step_num)<<16;
+//	step_journey_cun++;
+//	if(step_journey_cun >= step_number_length)step_journey_cun=0;
+//}
+//以增量方式添加步数和路程
+void add_step_journey(unsigned char step_c,unsigned short jour_c)
+{
+	unsigned short step = (step_number[step_journey_cun]&0xffff0000)>>16;
+	unsigned short journey = step_number[step_journey_cun]&0x0000ffff;
+	step += step_c;
+	journey += jour_c;
+	step_number[step_journey_cun] = (unsigned int)journey;
+	step_number[step_journey_cun] |= ((unsigned int)step)<<16;
+	NRF_LOG_INFO("add_step_journey -> step_number[step_journey_cun]=0x%8x ,step_journey_cun = %d",step_number[step_journey_cun],step_journey_cun);
+}
+
+int update_step_journey_work_statu=0;
+void update_step_journey_work(void)
+{		
+	ret_code_t rc;
+	fds_record_desc_t desc = {0};//用来操作记录的描述符结构清零
+  fds_find_token_t  tok  = {0};//保存秘钥的令牌清零
+	fds_record_t sportdatakey_record={0};
+	if(flashbusy==1)
+	{
+		
+		NRF_LOG_INFO("flashbusy.....return ");
+		return;//flish在忙，什么都不做
+	}
+	if(update_step_journey_work_statu==0)return;
+	NRF_LOG_INFO("update_step_journey_work_statu= %d ",update_step_journey_work_statu);
+	switch(update_step_journey_work_statu)
+	{
+		case 0://状态0，什么都不用做
+			break;
+		case 1://状态1，需要发送一次查询
+			rc = fds_record_find(sportdatakey_file_id, sportdatakey_rec_key, &desc, &tok);//对应KEY记录查找数据
+			switch(rc)
+			{
+				case FDS_ERR_NOT_FOUND:
+					NRF_LOG_INFO("->fds_record_find = FDS_ERR_NOT_FOUND");		
+					update_step_journey_work_statu=2;				
+					break;
+				case FDS_ERR_NOT_INITIALIZED:
+					NRF_LOG_INFO("->fds_record_find = FDS_ERR_NOT_INITIALIZED");
+					break;
+				case FDS_ERR_NULL_ARG:
+					NRF_LOG_INFO("->fds_record_find = FDS_ERR_NULL_ARG");
+					break;
+				case NRF_SUCCESS:				
+					NRF_LOG_INFO("->fds_record_find = NRF_SUCCESS");	
+					flashbusy = 1;
+					rc = fds_record_delete(&desc);				
+					APP_ERROR_CHECK(rc);			
+					update_step_journey_work_statu=2;
+					break;
+				default:NRF_LOG_INFO("->fds_record_find = 0x%8x \n",rc);
+					break;
+			}
+			break;
+		case 2://状态2，写						
+			memset(&desc,0,sizeof(fds_record_desc_t));
+			sportdatakey_record.file_id 					= sportdatakey_file_id;
+			sportdatakey_record.key 							= sportdatakey_rec_key;
+			sportdatakey_record.data.p_data				= (void*)step_number;
+			sportdatakey_record.data.length_words = (unsigned int)step_journey_cun;
+			rc = fds_record_write(&desc, &sportdatakey_record);//重新写记录
+			switch(rc)
+			{
+				case NRF_SUCCESS:
+					NRF_LOG_INFO("->fds_record_write = NRF_SUCCESS");	
+					update_step_journey_work_statu=3;
+					flashbusy = 1;	
+					break;
+				case FDS_ERR_NOT_INITIALIZED:
+					NRF_LOG_INFO("->fds_record_write = FDS_ERR_NOT_INITIALIZED");
+					break;
+				case FDS_ERR_NULL_ARG:
+					NRF_LOG_INFO("->fds_record_write = FDS_ERR_NULL_ARG");
+					break;
+				case FDS_ERR_INVALID_ARG:				
+					NRF_LOG_INFO("->fds_record_write = FDS_ERR_INVALID_ARG");						
+					break;
+				case FDS_ERR_UNALIGNED_ADDR:
+					NRF_LOG_INFO("->fds_record_write = FDS_ERR_UNALIGNED_ADDR");	
+					update_step_journey_work_statu=3;
+					break;
+				case FDS_ERR_RECORD_TOO_LARGE:
+					NRF_LOG_INFO("->fds_record_write = FDS_ERR_RECORD_TOO_LARGE");
+					break;
+				case FDS_ERR_NO_SPACE_IN_QUEUES:
+					NRF_LOG_INFO("->fds_record_write = FDS_ERR_NO_SPACE_IN_QUEUES");
+					break;
+				case FDS_ERR_NO_SPACE_IN_FLASH:				
+					NRF_LOG_INFO("->fds_record_write = FDS_ERR_NO_SPACE_IN_FLASH");
+					update_step_journey_work_statu = 4;				
+					break;
+				default:NRF_LOG_INFO("->fds_record_write = 0x%8x \n",rc);
+					break;
+			}
+			break;
+		case 3://状态3，读取写完的结果并校验数据
+			rc = fds_record_find(sportdatakey_file_id, sportdatakey_rec_key, &desc, &tok);//对应KEY记录查找数据
+			switch(rc)
+			{
+				case FDS_ERR_NOT_FOUND:
+					NRF_LOG_INFO("->fds_record_find = FDS_ERR_NOT_FOUND");							
+					break;
+				case FDS_ERR_NOT_INITIALIZED:
+					NRF_LOG_INFO("->fds_record_find = FDS_ERR_NOT_INITIALIZED");
+					break;
+				case FDS_ERR_NULL_ARG:
+					NRF_LOG_INFO("->fds_record_find = FDS_ERR_NULL_ARG");
+					break;
+				case NRF_SUCCESS:	NRF_LOG_INFO("->fds_record_find = NRF_SUCCESS");	
+				{															
+					fds_flash_record_t config = {0};//把配置清零
+					rc = fds_record_open(&desc, &config);//打开记录读取数据
+					APP_ERROR_CHECK(rc);				
+					step_journey_cun = config.p_header->length_words;
+//					memcpy(step_number,config.p_data,step_journey_cun*4);
+//					for(int i=0;i<step_journey_cun;i++)
+//					{
+//						NRF_LOG_INFO("0x%x",step_number[i]);
+//					}
+					rc = fds_record_close(&desc);//关闭记录
+					APP_ERROR_CHECK(rc);	
+				
+					update_step_journey_work_statu=0;		
+				}					
+					break;
+				default:NRF_LOG_INFO("->fds_record_find = 0x%8x \n",rc);
+					break;
+			}
+			break;
+		case 4:////状态4，垃圾回收
+			NRF_LOG_INFO("fds_gc");	
+			rc = fds_gc();//垃圾回收
+			switch(rc)
+			{
+				case NRF_SUCCESS:
+					NRF_LOG_INFO("->fds_gc = NRF_SUCCESS");	
+					update_step_journey_work_statu=2;
+					flashbusy = 1;	
+					break;
+				case FDS_ERR_NOT_INITIALIZED:
+					NRF_LOG_INFO("->fds_gc = FDS_ERR_NOT_INITIALIZED");
+					break;
+				case FDS_ERR_NO_SPACE_IN_QUEUES:
+					NRF_LOG_INFO("->fds_gc = FDS_ERR_NO_SPACE_IN_QUEUES");
+					break;
+				default:NRF_LOG_INFO("->fds_gc = 0x%8x \n",rc);
+					break;
+			}			
+			break;
+		default :
+			break;
+	}
+}
+
+//把记录保存到中
+void update_step_journey(void)
+{
+	update_step_journey_work_statu=1;
+}
+
+//把flish中的数据加载到内存
+void load_step_journey(void)
+{
+	ret_code_t rc;
+	fds_record_desc_t desc = {0};//用来操作记录的描述符结构清零
+  fds_find_token_t  tok  = {0};//保存秘钥的令牌清零		
+  rc = fds_record_find(sportdatakey_file_id, sportdatakey_rec_key, &desc, &tok);//对应KEY记录查找数据
+	APP_ERROR_CHECK(rc);
+	if (rc == NRF_SUCCESS)//如果查找成功
+  {
+	//	printf("load_step_journey   rc == NRF_SUCCESS\n");
+        /* A config file is in flash. Let's update it. */
+        fds_flash_record_t config = {0};//把配置清零
+
+        /* Open the record and read its contents. */
+        rc = fds_record_open(&desc, &config);//打开记录读取数据
+        APP_ERROR_CHECK(rc);
+				
+				step_journey_cun = config.p_header->length_words;
+				memcpy(step_number,config.p_data,step_journey_cun*4);
+				
+				rc = fds_record_close(&desc);//关闭记录
+				APP_ERROR_CHECK(rc);
+	}
+	else
+	{	
+		
+	}
+}
+void send_ble_data_A0_0(void)
+{
+	uint8_t buf[100];
+	uint8_t L=0;
+	
+	buf[L++] = 0;
+	for(int i=0;i<8;i++)
+	{
+		buf[L++] = cf.systemtime[i];
+	}
+	send_to_ble_nus(DEX_NUM,0xa0,buf,L);
+}
+
+//发送数据到串口查询压力数据
+void send_uart_data_UPDATE_BASEINFO(void)
+{
+	uint8_t buf[100];
+	uint8_t L=0;
+	
+	buf[L++] = UPDATE_BASEINFO;
+
+	send_to_uart_AABBCC(DEX_NUM,CMD_UPDATA,buf,L);
+}
+void wakeop_rx(void)
+{
+	for(int i=0;i<10;i++)		app_uart_put(0x55);	  //串口输出数据
+}
+void send_uart_GAMEMODE_EXTI(void)
+{
+	uint8_t buf[100];
+	uint8_t L=0;
+	
+	buf[L++] = GAMEMODE_EXTI;
+	send_to_uart_AABBCC(DEX_NUM,CMD_GAMEMODE,buf,L);
+}
+void send_uart_GAMEMODE_INTO(void)
+{
+	uint8_t buf[100];
+	uint8_t L=0;
+	
+	buf[L++] = GAMEMODE_INTO;
+	send_to_uart_AABBCC(DEX_NUM,CMD_GAMEMODE,buf,L);
+}
+
+void send_ble_data_A1_0(void)
+{
+	uint8_t buf[100];
+	uint8_t L=0;
+	
+	buf[L++] = 0;
+	for(int i=0;i<64;i++)
+	{
+		buf[L++] = cf.model_number[i];
+	}
+	buf[L++] = pm.software_ver[0];
+	buf[L++] = pm.software_ver[1];
+	buf[L++] = pm.hardware_ver[0];
+	buf[L++] = pm.hardware_ver[1];
+	send_to_ble_nus(DEX_NUM,0xa1,buf,L);
+}
+void send_ble_data_A1_1(void)
+{
+	uint8_t buf[100];
+	uint8_t L=0;
+	
+	buf[L++] = 1;
+	buf[L++] = pm.power;	
+	buf[L++] = pm.time_of_end;
+	buf[L++] = pm.inner_temperature;
+	for(int i=0;i<4;i++)
+	{
+		buf[L++] = pm.pressure[i];
+	}
+	
+	buf[L++] = pm_other.power;	
+	buf[L++] = pm_other.time_of_end;
+	buf[L++] = pm_other.inner_temperature;
+	
+	
+	for(int i=0;i<4;i++)
+	{
+		buf[L++] = pm_other.pressure[i];
+	}
+	NRF_LOG_INFO("send_ble_data_A1_1 -> power;=%d,inner_temperature=%d,power;=%d,inner_temperature=%d",pm.power,pm.inner_temperature,pm_other.power,pm_other.inner_temperature);
+	send_to_ble_nus(DEX_NUM,0xa1,buf,L);
+}
+#define PAGE_E 50 
+#define Pagesendtimes 20;//同一条命令最多发送的次数
+unsigned char PagesendtimesIndex=0;
+unsigned char pageindex=0;//标记这次要发的是第几包数据
+unsigned char allpagecun=0;//一共要发多少包数据
+void send_ble_data_A1_2(void)
+{
+	uint8_t buf[255];
+	uint8_t L=0;
+	buf[L++] = 2;
+	buf[L++] = pageindex;
+	if(pageindex >= allpagecun)//表示这次发的是最后一包数据
+	{
+		for(int i=0;PAGE_E*(pageindex-1)+i <= step_journey_cun ;i++)
+		{
+			buf[L++] = step_number[PAGE_E*(pageindex-1)+i]>>24;
+			buf[L++] = step_number[PAGE_E*(pageindex-1)+i]>>16;
+			buf[L++] = step_number[PAGE_E*(pageindex-1)+i]>>8;
+			buf[L++] = step_number[PAGE_E*(pageindex-1)+i]>>0;
+			NRF_LOG_INFO("send_ble_data_A1_2 -> step_number[step_journey_cun]=0x%8x ,step_journey_cun = %d",step_number[step_journey_cun],step_journey_cun);
+			NRF_LOG_INFO("send_ble_data_A1_2 -> for %d 0x%x",PAGE_E*(pageindex-1)+i,step_number[PAGE_E*(pageindex-1)+i]);
+		}		
+		NRF_LOG_INFO("send_ble_data_A1_2 -> end");
+	}
+	else
+	{
+		for(int i=0;i<PAGE_E;i++)
+		{	
+			buf[L++] = step_number[PAGE_E*(pageindex-1)+i]>>24;
+			buf[L++] = step_number[PAGE_E*(pageindex-1)+i]>>16;
+			buf[L++] = step_number[PAGE_E*(pageindex-1)+i]>>8;
+			buf[L++] = step_number[PAGE_E*(pageindex-1)+i]>>0;
+		}
+		NRF_LOG_INFO("send_ble_data_A1_2 -> pageindex");	
+	}
+	
+	send_to_ble_nus(DEX_NUM,0xa1,buf,L);
+}
+
+//发送查询命令的反馈
+void send_ble_data_A1_2_0(unsigned char cun)
+{
+	uint8_t buf[255];
+	uint8_t L=0;
+	buf[L++] = 2;
+	buf[L++] = 0;
+	for(int i=0;i<8;i++)
+	{
+		buf[L++] = cf.systemtime[i];
+	}
+	buf[L++] = cun;
+	send_to_ble_nus(DEX_NUM,0xa1,buf,L);
+	NRF_LOG_INFO("send_ble_data_A1_2_0 -> cun == %d",cun);
+}
+
+void send_ble_GAMEMODE_EXTI(void)
+{
+	uint8_t buf[100];
+	uint8_t L=0;
+	
+	buf[L++]=GAMEMODE_EXTI;
+	send_to_ble_nus(0x00,CMD_GAMEMODE,buf,L);
+}
+void send_ble_GAMEMODE_INTO(void)
+{
+	uint8_t buf[100];
+	uint8_t L=0;
+	
+	buf[L++]=GAMEMODE_INTO;
+	send_to_ble_nus(0x00,CMD_GAMEMODE,buf,L);
+}
+
+unsigned char uart_command_buff[100];
+int uart_command_callback(const unsigned char *data,int length)
+{
+	    memcpy(uart_command_buff,data,length);
+			switch(uart_command_buff[3])//处理命令号
+			{
+				case CMD_HEART:
+				case 0x03:
+				case 0x04:
+				case CMD_MOTION:
+					Send_bytes_to_Ble(uart_command_buff,length);
+					NRF_LOG_INFO("uart_command_callback -> CMD_MOTION");
+					break;
+				case CMD_UPDATA:		
+					switch(uart_command_buff[4])
+					{
+						case UPDATE_RUN://主机上报步数和路程,前1个字节是步数增量，路程两个字节(无符号16位，单位是厘米)	
+						{	
+								unsigned short temp=(((unsigned short)uart_command_buff[6])<<8) | ((unsigned short)uart_command_buff[7]);
+								add_step_journey(uart_command_buff[5],temp);
+								NRF_LOG_INFO("uart_command_callback -> UPDATE_RUN %d,%d",uart_command_buff[8],temp);	
+						}break;
+						case UPDATE_BASEINFO:
+						{
+							int i=5;
+							pm.power = uart_command_buff[i++];
+							pm.inner_temperature = uart_command_buff[i++];
+							pm.pressure[0]=uart_command_buff[i++];
+							pm.pressure[1]=uart_command_buff[i++];
+							pm.pressure[2]=uart_command_buff[i++];
+							pm.pressure[3]=uart_command_buff[i++];
+							
+							pm_other.power = uart_command_buff[i++];
+							pm_other.inner_temperature = uart_command_buff[i++];
+							pm_other.pressure[0]=uart_command_buff[i++];
+							pm_other.pressure[1]=uart_command_buff[i++];
+							pm_other.pressure[2]=uart_command_buff[i++];
+							pm_other.pressure[3]=uart_command_buff[i++];
+							send_ble_data_A1_1();//转发给手机端
+							NRF_LOG_INFO("uart_command_callback -> UPDATE_BASEINFO ");	
+							//SEGGER_RTT_printf(0,"%d%%,%d,0x%x 0x%x 0x%x 0x%x ;%d%%,%d,0x%x 0x%x 0x%x 0x%x\n",pm.power,pm.inner_temperature,pm.pressure[0],pm.pressure[1],pm.pressure[2],pm.pressure[3],pm_other.power,pm_other.inner_temperature,pm_other.pressure[0],pm_other.pressure[1],pm_other.pressure[2],pm_other.pressure[3]);							
+						}break;
+						default:NRF_LOG_INFO("uart_command_callback -> CMD_UPDATA default %d",uart_command_buff[4]);
+							break;
+					}
+					break;
+					
+				case CMD_GAMEMODE:
+					switch(uart_command_buff[4])
+					{
+						case GAMEMODE_EXTI:
+							NRF_LOG_INFO("uart_command_callback -> GAMEMODE_EXTI ");
+							send_ble_GAMEMODE_EXTI();					
+							break;
+						case GAMEMODE_INTO:
+							NRF_LOG_INFO("uart_command_callback -> GAMEMODE_INTO ");
+							send_ble_GAMEMODE_INTO();					
+							break;
+					}
+					RXOFF;
+					break;
+				case CMD_CONFIG:
+					switch(uart_command_buff[4])
+					{
+						case CONFIG_WAKEUP:
+							NRF_LOG_INFO("uart_command_callback -> CONFIG_WAKEUP ");
+							break;
+					}
+					break;
+					
+				default:
+					break;
+			}
+	return uart_command_buff[3];
+}
+
+
+
+unsigned char buffrecdata[100];
+int ble_phone_command_callback(const unsigned char *data,int length)
+{
+			if(anilicedata(data,buffrecdata,length)==0)
+			{
+				return -1;
+			}
+			switch(buffrecdata[3])//处理命令号
+			{
+				case CMD_GAMEMODE:
+						switch(buffrecdata[4])
+						{
+							case GAMEMODE_EXTI:
+								NRF_LOG_INFO("ble_phone_command_callback -> GAMEMODE_EXTI");	
+								send_uart_GAMEMODE_EXTI();
+								break;
+							case GAMEMODE_INTO:
+								NRF_LOG_INFO("ble_phone_command_callback -> GAMEMODE_INTO");	
+								send_uart_GAMEMODE_INTO();
+								break;
+						}
+				    break;
+				case CMD_UPDATA://查询
+					switch(buffrecdata[4])
+					{
+						case UPDATE_BASEINFO: //查询设备基本信息		
+							NRF_LOG_INFO("ble_phone_command_callback -> CMD_UPDATA -> UPDATE_BASEINFO");							
+							send_ble_data_A1_0();		
+							break;
+						case UPDATE_DATA: //查询数据
+							NRF_LOG_INFO("ble_phone_command_callback -> CMD_UPDATA -> UPDATE_DATA");		
+							send_uart_data_UPDATE_BASEINFO();//转发给RX
+//							send_ble_data_A1_1();
+							break;
+						case UPDATE_STEPNUM: //查询步数距离	
+							NRF_LOG_INFO("ble_phone_command_callback -> CMD_UPDATA -> UPDATE_STEPNUM %d",buffrecdata[5]);	
+							if(buffrecdata[5]==0)//这是手机发过来的查询请求
+							{
+								for(int i=0;i<8;i++) 
+								{
+									cf.systemtime[i] = buffrecdata[6+i];
+								}
+								pm.systemtime_minute=buffrecdata[14];//距离上一个整点的分钟数
+								NRF_LOG_INFO("ble_phone_command_callback -> pm.systemtime_minute = %d",pm.systemtime_minute);	
+								if((step_journey_cun==0)&&(step_number[step_journey_cun]==0))//没有数据的时候回一个包的数量为0
+								{
+									send_ble_data_A1_2_0(0);
+								}
+								else if((step_journey_cun==0)&&(step_number[step_journey_cun]!=0))
+								{
+									allpagecun=1;
+									send_ble_data_A1_2_0(1);
+									pageindex = 1;//设个标志让定时器发送第一包数据
+									PagesendtimesIndex = Pagesendtimes;
+								}
+								else
+								{
+									//计算总共要发的包数
+									if(step_journey_cun%PAGE_E>0)
+									allpagecun = step_journey_cun/PAGE_E + 1;
+									else allpagecun = step_journey_cun/PAGE_E;			
+									
+									send_ble_data_A1_2_0(allpagecun);	//发送反馈告诉手机一共有多少包数据要发
+									pageindex = 1;//设个标志让定时器发送第一包数据
+									PagesendtimesIndex = Pagesendtimes;
+								}	
+							}
+							else	
+							{
+								if(buffrecdata[5] == pageindex)//判断一下是不是当前发送包的反馈数据
+								{
+									if(pageindex >= allpagecun)
+									{
+										pageindex = 0;//表示发送已经结束了，这个时候可以清理保存的数据
+										step_journey_cun = 0;//清理保存的数据
+										step_number[step_journey_cun]=0;
+									}
+									else
+									{
+										pageindex++;//发送下一包，发送完成后
+										PagesendtimesIndex = Pagesendtimes;
+									}
+								}
+							}								
+							break;
+						default :
+							break;
+					}		
+					break;
+				default:
+					break;
+			}
+	return 0;
+}
+
+void send_ble_data_temp(void)
+{
+	uint8_t buf[255];
+	uint8_t L=0;
+	buf[L++] = 2;
+	buf[L++] = 1;
+//	for(int i=0;i<8;i++)
+//	{
+//		buf[L++] = 0xff;
+//	}
+//	buf[L++] = 30;
+	send_to_ble_nus(DEX_NUM,0xa1,buf,L);
+}
+
+
+unsigned short iiiiiii=500;
+unsigned short timecun=0;
+
+void timer_callback_Chen(void)
+{
+
+	if(timecun%100 == 0)
+	{
+		update_step_journey_work();//1s
+		
+	}
+	if(timecun%500 == 0)NRF_LOG_INFO("timer_callback_Chen -> step_number[ %d ]=0x%8x ",step_journey_cun,step_number[step_journey_cun]);
+//	send_ble_data_temp();
+	if((pageindex > 0) && ( pageindex <= allpagecun) && ( timecun%50 == 0))
+	{
+		if(PagesendtimesIndex>0)
+		{
+			send_ble_data_A1_2();//发送数据			
+			PagesendtimesIndex--;
+		}
+		else
+		{
+			//在这里报错，发送超时错误
+		}
+	}
+	
+	if(timecun%6000==0)pm.systemtime_minute++;
+	if(pm.systemtime_minute>=60)//到达一个小时
+	{
+		step_journey_cun++;
+		step_number[step_journey_cun] = 0;//清0
+		if(step_journey_cun >= step_number_length)step_journey_cun=0;
+		pm.systemtime_minute=0;
+		NRF_LOG_INFO("timer_callback_Chen -> pm.systemtime_minute>=60 , step_journey_cun = %d",step_journey_cun);
+	}
+	timecun++;
+}

smart_shoes/nRF5_SDK_17.0.0_9d13099/examples/Shoes_just_traj_20201208/ble_app_uart_03_link_PC/app.h

@@ -0,0 +1,29 @@
+#ifndef __APP_H
+#define __APP_H
+#include <stdint.h>
+#include <string.h>
+#include <stdbool.h>
+#include "main.h"
+#include "nrf_fstorage.h"
+
+
+#include "nrf_log.h"
+#include "nrf_log_ctrl.h"
+#include "nrf_log_default_backends.h"
+#include "fds.h"
+#include "SEGGER_RTT.h"
+#include "User_Sleep.h"
+
+static bool volatile m_fds_initialized;
+
+/* File ID and Key used for the configuration record. */
+//可使用范围 0x0001-0xBFFF 之外的0x0000 代表脏记录，0xBFFF之后的为peer manager保留使用
+#define CONFIG_FILE     (0x8010)
+#define CONFIG_REC_KEY  (0x7010)
+int ble_phone_command_callback(const unsigned char *data,int length);
+int uart_command_callback(const unsigned char *data,int length);
+void config_file_init(void);
+void timer_callback_Chen(void);
+#endif 
+
+

smart_shoes/nRF5_SDK_17.0.0_9d13099/examples/Shoes_just_traj_20201208/ble_app_uart_03_link_PC/app_config.h

@@ -0,0 +1,4 @@
+#ifndef  APP_CONFIG_H
+#define  APP_CONFIG_H
+// <<< Use Configuration Wizard in Context Menu >>>\n
+#endif

smart_shoes/nRF5_SDK_17.0.0_9d13099/examples/Shoes_just_traj_20201208/ble_app_uart_03_link_PC/ble_app_uart.eww

@@ -0,0 +1,24 @@
+<?xml version="1.0" encoding="iso-8859-1"?>
+
+<workspace>  <project>
+    <path>$WS_DIR$\pca10040\s112\iar\ble_app_uart_pca10040_s112.ewp</path>
+  </project>  <project>
+    <path>$WS_DIR$\pca10056\s140\iar\ble_app_uart_pca10056_s140.ewp</path>
+  </project>  <project>
+    <path>$WS_DIR$\pca10100\s140\iar\ble_app_uart_pca10100_s140.ewp</path>
+  </project>  <project>
+    <path>$WS_DIR$\pca10040\s132\iar\ble_app_uart_pca10040_s132.ewp</path>
+  </project>  <project>
+    <path>$WS_DIR$\pca10056\s113\iar\ble_app_uart_pca10056_s113.ewp</path>
+  </project>  <project>
+    <path>$WS_DIR$\pca10100\s113\iar\ble_app_uart_pca10100_s113.ewp</path>
+  </project>  <project>
+    <path>$WS_DIR$\pca10100e\s112\iar\ble_app_uart_pca10100_s112.ewp</path>
+  </project>  <project>
+    <path>$WS_DIR$\pca10100e\s140\iar\ble_app_uart_pca10100e_s140.ewp</path>
+  </project>  <project>
+    <path>$WS_DIR$\pca10056e\s112\iar\ble_app_uart_pca10056e_s112.ewp</path>
+  </project>  <project>
+    <path>$WS_DIR$\pca10040e\s112\iar\ble_app_uart_pca10040e_s112.ewp</path>
+  </project>  <batchBuild/>
+</workspace>

smart_shoes/nRF5_SDK_17.0.0_9d13099/examples/Shoes_just_traj_20201208/ble_app_uart_03_link_PC/hex/license.txt

@@ -0,0 +1,3 @@
+The provided HEX files were compiled using the projects located in the folders for the respective boards (pca10xxx).
+
+For license and copyright information, see the individual .c and .h files that are included in the projects.

smart_shoes/nRF5_SDK_17.0.0_9d13099/examples/Shoes_just_traj_20201208/ble_app_uart_03_link_PC/main.c

@@ -0,0 +1,1729 @@
+/**
+ * Copyright (c) 2014 - 2020, Nordic Semiconductor ASA
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ *    list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ *    Semiconductor ASA integrated circuit in a product or a software update for
+ *    such product, must reproduce the above copyright notice, this list of
+ *    conditions and the following disclaimer in the documentation and/or other
+ *    materials provided with the distribution.
+ *
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ *    contributors may be used to endorse or promote products derived from this
+ *    software without specific prior written permission.
+ *
+ * 4. This software, with or without modification, must only be used with a
+ *    Nordic Semiconductor ASA integrated circuit.
+ *
+ * 5. Any software provided in binary form under this license must not be reverse
+ *    engineered, decompiled, modified and/or disassembled.
+ *
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+/** @file
+ *
+ * @defgroup ble_sdk_uart_over_ble_main main.c
+ * @{
+ * @ingroup  ble_sdk_app_nus_eval
+ * @brief    UART over BLE application main file.
+ *
+ * This file contains the source code for a sample application that uses the Nordic UART service.
+ * This application uses the @ref srvlib_conn_params module.
+ */
+
+
+#include <stdint.h>
+#include <string.h>
+#include "nordic_common.h"
+#include "app_config.h"
+#include "nrf.h"
+#include "ble_hci.h"
+#include "ble_advdata.h"
+#include "ble_advertising.h"
+#include "ble_conn_params.h"
+#include "nrf_sdh.h"
+#include "nrf_sdh_soc.h"
+#include "nrf_sdh_ble.h"
+#include "nrf_ble_gatt.h"
+#include "nrf_ble_qwr.h"
+#include "app_timer.h"
+#include "ble_nus.h"
+#include "app_uart.h"
+#include "app_util_platform.h"
+#include "bsp_btn_ble.h"
+#include "nrf_pwr_mgmt.h"
+#include "user_Sleep.h"
+//#include "nrf_drv_rtc.h"
+//#include "nrf_drv_clock.h"
+
+#include "twi_master.h"
+#include "mpu6050.h"
+#include "footPDR.h"
+#include "MSE5611.h"
+
+#include "nrf_drv_timer.h"
+#include "nrf_drv_gpiote.h"
+
+#include "nrf_drv_saadc.h"
+#include "nrf_saadc.h"
+#include "nrf_drv_timer.h"
+
+#include "app_timer.h"
+#include "main.h"
+#include "app.h"
+//#include "mpu6050.h"
+//#include "inv_mpu.h"
+//#include "inv_mpu_dmp_motion_driver.h" 
+//#include "imu.h"
+
+//#include "mpu9250.h"
+
+#include "nrf_delay.h"
+
+#if defined (UART_PRESENT)
+#include "nrf_uart.h"
+#endif
+#if defined (UARTE_PRESENT)
+#include "nrf_uarte.h"
+#endif
+
+#include "nrf_log.h"
+#include "nrf_log_ctrl.h"
+#include "nrf_log_default_backends.h"
+
+
+
+
+//#define PIN_OUT 17
+
+#define APP_BLE_CONN_CFG_TAG            1                                           /**< A tag identifying the SoftDevice BLE configuration. */
+
+#define DEVICE_NAME                     "Shoes"                               /**< Name of device. Will be included in the advertising data. */
+#define NUS_SERVICE_UUID_TYPE           BLE_UUID_TYPE_VENDOR_BEGIN                  /**< UUID type for the Nordic UART Service (vendor specific). */
+
+#define APP_BLE_OBSERVER_PRIO           3                                           /**< Application's BLE observer priority. You shouldn't need to modify this value. */
+
+#define APP_ADV_INTERVAL                128                                         /**< The advertising interval (in units of 0.625 ms. This value corresponds to 40 ms). */
+
+#define APP_ADV_DURATION               	30// 18000                                        /**< The advertising duration (180 seconds) in units of 10 milliseconds. */
+
+#define MIN_CONN_INTERVAL               MSEC_TO_UNITS(20, UNIT_1_25_MS)             /**< Minimum acceptable connection interval (20 ms), Connection interval uses 1.25 ms units. */
+#define MAX_CONN_INTERVAL               MSEC_TO_UNITS(75, UNIT_1_25_MS)             /**< Maximum acceptable connection interval (75 ms), Connection interval uses 1.25 ms units. */
+#define SLAVE_LATENCY                   0                                           /**< Slave latency. */
+#define CONN_SUP_TIMEOUT                MSEC_TO_UNITS(4000, UNIT_10_MS)             /**< Connection supervisory timeout (4 seconds), Supervision Timeout uses 10 ms units. */
+#define FIRST_CONN_PARAMS_UPDATE_DELAY  APP_TIMER_TICKS(5000)                       /**< Time from initiating event (connect or start of notification) to first time sd_ble_gap_conn_param_update is called (5 seconds). */
+#define NEXT_CONN_PARAMS_UPDATE_DELAY   APP_TIMER_TICKS(30000)                      /**< Time between each call to sd_ble_gap_conn_param_update after the first call (30 seconds). */
+#define MAX_CONN_PARAMS_UPDATE_COUNT    3                                           /**< Number of attempts before giving up the connection parameter negotiation. */
+
+#define DEAD_BEEF                       0xDEADBEEF                                  /**< Value used as error code on stack dump, can be used to identify stack location on stack unwind. */
+
+#define UART_TX_BUF_SIZE                256                                         /**< UART TX buffer size. */
+#define UART_RX_BUF_SIZE                256                                         /**< UART RX buffer size. */
+
+
+BLE_NUS_DEF(m_nus, NRF_SDH_BLE_TOTAL_LINK_COUNT);                                   /**< BLE NUS service instance. */
+NRF_BLE_GATT_DEF(m_gatt);                                                           /**< GATT module instance. */
+NRF_BLE_QWR_DEF(m_qwr);                                                             /**< Context for the Queued Write module.*/
+BLE_ADVERTISING_DEF(m_advertising);                                                 /**< Advertising module instance. */
+
+static uint16_t   m_conn_handle          = BLE_CONN_HANDLE_INVALID;                 /**< Handle of the current connection. */
+static uint16_t   m_ble_nus_max_data_len = BLE_GATT_ATT_MTU_DEFAULT - 3;            /**< Maximum length of data (in bytes) that can be transmitted to the peer by the Nordic UART service module. */
+static ble_uuid_t m_adv_uuids[]          =                                          /**< Universally unique service identifier. */
+{
+    {BLE_UUID_NUS_SERVICE, NUS_SERVICE_UUID_TYPE}
+};
+
+
+/**@brief Function for assert macro callback.
+ *
+ * @details This function will be called in case of an assert in the SoftDevice.
+ *
+ * @warning This handler is an example only and does not fit a final product. You need to analyse
+ *          how your product is supposed to react in case of Assert.
+ * @warning On assert from the SoftDevice, the system can only recover on reset.
+ *
+ * @param[in] line_num    Line number of the failing ASSERT call.
+ * @param[in] p_file_name File name of the failing ASSERT call.
+ */
+void assert_nrf_callback(uint16_t line_num, const uint8_t * p_file_name)
+{
+    app_error_handler(DEAD_BEEF, line_num, p_file_name);
+}
+
+/**@brief Function for initializing the timer module.
+ */
+static void timers_init(void)
+{
+    ret_code_t err_code = app_timer_init();
+    APP_ERROR_CHECK(err_code);
+}
+
+/**@brief Function for the GAP initialization.
+ *
+ * @details This function will set up all the necessary GAP (Generic Access Profile) parameters of
+ *          the device. It also sets the permissions and appearance.
+ */
+static void gap_params_init(void)
+{
+   uint32_t                err_code;
+    ble_gap_addr_t          m_my_addr;   
+    ble_gap_conn_params_t   gap_conn_params;
+    ble_gap_conn_sec_mode_t sec_mode;
+    char BleReallyName[30]={0};
+
+    BLE_GAP_CONN_SEC_MODE_SET_OPEN(&sec_mode);
+    
+    err_code = sd_ble_gap_addr_get(&m_my_addr);
+    APP_ERROR_CHECK(err_code);
+
+    sprintf(BleReallyName,"%s_%02X%02X%02X",DEVICE_NAME,m_my_addr.addr[2],m_my_addr.addr[1],m_my_addr.addr[0]);
+
+    err_code = sd_ble_gap_device_name_set(&sec_mode,
+                                          (const uint8_t *) BleReallyName,
+                                          strlen(DEVICE_NAME)+7);
+
+    APP_ERROR_CHECK(err_code);
+
+    memset(&gap_conn_params, 0, sizeof(gap_conn_params));
+
+    gap_conn_params.min_conn_interval = MIN_CONN_INTERVAL;
+    gap_conn_params.max_conn_interval = MAX_CONN_INTERVAL;
+    gap_conn_params.slave_latency     = SLAVE_LATENCY;
+    gap_conn_params.conn_sup_timeout  = CONN_SUP_TIMEOUT;
+
+    err_code = sd_ble_gap_ppcp_set(&gap_conn_params);
+    APP_ERROR_CHECK(err_code);
+																					
+																					
+																					
+																					
+																					
+		err_code = sd_ble_gap_addr_get(&m_my_addr);
+    APP_ERROR_CHECK(err_code);
+
+    sprintf(BleReallyName,"%s_%02x%02x%02x",DEVICE_NAME,m_my_addr.addr[2],m_my_addr.addr[1],m_my_addr.addr[0]);
+
+    err_code = sd_ble_gap_device_name_set(&sec_mode,
+                                          (const uint8_t *) BleReallyName,
+                                          strlen(DEVICE_NAME)+7);
+																					
+}
+
+
+/**@brief Function for handling Queued Write Module errors.
+ *
+ * @details A pointer to this function will be passed to each service which may need to inform the
+ *          application about an error.
+ *
+ * @param[in]   nrf_error   Error code containing information about what went wrong.
+ */
+static void nrf_qwr_error_handler(uint32_t nrf_error)
+{
+    APP_ERROR_HANDLER(nrf_error);
+}
+
+
+/**@brief Function for handling the data from the Nordic UART Service.
+ *
+ * @details This function will process the data received from the Nordic UART BLE Service and send
+ *          it to the UART module.
+ *
+ * @param[in] p_evt       Nordic UART Service event.
+ */
+/**@snippet [Handling the data received over BLE] */
+static void nus_data_handler(ble_nus_evt_t * p_evt)
+{
+
+    if (p_evt->type == BLE_NUS_EVT_RX_DATA)
+    {
+        uint32_t err_code;
+
+//        printf("Received data from BLE NUS. Writing data on UART.");
+        NRF_LOG_HEXDUMP_DEBUG(p_evt->params.rx_data.p_data, p_evt->params.rx_data.length);
+				ble_phone_command_callback(p_evt->params.rx_data.p_data,p_evt->params.rx_data.length);
+        for (uint32_t i = 0; i < p_evt->params.rx_data.length; i++)
+        {
+            do
+            {
+                err_code = app_uart_put(p_evt->params.rx_data.p_data[i]);
+                if ((err_code != NRF_SUCCESS) && (err_code != NRF_ERROR_BUSY))
+                {
+//                    printf("Failed receiving NUS message. Error 0x%x. ", err_code);
+                    APP_ERROR_CHECK(err_code);
+                }
+            } while (err_code == NRF_ERROR_BUSY);
+        }
+//        if (p_evt->params.rx_data.p_data[p_evt->params.rx_data.length - 1] == '\r')
+//        {
+//            while (app_uart_put('\n') == NRF_ERROR_BUSY);
+//        }
+    }
+
+}
+/**@snippet [Handling the data received over BLE] */
+
+
+/**@brief Function for initializing services that will be used by the application.
+ */
+static void services_init(void)
+{
+    uint32_t           err_code;
+    ble_nus_init_t     nus_init;
+    nrf_ble_qwr_init_t qwr_init = {0};
+
+    // Initialize Queued Write Module.
+    qwr_init.error_handler = nrf_qwr_error_handler;
+
+    err_code = nrf_ble_qwr_init(&m_qwr, &qwr_init);
+    APP_ERROR_CHECK(err_code);
+
+    // Initialize NUS.
+    memset(&nus_init, 0, sizeof(nus_init));
+
+    nus_init.data_handler = nus_data_handler;
+
+    err_code = ble_nus_init(&m_nus, &nus_init);
+    APP_ERROR_CHECK(err_code);
+}
+
+
+/**@brief Function for handling an event from the Connection Parameters Module.
+ *
+ * @details This function will be called for all events in the Connection Parameters Module
+ *          which are passed to the application.
+ *
+ * @note All this function does is to disconnect. This could have been done by simply setting
+ *       the disconnect_on_fail config parameter, but instead we use the event handler
+ *       mechanism to demonstrate its use.
+ *
+ * @param[in] p_evt  Event received from the Connection Parameters Module.
+ */
+static void on_conn_params_evt(ble_conn_params_evt_t * p_evt)
+{
+    uint32_t err_code;
+
+    if (p_evt->evt_type == BLE_CONN_PARAMS_EVT_FAILED)
+    {
+        err_code = sd_ble_gap_disconnect(m_conn_handle, BLE_HCI_CONN_INTERVAL_UNACCEPTABLE);
+        APP_ERROR_CHECK(err_code);
+    }
+}
+
+
+/**@brief Function for handling errors from the Connection Parameters module.
+ *
+ * @param[in] nrf_error  Error code containing information about what went wrong.
+ */
+static void conn_params_error_handler(uint32_t nrf_error)
+{
+    APP_ERROR_HANDLER(nrf_error);
+}
+
+
+/**@brief Function for initializing the Connection Parameters module.
+ */
+static void conn_params_init(void)
+{
+    uint32_t               err_code;
+    ble_conn_params_init_t cp_init;
+
+    memset(&cp_init, 0, sizeof(cp_init));
+
+    cp_init.p_conn_params                  = NULL;
+    cp_init.first_conn_params_update_delay = FIRST_CONN_PARAMS_UPDATE_DELAY;
+    cp_init.next_conn_params_update_delay  = NEXT_CONN_PARAMS_UPDATE_DELAY;
+    cp_init.max_conn_params_update_count   = MAX_CONN_PARAMS_UPDATE_COUNT;
+    cp_init.start_on_notify_cccd_handle    = BLE_GATT_HANDLE_INVALID;
+    cp_init.disconnect_on_fail             = false;
+    cp_init.evt_handler                    = on_conn_params_evt;
+    cp_init.error_handler                  = conn_params_error_handler;
+
+    err_code = ble_conn_params_init(&cp_init);
+    APP_ERROR_CHECK(err_code);
+}
+
+
+/**@brief Function for putting the chip into sleep mode.
+ *
+ * @note This function will not return.
+ */
+static void sleep_mode_enter(void)
+{
+    uint32_t err_code = bsp_indication_set(BSP_INDICATE_IDLE);
+    APP_ERROR_CHECK(err_code);
+
+    // Prepare wakeup buttons.
+    err_code = bsp_btn_ble_sleep_mode_prepare();
+    APP_ERROR_CHECK(err_code);
+
+    // Go to system-off mode (this function will not return; wakeup will cause a reset).
+    err_code = sd_power_system_off();
+    APP_ERROR_CHECK(err_code);
+}
+
+/**@brief Function for starting advertising.
+ */
+void advertising_start(void)
+{
+    uint32_t err_code = ble_advertising_start(&m_advertising, BLE_ADV_MODE_FAST);
+    APP_ERROR_CHECK(err_code);
+}
+
+/**@brief Function for handling advertising events.
+ *
+ * @details This function will be called for advertising events which are passed to the application.
+ *
+ * @param[in] ble_adv_evt  Advertising event.
+ */
+static void on_adv_evt(ble_adv_evt_t ble_adv_evt)
+{
+    uint32_t err_code;
+
+    switch (ble_adv_evt)
+    {
+        case BLE_ADV_EVT_FAST:
+            err_code = bsp_indication_set(BSP_INDICATE_ADVERTISING);
+            APP_ERROR_CHECK(err_code);
+            break;
+        case BLE_ADV_EVT_IDLE:
+					   //advertising_start();
+           low_power_in();
+            break;
+        default:
+            break;
+    }
+}
+
+/**@brief Function for handling BLE events.
+ *
+ * @param[in]   p_ble_evt   Bluetooth stack event.
+ * @param[in]   p_context   Unused.
+ */
+static void ble_evt_handler(ble_evt_t const * p_ble_evt, void * p_context)
+{
+    uint32_t err_code;
+
+    switch (p_ble_evt->header.evt_id)
+    {
+        case BLE_GAP_EVT_CONNECTED:
+            printf("Connected\r\n");
+						nrf_drv_gpiote_out_clear(PIN_OUT);//连接上亮灯
+				
+
+				
+            err_code = bsp_indication_set(BSP_INDICATE_CONNECTED);
+            APP_ERROR_CHECK(err_code);
+            m_conn_handle = p_ble_evt->evt.gap_evt.conn_handle;
+            err_code = nrf_ble_qwr_conn_handle_assign(&m_qwr, m_conn_handle);
+            APP_ERROR_CHECK(err_code);
+            break;
+
+        case BLE_GAP_EVT_DISCONNECTED:
+            printf("Disconnected\r\n");
+						nrf_drv_gpiote_out_clear(PIN_OUT);			
+				
+
+				
+            // LED indication will be changed when advertising starts.
+            m_conn_handle = BLE_CONN_HANDLE_INVALID;
+            break;
+
+        case BLE_GAP_EVT_PHY_UPDATE_REQUEST:
+        {
+            printf("PHY update request.");
+            ble_gap_phys_t const phys =
+            {
+                .rx_phys = BLE_GAP_PHY_AUTO,
+                .tx_phys = BLE_GAP_PHY_AUTO,
+            };
+            err_code = sd_ble_gap_phy_update(p_ble_evt->evt.gap_evt.conn_handle, &phys);
+            APP_ERROR_CHECK(err_code);
+        } break;
+
+        case BLE_GAP_EVT_SEC_PARAMS_REQUEST:
+            // Pairing not supported
+            err_code = sd_ble_gap_sec_params_reply(m_conn_handle, BLE_GAP_SEC_STATUS_PAIRING_NOT_SUPP, NULL, NULL);
+            APP_ERROR_CHECK(err_code);
+            break;
+
+        case BLE_GATTS_EVT_SYS_ATTR_MISSING:
+            // No system attributes have been stored.
+            err_code = sd_ble_gatts_sys_attr_set(m_conn_handle, NULL, 0, 0);
+            APP_ERROR_CHECK(err_code);
+            break;
+
+        case BLE_GATTC_EVT_TIMEOUT:
+            // Disconnect on GATT Client timeout event.
+            err_code = sd_ble_gap_disconnect(p_ble_evt->evt.gattc_evt.conn_handle,
+                                             BLE_HCI_REMOTE_USER_TERMINATED_CONNECTION);
+            APP_ERROR_CHECK(err_code);
+            break;
+
+        case BLE_GATTS_EVT_TIMEOUT:
+            // Disconnect on GATT Server timeout event.
+            err_code = sd_ble_gap_disconnect(p_ble_evt->evt.gatts_evt.conn_handle,
+                                             BLE_HCI_REMOTE_USER_TERMINATED_CONNECTION);
+            APP_ERROR_CHECK(err_code);
+            break;
+
+        default:
+            // No implementation needed.
+            break;
+    }
+}
+
+
+/**@brief Function for the SoftDevice initialization.
+ *
+ * @details This function initializes the SoftDevice and the BLE event interrupt.
+ */
+static void ble_stack_init(void)
+{
+    ret_code_t err_code;
+
+    err_code = nrf_sdh_enable_request();
+    APP_ERROR_CHECK(err_code);
+
+    // Configure the BLE stack using the default settings.
+    // Fetch the start address of the application RAM.
+    uint32_t ram_start = 0;
+    err_code = nrf_sdh_ble_default_cfg_set(APP_BLE_CONN_CFG_TAG, &ram_start);
+    APP_ERROR_CHECK(err_code);
+
+    // Enable BLE stack.
+    err_code = nrf_sdh_ble_enable(&ram_start);
+    APP_ERROR_CHECK(err_code);
+
+    // Register a handler for BLE events.
+    NRF_SDH_BLE_OBSERVER(m_ble_observer, APP_BLE_OBSERVER_PRIO, ble_evt_handler, NULL);
+}
+
+
+/**@brief Function for handling events from the GATT library. */
+void gatt_evt_handler(nrf_ble_gatt_t * p_gatt, nrf_ble_gatt_evt_t const * p_evt)
+{
+    if ((m_conn_handle == p_evt->conn_handle) && (p_evt->evt_id == NRF_BLE_GATT_EVT_ATT_MTU_UPDATED))
+    {
+        m_ble_nus_max_data_len = p_evt->params.att_mtu_effective - OPCODE_LENGTH - HANDLE_LENGTH;
+     //   printf("Data len is set to 0x%X(%d)", m_ble_nus_max_data_len, m_ble_nus_max_data_len);
+    }
+//    printf("ATT MTU exchange completed. central 0x%x peripheral 0x%x",
+        //          p_gatt->att_mtu_desired_central,
+ //                 p_gatt->att_mtu_desired_periph);
+}
+
+
+/**@brief Function for initializing the GATT library. */
+void gatt_init(void)
+{
+    ret_code_t err_code;
+
+    err_code = nrf_ble_gatt_init(&m_gatt, gatt_evt_handler);
+    APP_ERROR_CHECK(err_code);
+
+    err_code = nrf_ble_gatt_att_mtu_periph_set(&m_gatt, NRF_SDH_BLE_GATT_MAX_MTU_SIZE);
+    APP_ERROR_CHECK(err_code);
+}
+
+
+/**@brief Function for handling events from the BSP module.
+ *
+ * @param[in]   event   Event generated by button press.
+ */
+void bsp_event_handler(bsp_event_t event)
+{
+    uint32_t err_code;
+    switch (event)
+    {
+        case BSP_EVENT_SLEEP:
+			printf("BSP_EVENT_SLEEP \r\n");
+            sleep_mode_enter();
+            break;
+
+        case BSP_EVENT_DISCONNECT:
+			printf("BSP_EVENT_DISCONNECT \r\n");
+            err_code = sd_ble_gap_disconnect(m_conn_handle, BLE_HCI_REMOTE_USER_TERMINATED_CONNECTION);
+            if (err_code != NRF_ERROR_INVALID_STATE)
+            {
+                APP_ERROR_CHECK(err_code);
+            }
+            break;
+
+        case BSP_EVENT_WHITELIST_OFF:
+			printf("BSP_EVENT_WHITELIST_OFF \r\n");
+            if (m_conn_handle == BLE_CONN_HANDLE_INVALID)
+            {
+                err_code = ble_advertising_restart_without_whitelist(&m_advertising);
+                if (err_code != NRF_ERROR_INVALID_STATE)
+                {
+                    APP_ERROR_CHECK(err_code);
+                }
+            }
+            break;
+		case BSP_EVENT_KEY_0:
+			printf("1");
+            break;
+
+        default:
+            break;
+    }
+}
+
+
+/**@brief   Function for handling app_uart events.
+ *
+ * @details This function will receive a single character from the app_uart module and append it to
+ *          a string. The string will be be sent over BLE when the last character received was a
+ *          'new line' '\n' (hex 0x0A) or if the string has reached the maximum data length.
+ */
+/**@snippet [Handling the data received over UART] */
+    
+void uart_event_handle(app_uart_evt_t * p_event)
+{
+	static uint8_t state = 0;
+  static uint8_t data_array[BLE_NUS_MAX_DATA_LEN];
+	static uint8_t index = 0;  
+	static uint8_t len = 0;
+	uint8_t i;
+	
+	uint32_t       err_code;
+	int rev=-1;
+
+    switch (p_event->evt_type)
+    {
+        case APP_UART_DATA_READY:
+            UNUSED_VARIABLE(app_uart_get(&data_array[index]));
+            index++;
+
+			switch(state){
+				case 0:{
+					if(index>=3){
+//						for(i=0;i<index;i++){printf("%02X ",data_array[i]);}printf("\r\n");
+ 						if(data_array[0]==0xAA && data_array[1]==(uint8_t)(~data_array[2])){
+							len = data_array[1];
+							state = 1;
+						}else{
+							index--;
+							for(i=0;i<index;i++){
+								data_array[i] = data_array[i+1];
+							}
+						}
+					}
+					}break;
+				case 1:{
+					if(index>=len){
+						uint8_t ver = 0;
+						for(i=0;i<len-1;i++){
+							ver += data_array[i];
+						}						
+							if(ver==data_array[len-1])
+							{ //校验成功
+								rev=uart_command_callback(data_array,len);
+//								if(rev==CMD_MOTION)
+//								{
+//									do{
+//										uint16_t len_send = len;
+//										err_code = ble_nus_data_send(&m_nus, data_array, &len_send, m_conn_handle);
+//										if ((err_code != NRF_ERROR_INVALID_STATE) && (err_code != NRF_ERROR_RESOURCES) && (err_code != NRF_ERROR_NOT_FOUND)){
+//											APP_ERROR_CHECK(err_code);
+//										}
+//									} while (err_code == NRF_ERROR_RESOURCES);									
+//								}
+								index = index-len;
+							}
+							else
+							{
+								index--;
+								for(i=0;i<index;i++){
+									data_array[i] = data_array[i+1];
+							}
+						}
+						state = 0;
+					}
+					}break;
+				default:state = 0;index=0;break;
+			}
+
+        case APP_UART_COMMUNICATION_ERROR:
+//            APP_ERROR_HANDLER(p_event->data.error_communication);
+            break;
+
+        case APP_UART_FIFO_ERROR:
+//			printf("APP_UART_FIFO_ERROR\r\n");
+            APP_ERROR_HANDLER(p_event->data.error_code);
+            break;
+
+        default:
+            break;
+    }
+}
+
+int Send_bytes_to_Ble(unsigned char *bytes,int len)
+{
+	uint32_t                     err_code;
+	do{
+			uint16_t len_send = len;
+			err_code = ble_nus_data_send(&m_nus, bytes, &len_send, m_conn_handle);
+			if ((err_code != NRF_ERROR_INVALID_STATE) && (err_code != NRF_ERROR_RESOURCES) && (err_code != NRF_ERROR_NOT_FOUND)){
+				APP_ERROR_CHECK(err_code);
+			}
+	} while (err_code == NRF_ERROR_RESOURCES);
+}
+/**@snippet [Handling the data received over UART] */
+
+
+/**@brief  Function for initializing the UART module.
+ */
+/**@snippet [UART Initialization] */
+void uart_init(void)
+{
+    uint32_t                     err_code;
+    app_uart_comm_params_t const comm_params =
+    {
+        .rx_pin_no    = RX_PIN_NUMBER,
+        .tx_pin_no    = TX_PIN_NUMBER,
+        .rts_pin_no   = RTS_PIN_NUMBER,
+        .cts_pin_no   = CTS_PIN_NUMBER,
+        .flow_control = APP_UART_FLOW_CONTROL_DISABLED,
+        .use_parity   = false,
+#if defined (UART_PRESENT)
+        .baud_rate    = NRF_UART_BAUDRATE_115200
+#else
+        .baud_rate    = NRF_UARTE_BAUDRATE_115200
+#endif
+    };
+
+    APP_UART_FIFO_INIT(&comm_params,
+                       UART_RX_BUF_SIZE,
+                       UART_TX_BUF_SIZE,
+                       uart_event_handle,
+                       APP_IRQ_PRIORITY_LOWEST,
+                       err_code);
+    APP_ERROR_CHECK(err_code);
+}
+/**@snippet [UART Initialization] */
+
+
+/**@brief Function for initializing the Advertising functionality.
+ */
+static void advertising_init(void)
+{
+    uint32_t               err_code;
+    ble_advertising_init_t init;
+
+    memset(&init, 0, sizeof(init));
+
+    init.advdata.name_type          = BLE_ADVDATA_FULL_NAME;
+    init.advdata.include_appearance = false;
+    init.advdata.flags              = BLE_GAP_ADV_FLAGS_LE_ONLY_LIMITED_DISC_MODE;
+
+    init.srdata.uuids_complete.uuid_cnt = sizeof(m_adv_uuids) / sizeof(m_adv_uuids[0]);
+    init.srdata.uuids_complete.p_uuids  = m_adv_uuids;
+
+    init.config.ble_adv_fast_enabled  = true;
+    init.config.ble_adv_fast_interval = APP_ADV_INTERVAL;
+    init.config.ble_adv_fast_timeout  = APP_ADV_DURATION;
+    init.evt_handler = on_adv_evt;
+
+    err_code = ble_advertising_init(&m_advertising, &init);
+    APP_ERROR_CHECK(err_code);
+
+    ble_advertising_conn_cfg_tag_set(&m_advertising, APP_BLE_CONN_CFG_TAG);
+}
+
+
+
+/**@brief Function for initializing the nrf log module.
+ */
+static void log_init(void)
+{
+    ret_code_t err_code = NRF_LOG_INIT(NULL);
+    APP_ERROR_CHECK(err_code);
+
+    NRF_LOG_DEFAULT_BACKENDS_INIT();
+}
+
+
+/**@brief Function for initializing power management.
+ */
+static void power_management_init(void)
+{
+    ret_code_t err_code;
+    err_code = nrf_pwr_mgmt_init();
+    APP_ERROR_CHECK(err_code);
+}
+
+
+/**@brief Function for handling the idle state (main loop).
+ *
+ * @details If there is no pending log operation, then sleep until next the next event occurs.
+ */static void idle_state_handle(void)
+{
+    if (NRF_LOG_PROCESS() == false)
+    {
+        nrf_pwr_mgmt_run();
+    }
+}
+
+
+
+
+/***********************************************************************************************/
+void send_to_ble_nus(uint8_t index,uint8_t cmd,uint8_t* dat,uint8_t datLen)
+{
+//	uint32_t err_code;
+	uint8_t buf[255];
+	uint16_t L=0;
+
+	uint16_t Len = datLen+5;
+	
+	uint8_t i;
+	uint8_t ver = 0;
+	if(Len>50) return;
+	buf[L++] = 0xAA;  ver += 0xAA;	//帧头
+	buf[L++] = Len;   ver += Len;	//长度
+	buf[L++] = ~Len;  ver += (~Len);//长度反码
+	buf[L++] = cmd;   ver += cmd;	//命令
+	for(i=0;i<datLen;i++){ buf[L++] = dat[i]; ver += dat[i];} //数据
+	buf[L++] = ver;   				//校验
+
+	ble_nus_data_send(&m_nus, buf, &L, m_conn_handle);
+}
+
+
+void send_ble_data_f(float* acc_val,int32_t press_val,int32_t* signal_out)
+{
+	uint8_t buf[255];
+	uint8_t L=0;
+	
+	int32_t temp;
+	
+	temp = (int32_t)(acc_val[0]*1000);
+	buf[L++] = (uint8_t)(temp>>24);
+	buf[L++] = (uint8_t)(temp>>16);
+	buf[L++] = (uint8_t)(temp>>8);
+	buf[L++] = (uint8_t)(temp>>0);
+	
+	temp = (int32_t)(acc_val[1]*1000);
+	buf[L++] = (uint8_t)(temp>>24);
+	buf[L++] = (uint8_t)(temp>>16);
+	buf[L++] = (uint8_t)(temp>>8);
+	buf[L++] = (uint8_t)(temp>>0);
+	
+	temp = (int32_t)(acc_val[2]*1000);
+	buf[L++] = (uint8_t)(temp>>24);
+	buf[L++] = (uint8_t)(temp>>16);
+	buf[L++] = (uint8_t)(temp>>8);
+	buf[L++] = (uint8_t)(temp>>0);
+	
+	buf[L++] = (uint8_t)(press_val>>24);
+	buf[L++] = (uint8_t)(press_val>>16);
+	buf[L++] = (uint8_t)(press_val>>8);
+	buf[L++] = (uint8_t)(press_val>>0);
+	
+	buf[L++] = (uint8_t)(signal_out[0]>>24);
+	buf[L++] = (uint8_t)(signal_out[0]>>16);
+	buf[L++] = (uint8_t)(signal_out[0]>>8);
+	buf[L++] = (uint8_t)(signal_out[0]>>0);
+	
+	buf[L++] = (uint8_t)(signal_out[1]>>24);
+	buf[L++] = (uint8_t)(signal_out[1]>>16);
+	buf[L++] = (uint8_t)(signal_out[1]>>8);
+	buf[L++] = (uint8_t)(signal_out[1]>>0);
+	
+	buf[L++] = (uint8_t)(signal_out[2]>>24);
+	buf[L++] = (uint8_t)(signal_out[2]>>16);
+	buf[L++] = (uint8_t)(signal_out[2]>>8);
+	buf[L++] = (uint8_t)(signal_out[2]>>0);
+	
+	send_to_ble_nus(DEX_NUM,CMD_HEART,buf,L);
+}
+
+void send_ble_data_int(short* acc_val,short* gry_val,int32_t press_val,int32_t* signal_out,float* signal_float)
+{
+	uint8_t buf[255];
+	uint8_t L=0;
+	int32_t temp;
+	
+	
+	buf[L++] = (uint8_t)(acc_val[0]>>8);
+	buf[L++] = (uint8_t)(acc_val[0]>>0);
+	buf[L++] = (uint8_t)(acc_val[1]>>8);
+	buf[L++] = (uint8_t)(acc_val[1]>>0);
+	buf[L++] = (uint8_t)(acc_val[2]>>8);
+	buf[L++] = (uint8_t)(acc_val[2]>>0);
+	
+	buf[L++] = (uint8_t)(gry_val[0]>>8);
+	buf[L++] = (uint8_t)(gry_val[0]>>0);
+	buf[L++] = (uint8_t)(gry_val[1]>>8);
+	buf[L++] = (uint8_t)(gry_val[1]>>0);
+	buf[L++] = (uint8_t)(gry_val[2]>>8);
+	buf[L++] = (uint8_t)(gry_val[2]>>0);
+	
+	buf[L++] = (uint8_t)(press_val>>24);
+	buf[L++] = (uint8_t)(press_val>>16);
+	buf[L++] = (uint8_t)(press_val>>8);
+	buf[L++] = (uint8_t)(press_val>>0);
+	
+	
+	buf[L++] = (uint8_t)(signal_out[0]>>24);
+	buf[L++] = (uint8_t)(signal_out[0]>>16);
+	buf[L++] = (uint8_t)(signal_out[0]>>8);
+	buf[L++] = (uint8_t)(signal_out[0]>>0);
+	
+	buf[L++] = (uint8_t)(signal_out[1]>>24);
+	buf[L++] = (uint8_t)(signal_out[1]>>16);
+	buf[L++] = (uint8_t)(signal_out[1]>>8);
+	buf[L++] = (uint8_t)(signal_out[1]>>0);
+	
+	buf[L++] = (uint8_t)(signal_out[2]>>24);    
+	buf[L++] = (uint8_t)(signal_out[2]>>8);
+	buf[L++] = (uint8_t)(signal_out[2]>>0);
+	
+	buf[L++] = (uint8_t)(signal_out[3]>>24);
+	buf[L++] = (uint8_t)(signal_out[3]>>16);
+	buf[L++] = (uint8_t)(signal_out[3]>>8);
+	buf[L++] = (uint8_t)(signal_out[3]>>0);
+	
+	temp = (int32_t)signal_float[0];
+	buf[L++] = (uint8_t)(temp>>24);
+	buf[L++] = (uint8_t)(temp>>16);
+	buf[L++] = (uint8_t)(temp>>8);
+	buf[L++] = (uint8_t)(temp>>0);
+	
+	temp = (int32_t)signal_float[1];
+	buf[L++] = (uint8_t)(temp>>24);
+	buf[L++] = (uint8_t)(temp>>16);
+	buf[L++] = (uint8_t)(temp>>8);
+	buf[L++] = (uint8_t)(temp>>0);
+	
+	send_to_ble_nus(DEX_NUM,CMD_HEART,buf,L);
+}
+
+void send_ble_data_press(int32_t press_val,short ts)
+{
+	uint8_t buf[32];
+	uint8_t L=0;
+	
+	buf[L++] = (uint8_t)(press_val>>24);
+	buf[L++] = (uint8_t)(press_val>>16);
+	buf[L++] = (uint8_t)(press_val>>8);
+	buf[L++] = (uint8_t)(press_val>>0);
+	
+	buf[L++] = (uint8_t)(ts>>8);
+	buf[L++] = (uint8_t)(ts>>0);
+	
+	
+	send_to_ble_nus(DEX_NUM,CMD_HEART,buf,L);
+}
+
+static uint16_t cmd_ntimes[NUMBERS_OF_MOTION];
+static uint16_t cmd_timestamp[NUMBERS_OF_MOTION];
+void send_ble_motion_process(void)
+{
+	uint8_t buf[255];
+	uint8_t L=0;
+	int i;
+	for(i=0;i<NUMBERS_OF_MOTION;i++){
+		if(cmd_ntimes[i]>0){
+			cmd_ntimes[i]--;
+			buf[L++] = (uint8_t)(i>>0);
+			buf[L++] = (uint8_t)(cmd_timestamp[i]>>8);
+			buf[L++] = (uint8_t)(cmd_timestamp[i]>>0);
+			send_to_ble_nus(DEX_NUM,CMD_MOTION,buf,L);
+		}
+	}
+}
+
+
+void send_ble_motion(uint8_t motion,uint16_t ts)
+{
+	if(motion>=NUMBERS_OF_MOTION) return;
+	cmd_ntimes[motion] = 10;
+	cmd_timestamp[motion] = ts;
+}
+
+
+/**
+  * @brief  卡尔曼滤波函数
+  * @param  None
+  * @retval None
+  */
+float kalmanFilter_x(float new_zk)
+{
+ static float preBestResult=0;
+ static float p=10.0,q=0.000001,r=0.0000101,kg=0;
+ p=p+q;
+ kg=p/(p+r);
+ new_zk=preBestResult+(kg*(new_zk-preBestResult));
+ p=(1-kg)*p;
+ preBestResult=new_zk;
+ return new_zk;
+}
+
+/**
+  * @brief  卡尔曼滤波函数
+  * @param  None
+  * @retval None
+  */
+float kalmanFilter_y(float new_zk)
+{
+ static float preBestResult=0;
+ static float p=10.0,q=0.000001,r=0.0000101,kg=0;
+ p=p+q;
+ kg=p/(p+r);
+ new_zk=preBestResult+(kg*(new_zk-preBestResult));
+ p=(1-kg)*p;
+ preBestResult=new_zk;
+ return new_zk;
+}
+
+/**
+  * @brief  卡尔曼滤波函数
+  * @param  None
+  * @retval None
+  */
+float kalmanFilter_z(float new_zk)
+{
+ static float preBestResult=0;
+ static float p=10.0,q=0.000001,r=0.0000101,kg=0;
+ p=p+q;
+ kg=p/(p+r);
+ new_zk=preBestResult+(kg*(new_zk-preBestResult));
+ p=(1-kg)*p;
+ preBestResult=new_zk;
+ return new_zk;
+}
+
+float kalmanFilter_f(float new_zk)
+{
+ static float preBestResult=0;
+ static float p=10.0,q=0.000001,r=0.0000101,kg=0;
+ p=p+q;
+ kg=p/(p+r);
+ new_zk=preBestResult+(kg*(new_zk-preBestResult));
+ p=(1-kg)*p;
+ preBestResult=new_zk;
+ return new_zk;
+}
+
+
+/*************************************************************************/
+#ifdef BSP_BUTTON_0
+    #define PIN_IN BSP_BUTTON_0
+#endif
+#ifndef PIN_IN
+    #error "Please indicate input pin"
+#endif
+
+
+nrf_saadc_value_t saadc_val[2];
+short gyro[3], accel[3];
+float quat[4];
+uint16_t timestamp_ble = 0;
+
+int32_t out[7];
+short adc_send[4];
+
+//#define  filter_mid_averange_number 10
+
+void bubble_sort(short* a, short n)
+{
+    short i,j,temp;
+    for(i=0;i<n-1;i++){                           
+        for(j=n-1;j>i;j--){
+            if(a[j]<a[j-1]){
+                temp=a[j];
+                a[j]=a[j-1];
+                a[j-1]=temp;
+            }
+        }
+    }    
+}
+#define  filter_mid_averange_number 5
+short filter_mid_averange(short* p)
+{
+	
+	int i;
+	short buf[filter_mid_averange_number];
+	for(i=0;i<filter_mid_averange_number;i++){
+		buf[i] = p[i];
+	}
+	bubble_sort(buf,filter_mid_averange_number);
+	return buf[filter_mid_averange_number>>1];
+}
+
+short filter_mid(short val)
+{
+	
+	static short buf[filter_mid_averange_number];
+	static int dex = 0;
+	buf[dex] = val;
+	if(++dex>=filter_mid_averange_number) dex = 0;
+	return filter_mid_averange(buf);
+}
+
+short filter_mid_slide(short val)
+{
+	static short buf[filter_mid_averange_number] = {0};
+	static int dex = 0;
+	static int32_t sum = 0;
+	sum = sum - buf[dex];
+	buf[dex] = val;
+	if(++dex>=filter_mid_averange_number) dex = 0;
+	sum += val;
+	return sum/filter_mid_averange_number;
+}
+
+short filter_adc1(short val)
+{
+	static short buf[filter_mid_averange_number];
+	static int dex = 0;
+	buf[dex] = val;
+	if(++dex>=filter_mid_averange_number) dex = 0;
+	return filter_mid_slide(filter_mid_averange(buf));
+}
+
+short filter_adc1_slide(short val)
+{
+	#define filter_adc1_slide_num 5
+	static short buf[filter_adc1_slide_num] = {0};
+	static int dex = 0;
+	static int32_t sum = 0;
+	sum = sum - buf[dex];
+	buf[dex] = val;
+	if(++dex>=filter_adc1_slide_num) dex = 0;
+	sum += val;
+	return sum/filter_adc1_slide_num;
+}
+
+
+
+short filter_adc1_squat_slide(short val)
+{
+	#define filter_adc1_d_slide_num 10
+	static short buf[filter_adc1_d_slide_num] = {0};
+	static int dex = 0;
+	static int32_t sum = 0;
+	sum = sum - buf[dex];
+	buf[dex] = val;
+	if(++dex>=filter_adc1_d_slide_num) dex = 0;
+	sum += val;
+	return sum/filter_adc1_d_slide_num;
+}
+
+short filter_accy_slide(short val)
+{
+	#define  filter_accy_slide_number 5
+	static short buf[filter_accy_slide_number] = {0};
+	static int dex = 0;
+	static int32_t sum = 0;
+	sum = sum - buf[dex];
+	buf[dex] = val;
+	if(++dex>=filter_accy_slide_number) dex = 0;
+	sum += val;
+	return sum/filter_accy_slide_number;
+}
+
+short filter_accz_slide(short val)
+{
+	#define  filter_accz_slide_number 5
+	static short buf[filter_accz_slide_number] = {0};
+	static int dex = 0;
+	static int32_t sum = 0;
+	sum = sum - buf[dex];
+	buf[dex] = val;
+	if(++dex>=filter_accz_slide_number) dex = 0;
+	sum += val;
+	return sum/filter_accz_slide_number;
+}
+
+
+float quatdianc(const float* Q,const float* P)
+{
+ float result;
+ result=P[0]*Q[0] + P[1]*Q[1] + P[2]*Q[2] + P[3]*Q[3];
+ return result;
+}
+
+void quatconj2(const float *Quat,float *out)
+{
+ out[0]= Quat[0];
+ out[1]=-Quat[1];
+ out[2]=-Quat[2];
+ out[3]=-Quat[3];
+}
+
+//????
+void quatinv(const float* Q,float *quatinvQ)
+{ 
+ float mod;
+ float temp[4];
+ quatconj2(Q,temp);
+ mod=quatdianc(temp,temp); 
+ quatinvQ[0]=temp[0]/mod;
+ quatinvQ[1]=temp[1]/mod;
+ quatinvQ[2]=temp[2]/mod;
+ quatinvQ[3]=temp[3]/mod;
+}
+
+void quatmultiply(const float * Q,const float * P,float *QP)
+{
+	QP[0]=P[0]*Q[0] - P[1]*Q[1] - P[2]*Q[2] - P[3]*Q[3];
+ QP[1]=P[0]*Q[1] + P[1]*Q[0] + P[2]*Q[3] - P[3]*Q[2]; 
+ QP[2]=P[0]*Q[2] + P[2]*Q[0] + P[3]*Q[1] - P[1]*Q[3];
+ QP[3]=P[0]*Q[3] + P[3]*Q[0] + P[1]*Q[2] - P[2]*Q[1]; 
+}
+
+void quatrotate(float* sour_pion,const float* Q,float *out_poin)
+{
+	float Quaternion_p[4];
+	float temp[4];
+	float temp1[4];
+	float temp2[4];
+	Quaternion_p[0]=0;
+	Quaternion_p[1]=sour_pion[0];
+ Quaternion_p[2]=sour_pion[1];
+ Quaternion_p[3]=sour_pion[2];
+ quatmultiply(Q,Quaternion_p,temp); 
+ quatinv(Q,temp2);
+ quatmultiply(temp,temp2,temp1);
+ out_poin[0]=temp1[1];
+ out_poin[1]=temp1[2];
+ out_poin[2]=temp1[3];
+} 
+
+
+
+void Separate_G(float* soure_acc,const float* Q,float *NogAcc)//???????
+{
+ float temp[4];
+ float temp1[3];
+ quatconj2(Q,temp);
+ quatrotate(soure_acc,temp,temp1);//?????????????
+// temp1[2]-=1;//??????? 
+	NogAcc[0] = temp1[0];
+	NogAcc[1] = temp1[1];
+	NogAcc[2] = temp1[2];
+// quatrotate(temp1,Q,NogAcc);//?????????????
+}
+
+
+short acc_0[3];
+short gyr_0[3];
+long quat_0[4];
+int32_t press_0;
+
+#define press_zero_offer 50000
+static int32_t press_zero_0 = 0;
+static int32_t press_sub = 0;
+static int32_t press_sub_dt = 0;
+static uint32_t ble_timestamp = 0;
+
+static int32_t is_runnig = 0;
+
+float out_f[8];
+
+static int32_t press_window_dt_val = 0;
+
+
+void press_filter_Increasing(int32_t val)
+{
+	static int32_t press_last = 0;
+	if(press_last<val)
+		out[1] = 1;
+	else
+		out[1] = 0;
+	press_last = val;
+}
+
+int32_t press_filter_slide(int32_t val)
+{
+	#define press_filter_slide_num 10
+	static int32_t buf[press_filter_slide_num] = {0};
+	static int dex = 0;
+	static long sum = 0;
+	sum = sum - buf[dex];
+	buf[dex] = val;
+	if(++dex>=press_filter_slide_num) dex = 0;
+	sum += val;
+	return sum/press_filter_slide_num;
+}
+
+int32_t press_filter_dt(int32_t val)
+{
+	static int32_t press_last = 0;
+	int32_t sub = val - press_last;
+	press_last = val;
+	return sub;
+}
+
+int32_t press_dt(int32_t val)
+{
+	static int32_t press_last = 0;
+	int32_t sub = val - press_last;
+	press_last = val;
+	return sub;
+}
+
+int32_t press_window_dt(int32_t val)
+{
+	#define press_window_len 15
+	int i;
+	int32_t temp_max = 0;
+	int32_t temp_min = 0;
+	int temp_max_i = 0;
+	int temp_min_i = 0;
+	
+	static int32_t press_window[press_window_len];
+	static int dex = 0;
+	
+	press_window[dex] = val;
+	
+	temp_max = press_window[0];temp_max_i = press_window_len-1-dex;
+	temp_min = press_window[0];temp_min_i = press_window_len-1-dex;
+	for(i=1;i<press_window_len;i++){
+		if(temp_max<press_window[i]){ 
+			temp_max = press_window[i]; 
+			if(i>dex){
+				temp_max_i = i-1-dex;
+			}else{
+				temp_max_i = press_window_len-1-(dex-i);
+			}
+		}
+		if(temp_min>press_window[i]){ 
+			temp_min = press_window[i]; 
+			if(i>dex){
+				temp_min_i = i-1-dex;
+			}else{
+				temp_min_i = press_window_len-1-(dex-i);
+			}
+		}
+	}
+	
+	if(++dex>=press_window_len) dex = 0;
+	
+	if(temp_max_i>temp_min_i)
+		return temp_max-temp_min;
+	else
+		return temp_min-temp_max;
+}
+
+int32_t accz_dt(short val)
+{
+	static int32_t accz_last = 0;
+	int32_t sub = abs(val - accz_last);
+	accz_last = val;
+	return sub;
+}
+
+int check_accy_stop(void)
+{
+	#define accy_stop_num 20
+	static short buf[accy_stop_num];
+	static short dex = 0;
+	
+	int i;
+	buf[dex] = acc_0[2];
+	if(++dex>=accy_stop_num) dex = 0;
+	for(i=0;i<accy_stop_num;i++){
+		if(buf[i]>500 || buf[i]<-500) return 1; 
+	}
+	return 0;
+}
+
+int check_accz_stop(void)
+{
+	#define accz_stop_num 20
+	static short buf[accz_stop_num];
+	static short dex = 0;
+	
+	int i;
+	buf[dex] = acc_0[2];
+	if(++dex>=accz_stop_num) dex = 0;
+	for(i=0;i<accz_stop_num;i++){
+		if(buf[i]>500 || buf[i]<-500) return 1; 
+	}
+	return 0;
+}
+
+
+
+void check_press_zero(int32_t val)
+{
+	static int32_t press_zero_arr[300];
+	static int dex = 0;
+	static int32_t press_zero_max = 0;
+	static int32_t press_zero_min = 0;
+	
+	press_zero_arr[dex] = val;
+	if(dex==0){
+		press_zero_max = press_zero_arr[dex];
+		press_zero_min = press_zero_arr[dex];
+	}else{
+		if(press_zero_max<press_zero_arr[dex]) press_zero_max = press_zero_arr[dex];
+		if(press_zero_min>press_zero_arr[dex]) press_zero_min = press_zero_arr[dex];
+	}
+	if(++dex>=300){dex = 0;
+//		if(press_zero_max - press_zero_min<5000){
+//			if(press_zero_0==0){
+//				press_zero_0 = press_zero_max;
+//				out[0] = press_zero_0;
+//			}else if(press_zero_max<press_zero_0){
+//				press_zero_0 = press_zero_max;
+//				out[0] = press_zero_0;
+//			}
+//		}
+		if(press_zero_max - press_zero_min<3000){
+			press_zero_0 = press_zero_max;
+			out[0] = press_zero_0;
+			send_ble_motion(MOTION_STOP,ble_timestamp);
+			is_runnig = 0;
+		}
+	}
+	
+	
+}
+
+
+
+void check_motion(void)
+{
+	static int32_t vy_n = 0;
+	static int32_t sy_n = 0;
+	static int32_t cnt = 0;
+	
+	
+	
+	static int32_t gy_n = 0;
+	static uint32_t cnt_down = 0;
+	
+	static short acc_yy[3];
+	static short acc_yh[10];
+
+	
+	acc_yy[0] = acc_yy[1];
+	acc_yy[1] = acc_yy[2];
+	acc_yy[2] = acc_0[2];
+	acc_0[2] = acc_yy[0];
+	
+	if(cnt_down<100) cnt_down++;
+	if(press_sub_dt<=0){
+		vy_n += acc_0[1];
+		sy_n += vy_n;
+		gy_n = 0;
+	}else{
+		vy_n = 0;
+		sy_n = 0;
+
+		gy_n += gyr_0[1];
+		
+		if(gy_n<-8000){
+			if(cnt_down==100){
+				send_ble_motion(MOTION_DOWN,ble_timestamp);
+			}
+			cnt_down = 0;
+		}
+	}
+	
+	if(press_sub==0){ //离地
+		if(cnt<150){//1.5秒之内 判断
+			if(cnt<5){
+				acc_yh[cnt] = acc_0[2];
+				if(acc_yh[cnt] - acc_yh[0]>2500){
+					send_ble_motion(MOTION_JUMP,ble_timestamp);
+				}
+			}
+			if(sy_n>150000){
+				send_ble_motion(MOTION_RIGHT,ble_timestamp);
+				cnt = 200;
+			}else if(sy_n<-150000){
+				send_ble_motion(MOTION_LEFT,ble_timestamp);
+				cnt = 200;
+			}else{
+				cnt++;
+			}
+		}else{
+			vy_n = 0;
+			sy_n = 0;
+		}
+	}else{ //在地上  
+		if(is_runnig==0){
+			is_runnig = 1;
+			send_ble_motion(MOTION_RUN,ble_timestamp);
+		}
+		cnt = 0;
+	}
+}
+
+int32_t mean_value(int32_t* p,int len)
+{
+	int32_t sum = 0;
+	int i;
+	for(i=0;i<len;i++){
+		sum += p[i];
+	}
+	return sum/len;
+}
+
+int32_t variance_value(int32_t* p,int len)
+{
+	int32_t sum = 0;
+	int i;
+	int32_t mean = mean_value(p,len);
+	for(i=0;i<len;i++){
+		sum += (p[i]-mean)*(p[i]-mean);
+	}
+	return sum/len; 
+}
+
+void linear_regression(int32_t* y,int len,float* k,float* b)
+{
+	int i;
+	int n = len;
+	float kk,bb,  sum_x, sum_y, lxy, xiSubSqr;
+	kk = bb = sum_x = sum_y = lxy = xiSubSqr = 0.0;
+	
+	for(i=0;i<n;i++){
+		sum_x += i; 
+		sum_y += y[i];
+	}
+ 
+	float x_ave = sum_x/n;
+	float y_ave = sum_y/n;
+	
+	for(i=0;i<n;i++){
+		lxy += (i - x_ave) * (y[i] - y_ave);
+		xiSubSqr += (i - x_ave) * (i - x_ave);
+	}
+	
+	kk = lxy / xiSubSqr;
+	bb = y_ave - kk * x_ave;
+	
+	*k = kk;
+	*b = bb;
+}
+
+void check_down(int32_t val)
+{
+	static int32_t window_press_arr[500];
+	static int32_t window_val_arr[500];
+	static int dex = 0;
+
+	out[2] = 0;
+	out[3] = 0;
+	out_f[0] = 0;
+	out_f[1] = 0;
+	
+	if(val>0){
+		window_val_arr[dex] = val/10000;
+		window_press_arr[dex] = press_sub/10000;
+		if(++dex>=500) dex = 0;
+		out[2] = mean_value(window_val_arr,dex);
+		out[3] = variance_value(window_val_arr,dex);
+		linear_regression(window_press_arr,dex,&out_f[0],&out_f[1]);
+	}else{
+		dex = 0;
+	}
+}
+
+int32_t press_window_dt_dt(int32_t val)
+{
+	static int32_t press_last = 0;
+	int32_t sub = val - press_last;
+	press_last = val;
+	return sub;
+}
+
+void process_motion(void)
+{
+	check_press_zero(press_0);
+	if(press_zero_0==0) return;
+	
+	
+	press_sub = press_0-press_zero_0;
+	if(press_sub<press_zero_offer) press_sub = 0;
+	press_sub_dt = press_dt(press_sub);
+	out[0] = press_sub_dt;
+	press_window_dt_val = press_window_dt(press_sub);
+	out[1] = press_window_dt_val;
+
+	
+	check_motion();
+}	
+
+
+
+
+void in_pin_handler(nrf_drv_gpiote_pin_t pin, nrf_gpiote_polarity_t action)
+{
+#ifdef USE_DMP
+//	nrf_drv_gpiote_out_toggle(PIN_OUT);
+//	nrf_drv_gpiote_out_set(PIN_OUT);
+	
+	ReadPressure_Pre();
+	if(mpu6050_get_linear_data_int(gyr_0,acc_0,quat_0)==0){
+		press_0 = ReadPressure();
+//		printf("press=%d\n",press_0);
+		process_motion();
+		
+//		send_ble_data_int(acc_0,gyr_0,press_sub,out,out_f);
+		send_ble_data_int(acc_0,gyr_0,ble_timestamp,out,out_f);
+//		send_ble_motion_process();
+	}
+	ble_timestamp++;
+	
+//	nrf_drv_gpiote_out_clear(PIN_OUT);
+#endif
+}
+
+#ifndef USE_DMP
+APP_TIMER_DEF(s_testTimer); 
+#define TEST_PERIOD    APP_TIMER_TICKS(10)
+static void timer_testCallback(void *arg)
+{
+  UNUSED_PARAMETER(arg);
+	timer_callback_Chen();
+	ble_timestamp++;
+}
+#endif
+
+void close_timer(void)
+{
+	app_timer_stop(s_testTimer);
+}
+void open_timer(void)
+{
+	app_timer_start(s_testTimer, TEST_PERIOD, NULL);
+}
+
+
+/**
+ * @brief Function for configuring: PIN_IN pin for input, PIN_OUT pin for output,
+ * and configures GPIOTE to give an interrupt on pin change.
+ */
+static void gpio_init(void)
+{
+    ret_code_t err_code;
+
+    err_code = nrf_drv_gpiote_init();
+    APP_ERROR_CHECK(err_code);
+
+    nrf_drv_gpiote_out_config_t out_config = GPIOTE_CONFIG_OUT_SIMPLE(false);
+
+    err_code = nrf_drv_gpiote_out_init(PIN_OUT, &out_config);
+    APP_ERROR_CHECK(err_code);
+
+    nrf_drv_gpiote_in_config_t in_config = GPIOTE_CONFIG_IN_SENSE_HITOLO(true);
+    in_config.pull = NRF_GPIO_PIN_PULLUP;
+
+    err_code = nrf_drv_gpiote_in_init(PIN_IN, &in_config, in_pin_handler);
+    APP_ERROR_CHECK(err_code);
+
+    nrf_drv_gpiote_in_event_enable(PIN_IN, true);
+	
+	nrf_drv_gpiote_out_set(PIN_OUT);
+
+}
+
+//saadc回调函数
+void saadc_callback(nrf_drv_saadc_evt_t const *p_event){}
+//saadc初始化函数
+void saadc_init(void)
+{
+	ret_code_t err_code;
+	//定义SAADC初始化结构体
+	//使用默认的宏初始化时需要指定该通道的模拟输入引脚
+	//具体的引脚分布参考数据手册
+	nrf_saadc_channel_config_t saadc_0 = NRF_DRV_SAADC_DEFAULT_CHANNEL_CONFIG_SE(NRF_SAADC_INPUT_AIN2);
+	nrf_saadc_channel_config_t saadc_1 = NRF_DRV_SAADC_DEFAULT_CHANNEL_CONFIG_SE(NRF_SAADC_INPUT_AIN3);
+	//初始化SAADC，注册事件回调函数，注意因为使用了阻塞模式
+	//所以可以不用回调函数，但是nrf_drv_saadc_init()要求必须提供回调函数
+	//所以这里要注册回调函数，无论有没有用到
+	err_code=nrf_drv_saadc_init(NULL,saadc_callback);
+	APP_ERROR_CHECK(err_code);
+	//初始化SAADC通道0
+	err_code = nrf_drv_saadc_channel_init(0, &saadc_0);
+	err_code = nrf_drv_saadc_channel_init(1, &saadc_1);
+    APP_ERROR_CHECK(err_code);
+}
+extern void send_uart_data_UPDATE_BASEINFO(void);
+int main(void)
+{
+    uart_init();
+    log_init();
+		app_timer_create(&s_testTimer, APP_TIMER_MODE_REPEATED, timer_testCallback);
+		config_file_init();
+    timers_init();
+		gpio_init();
+	  
+	 	nrf_gpio_cfg_output(WakeUp_PIN);
+		nrf_drv_gpiote_out_clear(WakeUp_PIN);//关闭rX
+	 
+    power_management_init();
+    ble_stack_init();
+    gap_params_init();
+    gatt_init();
+    services_init();
+    advertising_init();
+    conn_params_init();
+    advertising_start();
+		app_timer_start(s_testTimer, TEST_PERIOD, NULL);
+		rtc_config();
+    for (;;)
+    {
+			idle_state_handle();
+    }
+}
+
+extern void send_uart_GAMEMODE_EXTI(void);
+int main1(void)
+{
+		 	nrf_gpio_cfg_output(WakeUp_PIN);
+		nrf_drv_gpiote_out_clear(WakeUp_PIN);//关闭rX
+	 uart_init();
+	gpio_init();     //初始化IO
+//NRF_POWER->SYSTEMOFF = 0x1;
+//	nrf_gpio_cfg_output(3);
+//	nrf_gpio_pin_write(3,0);
+//	IntoSystemOffMode();
+//	nrf_delay_ms(5000);
+//	send_uart_GAMEMODE_EXTI();
+	while (true)
+	{
+	//	RXON
+//			nrf_delay_ms(2000);
+
+		
+		nrf_delay_ms(2000);
+		wakeop_rx();nrf_delay_ms(200);
+		send_uart_GAMEMODE_EXTI();
+////		__WFE();
+
+//		nrf_gpio_pin_toggle(8);
+////		AcquireTempPower();
+//		nrf_delay_ms(2000);
+	}
+}
+
+/**
+ * @}
+ */
+

smart_shoes/nRF5_SDK_17.0.0_9d13099/examples/Shoes_just_traj_20201208/ble_app_uart_03_link_PC/main.h

@@ -0,0 +1,36 @@
+#ifndef __MAIN_H
+#define __MAIN_H
+#include "nrf_delay.h"
+#include "twi_master.h"
+#include "protocol.h"
+#define DEX_NUM 0
+
+//enum _cmd{
+//		CMD_HEART = 0,
+//		CMD_MOTION,//主机上报给link——pc用
+//		CMD_UPDATA,//主机上报给link——pc用
+//	};
+//enum _CMD_MOTION{
+//		MOTION_STOP = 0,
+//		MOTION_RUN,
+//		MOTION_JUMP,
+//		MOTION_DOWN,
+//		MOTION_LEFT,
+//		MOTION_RIGHT,
+//		MOTION_FRONT,
+//		MOTION_BACK,
+//		NUMBERS_OF_MOTION,
+//	}; 
+//enum _CMD_UPDATE{
+//  UPDATE_NONE = 0,
+//  UPDATE_RUN,
+//	UPDATE_BASEINFO,
+//	
+//  NUMBERS_OF_UPDATE,	
+// };
+void send_to_ble_nus(uint8_t index,uint8_t cmd,uint8_t* dat,uint8_t datLen);
+int Send_bytes_to_Ble(unsigned char *bytes,int len);
+void advertising_start(void);
+void uart_init(void); 
+ void wakeop_rx(void);
+#endif

smart_shoes/nRF5_SDK_17.0.0_9d13099/examples/Shoes_just_traj_20201208/ble_app_uart_03_link_PC/pca10040/s112/arm5_no_packs/ble_app_uart_pca10040_s112.uvoptx

@@ -0,0 +1,221 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
+<ProjectOpt xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" xsi:noNamespaceSchemaLocation="project_opt.xsd">
+
+  <SchemaVersion>1.0</SchemaVersion>
+
+  <Header>### uVision Project, (C) Keil Software</Header>
+  <Target>
+    <TargetName>nrf52832_xxaa</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\_build\</ListingPath>
+      </OPTLEX>
+      <CpuCode>0</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>1</tLdApp>
+        <tGomain>1</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>0</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <tPdscDbg>1</tPdscDbg>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <nTsel>7</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>Segger\JL2CM3.dll</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>JL2CM3</Key>
+          <Name>-U408001579 -O78 -S0 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(0BB11477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD20000000 -FC2000 -FN2 -FF0nrf52xxx.flm -FS00 -FL0200000 -FP0($$Device:nRF52832_xxAA$Flash\nrf52xxx.flm) -FF1nrf52xxx_uicr -FS110001000 -FL11000 -FP1($$Device:nRF52832_xxAA$Flash\nrf52xxx_uicr.flm)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0nrf52xxx -FS00 -FL0200000 -FP0($$Device:nRF52832_xxAA$Flash\nrf52xxx))</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>0</periodic>
+        <aLwin>0</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>0</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+    </TargetOption>
+  </Target>  <Target>
+    <TargetName>flash_s112_nrf52_7.0.1_softdevice</TargetName>
+    <ToolsetNumber>0x4</ToolsetNumber>
+    <ToolsetName>ARM-ADS</ToolsetName>
+    <TargetOption>
+      <OPTTT>
+        <gFlags>1</gFlags>
+        <BeepAtEnd>1</BeepAtEnd>
+        <RunSim>0</RunSim>
+        <RunTarget>1</RunTarget>
+      </OPTTT>
+      <OPTHX>
+        <HexSelection>1</HexSelection>
+        <FlashByte>65535</FlashByte>
+        <HexRangeLowAddress>0</HexRangeLowAddress>
+        <HexRangeHighAddress>0</HexRangeHighAddress>
+        <HexOffset>0</HexOffset>
+      </OPTHX>
+      <OPTLEX>
+        <PageWidth>79</PageWidth>
+        <PageLength>66</PageLength>
+        <TabStop>8</TabStop>
+        <ListingPath>.\_build\</ListingPath>
+      </OPTLEX>
+      <CpuCode>0</CpuCode>
+      <DebugOpt>
+        <uSim>0</uSim>
+        <uTrg>1</uTrg>
+        <sLdApp>1</sLdApp>
+        <sGomain>1</sGomain>
+        <sRbreak>1</sRbreak>
+        <sRwatch>1</sRwatch>
+        <sRmem>1</sRmem>
+        <sRfunc>1</sRfunc>
+        <sRbox>1</sRbox>
+        <tLdApp>1</tLdApp>
+        <tGomain>1</tGomain>
+        <tRbreak>1</tRbreak>
+        <tRwatch>1</tRwatch>
+        <tRmem>1</tRmem>
+        <tRfunc>0</tRfunc>
+        <tRbox>1</tRbox>
+        <tRtrace>0</tRtrace>
+        <sRSysVw>1</sRSysVw>
+        <tRSysVw>1</tRSysVw>
+        <tPdscDbg>1</tPdscDbg>
+        <sRunDeb>0</sRunDeb>
+        <sLrtime>0</sLrtime>
+        <nTsel>7</nTsel>
+        <sDll></sDll>
+        <sDllPa></sDllPa>
+        <sDlgDll></sDlgDll>
+        <sDlgPa></sDlgPa>
+        <sIfile></sIfile>
+        <tDll></tDll>
+        <tDllPa></tDllPa>
+        <tDlgDll></tDlgDll>
+        <tDlgPa></tDlgPa>
+        <tIfile></tIfile>
+        <pMon>Segger\JL2CM3.dll</pMon>
+      </DebugOpt>
+      <TargetDriverDllRegistry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>JL2CM3</Key>
+          <Name>-U408001579 -O78 -S0 -A0 -C0 -JU1 -JI127.0.0.1 -JP0 -RST0 -N00("ARM CoreSight SW-DP") -D00(0BB11477) -L00(0) -TO18 -TC10000000 -TP21 -TDS8007 -TDT0 -TDC1F -TIEFFFFFFFF -TIP8 -TB1 -TFE0 -FO15 -FD20000000 -FC2000 -FN2 -FF0nrf52xxx.flm -FS00 -FL0200000 -FP0($$Device:nRF52832_xxAA$Flash\nrf52xxx.flm) -FF1nrf52xxx_uicr -FS110001000 -FL11000 -FP1($$Device:nRF52832_xxAA$Flash\nrf52xxx_uicr.flm)</Name>
+        </SetRegEntry>
+        <SetRegEntry>
+          <Number>0</Number>
+          <Key>UL2CM3</Key>
+          <Name>UL2CM3(-S0 -C0 -P0 -FD20000000 -FC1000 -FN1 -FF0nrf52xxx -FS00 -FL0200000 -FP0($$Device:nRF52832_xxAA$Flash\nrf52xxx))</Name>
+        </SetRegEntry>
+      </TargetDriverDllRegistry>
+      <Breakpoint/>
+      <Tracepoint>
+        <THDelay>0</THDelay>
+      </Tracepoint>
+      <DebugFlag>
+        <trace>0</trace>
+        <periodic>0</periodic>
+        <aLwin>0</aLwin>
+        <aCover>0</aCover>
+        <aSer1>0</aSer1>
+        <aSer2>0</aSer2>
+        <aPa>0</aPa>
+        <viewmode>0</viewmode>
+        <vrSel>0</vrSel>
+        <aSym>0</aSym>
+        <aTbox>0</aTbox>
+        <AscS1>0</AscS1>
+        <AscS2>0</AscS2>
+        <AscS3>0</AscS3>
+        <aSer3>0</aSer3>
+        <eProf>0</eProf>
+        <aLa>0</aLa>
+        <aPa1>0</aPa1>
+        <AscS4>0</AscS4>
+        <aSer4>0</aSer4>
+        <StkLoc>0</StkLoc>
+        <TrcWin>0</TrcWin>
+        <newCpu>0</newCpu>
+        <uProt>0</uProt>
+      </DebugFlag>
+      <LintExecutable></LintExecutable>
+      <LintConfigFile></LintConfigFile>
+    </TargetOption>
+  </Target></ProjectOpt>
+
+

smart_shoes/nRF5_SDK_17.0.0_9d13099/examples/Shoes_just_traj_20201208/ble_app_uart_03_link_PC/pca10040/s112/armgcc/Makefile

@@ -0,0 +1,317 @@
+PROJECT_NAME     := ble_app_uart_pca10040_s112
+TARGETS          := nrf52832_xxaa
+OUTPUT_DIRECTORY := _build
+
+SDK_ROOT := ../../../../../..
+PROJ_DIR := ../../..
+
+$(OUTPUT_DIRECTORY)/nrf52832_xxaa.out: \
+  LINKER_SCRIPT  := ble_app_uart_gcc_nrf52.ld
+
+# Source files common to all targets
+SRC_FILES += \
+  $(SDK_ROOT)/modules/nrfx/mdk/gcc_startup_nrf52.S \
+  $(SDK_ROOT)/components/libraries/log/src/nrf_log_backend_rtt.c \
+  $(SDK_ROOT)/components/libraries/log/src/nrf_log_backend_serial.c \
+  $(SDK_ROOT)/components/libraries/log/src/nrf_log_default_backends.c \
+  $(SDK_ROOT)/components/libraries/log/src/nrf_log_frontend.c \
+  $(SDK_ROOT)/components/libraries/log/src/nrf_log_str_formatter.c \
+  $(SDK_ROOT)/components/libraries/button/app_button.c \
+  $(SDK_ROOT)/components/libraries/util/app_error.c \
+  $(SDK_ROOT)/components/libraries/util/app_error_handler_gcc.c \
+  $(SDK_ROOT)/components/libraries/util/app_error_weak.c \
+  $(SDK_ROOT)/components/libraries/fifo/app_fifo.c \
+  $(SDK_ROOT)/components/libraries/scheduler/app_scheduler.c \
+  $(SDK_ROOT)/components/libraries/timer/app_timer2.c \
+  $(SDK_ROOT)/components/libraries/uart/app_uart_fifo.c \
+  $(SDK_ROOT)/components/libraries/util/app_util_platform.c \
+  $(SDK_ROOT)/components/libraries/timer/drv_rtc.c \
+  $(SDK_ROOT)/components/libraries/hardfault/hardfault_implementation.c \
+  $(SDK_ROOT)/components/libraries/util/nrf_assert.c \
+  $(SDK_ROOT)/components/libraries/atomic_fifo/nrf_atfifo.c \
+  $(SDK_ROOT)/components/libraries/atomic_flags/nrf_atflags.c \
+  $(SDK_ROOT)/components/libraries/atomic/nrf_atomic.c \
+  $(SDK_ROOT)/components/libraries/balloc/nrf_balloc.c \
+  $(SDK_ROOT)/external/fprintf/nrf_fprintf.c \
+  $(SDK_ROOT)/external/fprintf/nrf_fprintf_format.c \
+  $(SDK_ROOT)/components/libraries/memobj/nrf_memobj.c \
+  $(SDK_ROOT)/components/libraries/pwr_mgmt/nrf_pwr_mgmt.c \
+  $(SDK_ROOT)/components/libraries/ringbuf/nrf_ringbuf.c \
+  $(SDK_ROOT)/components/libraries/experimental_section_vars/nrf_section_iter.c \
+  $(SDK_ROOT)/components/libraries/sortlist/nrf_sortlist.c \
+  $(SDK_ROOT)/components/libraries/strerror/nrf_strerror.c \
+  $(SDK_ROOT)/components/libraries/uart/retarget.c \
+  $(SDK_ROOT)/modules/nrfx/mdk/system_nrf52.c \
+  $(SDK_ROOT)/components/boards/boards.c \
+  $(SDK_ROOT)/integration/nrfx/legacy/nrf_drv_clock.c \
+  $(SDK_ROOT)/integration/nrfx/legacy/nrf_drv_uart.c \
+  $(SDK_ROOT)/modules/nrfx/soc/nrfx_atomic.c \
+  $(SDK_ROOT)/modules/nrfx/drivers/src/nrfx_clock.c \
+  $(SDK_ROOT)/modules/nrfx/drivers/src/nrfx_gpiote.c \
+  $(SDK_ROOT)/modules/nrfx/drivers/src/prs/nrfx_prs.c \
+  $(SDK_ROOT)/modules/nrfx/drivers/src/nrfx_uart.c \
+  $(SDK_ROOT)/modules/nrfx/drivers/src/nrfx_uarte.c \
+  $(SDK_ROOT)/components/libraries/bsp/bsp.c \
+  $(SDK_ROOT)/components/libraries/bsp/bsp_btn_ble.c \
+  $(PROJ_DIR)/main.c \
+  $(SDK_ROOT)/external/segger_rtt/SEGGER_RTT.c \
+  $(SDK_ROOT)/external/segger_rtt/SEGGER_RTT_Syscalls_GCC.c \
+  $(SDK_ROOT)/external/segger_rtt/SEGGER_RTT_printf.c \
+  $(SDK_ROOT)/components/ble/common/ble_advdata.c \
+  $(SDK_ROOT)/components/ble/ble_advertising/ble_advertising.c \
+  $(SDK_ROOT)/components/ble/common/ble_conn_params.c \
+  $(SDK_ROOT)/components/ble/common/ble_conn_state.c \
+  $(SDK_ROOT)/components/ble/ble_link_ctx_manager/ble_link_ctx_manager.c \
+  $(SDK_ROOT)/components/ble/common/ble_srv_common.c \
+  $(SDK_ROOT)/components/ble/nrf_ble_gatt/nrf_ble_gatt.c \
+  $(SDK_ROOT)/components/ble/nrf_ble_qwr/nrf_ble_qwr.c \
+  $(SDK_ROOT)/external/utf_converter/utf.c \
+  $(SDK_ROOT)/components/ble/ble_services/ble_nus/ble_nus.c \
+  $(SDK_ROOT)/components/softdevice/common/nrf_sdh.c \
+  $(SDK_ROOT)/components/softdevice/common/nrf_sdh_ble.c \
+  $(SDK_ROOT)/components/softdevice/common/nrf_sdh_soc.c \
+
+# Include folders common to all targets
+INC_FOLDERS += \
+  $(SDK_ROOT)/components/nfc/ndef/generic/message \
+  $(SDK_ROOT)/components/nfc/t2t_lib \
+  $(SDK_ROOT)/components/nfc/t4t_parser/hl_detection_procedure \
+  $(SDK_ROOT)/components/ble/ble_services/ble_ancs_c \
+  $(SDK_ROOT)/components/ble/ble_services/ble_ias_c \
+  $(SDK_ROOT)/components/libraries/pwm \
+  $(SDK_ROOT)/components/softdevice/s112/headers/nrf52 \
+  $(SDK_ROOT)/components/libraries/usbd/class/cdc/acm \
+  $(SDK_ROOT)/components/libraries/usbd/class/hid/generic \
+  $(SDK_ROOT)/components/libraries/usbd/class/msc \
+  $(SDK_ROOT)/components/libraries/usbd/class/hid \
+  $(SDK_ROOT)/modules/nrfx/hal \
+  $(SDK_ROOT)/components/nfc/ndef/conn_hand_parser/le_oob_rec_parser \
+  $(SDK_ROOT)/components/libraries/log \
+  $(SDK_ROOT)/components/ble/ble_services/ble_gls \
+  $(SDK_ROOT)/components/libraries/fstorage \
+  $(SDK_ROOT)/components/nfc/ndef/text \
+  $(SDK_ROOT)/components/libraries/mutex \
+  $(SDK_ROOT)/components/libraries/gfx \
+  $(SDK_ROOT)/components/libraries/bootloader/ble_dfu \
+  $(SDK_ROOT)/components/nfc/ndef/connection_handover/common \
+  $(SDK_ROOT)/components/libraries/fifo \
+  $(SDK_ROOT)/components/boards \
+  $(SDK_ROOT)/components/nfc/ndef/generic/record \
+  $(SDK_ROOT)/components/nfc/t4t_parser/cc_file \
+  $(SDK_ROOT)/components/ble/ble_advertising \
+  $(SDK_ROOT)/external/utf_converter \
+  $(SDK_ROOT)/components/ble/ble_services/ble_bas_c \
+  $(SDK_ROOT)/modules/nrfx/drivers/include \
+  $(SDK_ROOT)/components/libraries/experimental_task_manager \
+  $(SDK_ROOT)/components/ble/ble_services/ble_hrs_c \
+  $(SDK_ROOT)/components/nfc/ndef/connection_handover/le_oob_rec \
+  $(SDK_ROOT)/components/libraries/queue \
+  $(SDK_ROOT)/components/libraries/pwr_mgmt \
+  $(SDK_ROOT)/components/ble/ble_dtm \
+  $(SDK_ROOT)/components/toolchain/cmsis/include \
+  $(SDK_ROOT)/components/ble/ble_services/ble_rscs_c \
+  $(SDK_ROOT)/components/ble/common \
+  $(SDK_ROOT)/components/ble/ble_services/ble_lls \
+  $(SDK_ROOT)/components/nfc/platform \
+  $(SDK_ROOT)/components/libraries/bsp \
+  $(SDK_ROOT)/components/nfc/ndef/connection_handover/ac_rec \
+  $(SDK_ROOT)/components/ble/ble_services/ble_bas \
+  $(SDK_ROOT)/components/libraries/mpu \
+  $(SDK_ROOT)/components/libraries/experimental_section_vars \
+  $(SDK_ROOT)/components/ble/ble_services/ble_ans_c \
+  $(SDK_ROOT)/components/libraries/slip \
+  $(SDK_ROOT)/components/libraries/delay \
+  $(SDK_ROOT)/components/libraries/csense_drv \
+  $(SDK_ROOT)/components/libraries/memobj \
+  $(SDK_ROOT)/components/ble/ble_services/ble_nus_c \
+  $(SDK_ROOT)/components/softdevice/common \
+  $(SDK_ROOT)/components/ble/ble_services/ble_ias \
+  $(SDK_ROOT)/components/libraries/usbd/class/hid/mouse \
+  $(SDK_ROOT)/components/libraries/low_power_pwm \
+  $(SDK_ROOT)/components/nfc/ndef/conn_hand_parser/ble_oob_advdata_parser \
+  $(SDK_ROOT)/components/ble/ble_services/ble_dfu \
+  $(SDK_ROOT)/external/fprintf \
+  $(SDK_ROOT)/components/libraries/svc \
+  $(SDK_ROOT)/components/libraries/atomic \
+  $(SDK_ROOT)/components \
+  $(SDK_ROOT)/components/libraries/scheduler \
+  $(SDK_ROOT)/components/libraries/cli \
+  $(SDK_ROOT)/components/ble/ble_services/ble_lbs \
+  $(SDK_ROOT)/components/ble/ble_services/ble_hts \
+  $(SDK_ROOT)/components/ble/ble_services/ble_cts_c \
+  $(SDK_ROOT)/components/libraries/crc16 \
+  $(SDK_ROOT)/components/nfc/t4t_parser/apdu \
+  $(SDK_ROOT)/components/libraries/util \
+  ../config \
+  $(SDK_ROOT)/components/libraries/usbd/class/cdc \
+  $(SDK_ROOT)/components/libraries/csense \
+  $(SDK_ROOT)/components/libraries/balloc \
+  $(SDK_ROOT)/components/libraries/ecc \
+  $(SDK_ROOT)/components/libraries/hardfault \
+  $(SDK_ROOT)/components/ble/ble_services/ble_cscs \
+  $(SDK_ROOT)/components/libraries/uart \
+  $(SDK_ROOT)/components/libraries/hci \
+  $(SDK_ROOT)/components/libraries/usbd/class/hid/kbd \
+  $(SDK_ROOT)/components/libraries/timer \
+  $(SDK_ROOT)/integration/nrfx \
+  $(SDK_ROOT)/components/nfc/t4t_parser/tlv \
+  $(SDK_ROOT)/components/libraries/sortlist \
+  $(SDK_ROOT)/components/libraries/spi_mngr \
+  $(SDK_ROOT)/components/softdevice/s112/headers \
+  $(SDK_ROOT)/components/libraries/led_softblink \
+  $(SDK_ROOT)/components/nfc/ndef/conn_hand_parser \
+  $(SDK_ROOT)/components/libraries/sdcard \
+  $(SDK_ROOT)/components/nfc/ndef/parser/record \
+  $(SDK_ROOT)/modules/nrfx/mdk \
+  $(SDK_ROOT)/components/ble/ble_link_ctx_manager \
+  $(SDK_ROOT)/components/ble/ble_services/ble_nus \
+  $(SDK_ROOT)/components/libraries/twi_mngr \
+  $(SDK_ROOT)/components/ble/ble_services/ble_hids \
+  $(SDK_ROOT)/components/libraries/strerror \
+  $(SDK_ROOT)/components/libraries/crc32 \
+  $(SDK_ROOT)/components/nfc/ndef/connection_handover/ble_oob_advdata \
+  $(SDK_ROOT)/components/nfc/t2t_parser \
+  $(SDK_ROOT)/components/nfc/ndef/connection_handover/ble_pair_msg \
+  $(SDK_ROOT)/components/libraries/usbd/class/audio \
+  $(SDK_ROOT)/components/nfc/t4t_lib \
+  $(SDK_ROOT)/components/ble/peer_manager \
+  $(SDK_ROOT)/components/libraries/mem_manager \
+  $(SDK_ROOT)/components/libraries/ringbuf \
+  $(SDK_ROOT)/components/ble/ble_services/ble_tps \
+  $(SDK_ROOT)/components/nfc/ndef/parser/message \
+  $(SDK_ROOT)/components/ble/ble_services/ble_dis \
+  $(SDK_ROOT)/components/nfc/ndef/uri \
+  $(SDK_ROOT)/components/ble/nrf_ble_gatt \
+  $(SDK_ROOT)/components/ble/nrf_ble_qwr \
+  $(SDK_ROOT)/components/libraries/gpiote \
+  $(SDK_ROOT)/components/libraries/button \
+  $(SDK_ROOT)/modules/nrfx \
+  $(SDK_ROOT)/components/libraries/twi_sensor \
+  $(SDK_ROOT)/integration/nrfx/legacy \
+  $(SDK_ROOT)/components/libraries/usbd \
+  $(SDK_ROOT)/components/nfc/ndef/connection_handover/ep_oob_rec \
+  $(SDK_ROOT)/external/segger_rtt \
+  $(SDK_ROOT)/components/libraries/atomic_fifo \
+  $(SDK_ROOT)/components/ble/ble_services/ble_lbs_c \
+  $(SDK_ROOT)/components/nfc/ndef/connection_handover/ble_pair_lib \
+  $(SDK_ROOT)/components/libraries/crypto \
+  $(SDK_ROOT)/components/ble/ble_racp \
+  $(SDK_ROOT)/components/libraries/fds \
+  $(SDK_ROOT)/components/nfc/ndef/launchapp \
+  $(SDK_ROOT)/components/libraries/atomic_flags \
+  $(SDK_ROOT)/components/ble/ble_services/ble_hrs \
+  $(SDK_ROOT)/components/ble/ble_services/ble_rscs \
+  $(SDK_ROOT)/components/nfc/ndef/connection_handover/hs_rec \
+  $(SDK_ROOT)/components/nfc/ndef/conn_hand_parser/ac_rec_parser \
+  $(SDK_ROOT)/components/libraries/stack_guard \
+  $(SDK_ROOT)/components/libraries/log/src \
+
+# Libraries common to all targets
+LIB_FILES += \
+
+# Optimization flags
+OPT = -O3 -g3
+# Uncomment the line below to enable link time optimization
+#OPT += -flto
+
+# C flags common to all targets
+CFLAGS += $(OPT)
+CFLAGS += -DAPP_TIMER_V2
+CFLAGS += -DAPP_TIMER_V2_RTC1_ENABLED
+CFLAGS += -DBOARD_PCA10040
+CFLAGS += -DCONFIG_GPIO_AS_PINRESET
+CFLAGS += -DFLOAT_ABI_HARD
+CFLAGS += -DNRF52
+CFLAGS += -DNRF52832_XXAA
+CFLAGS += -DNRF52_PAN_74
+CFLAGS += -DNRF_SD_BLE_API_VERSION=7
+CFLAGS += -DS112
+CFLAGS += -DSOFTDEVICE_PRESENT
+CFLAGS += -mcpu=cortex-m4
+CFLAGS += -mthumb -mabi=aapcs
+CFLAGS += -Wall -Werror
+CFLAGS += -mfloat-abi=hard -mfpu=fpv4-sp-d16
+# keep every function in a separate section, this allows linker to discard unused ones
+CFLAGS += -ffunction-sections -fdata-sections -fno-strict-aliasing
+CFLAGS += -fno-builtin -fshort-enums
+
+# C++ flags common to all targets
+CXXFLAGS += $(OPT)
+# Assembler flags common to all targets
+ASMFLAGS += -g3
+ASMFLAGS += -mcpu=cortex-m4
+ASMFLAGS += -mthumb -mabi=aapcs
+ASMFLAGS += -mfloat-abi=hard -mfpu=fpv4-sp-d16
+ASMFLAGS += -DAPP_TIMER_V2
+ASMFLAGS += -DAPP_TIMER_V2_RTC1_ENABLED
+ASMFLAGS += -DBOARD_PCA10040
+ASMFLAGS += -DCONFIG_GPIO_AS_PINRESET
+ASMFLAGS += -DFLOAT_ABI_HARD
+ASMFLAGS += -DNRF52
+ASMFLAGS += -DNRF52832_XXAA
+ASMFLAGS += -DNRF52_PAN_74
+ASMFLAGS += -DNRF_SD_BLE_API_VERSION=7
+ASMFLAGS += -DS112
+ASMFLAGS += -DSOFTDEVICE_PRESENT
+
+# Linker flags
+LDFLAGS += $(OPT)
+LDFLAGS += -mthumb -mabi=aapcs -L$(SDK_ROOT)/modules/nrfx/mdk -T$(LINKER_SCRIPT)
+LDFLAGS += -mcpu=cortex-m4
+LDFLAGS += -mfloat-abi=hard -mfpu=fpv4-sp-d16
+# let linker dump unused sections
+LDFLAGS += -Wl,--gc-sections
+# use newlib in nano version
+LDFLAGS += --specs=nano.specs
+
+nrf52832_xxaa: CFLAGS += -D__HEAP_SIZE=2048
+nrf52832_xxaa: CFLAGS += -D__STACK_SIZE=2048
+nrf52832_xxaa: ASMFLAGS += -D__HEAP_SIZE=2048
+nrf52832_xxaa: ASMFLAGS += -D__STACK_SIZE=2048
+
+# Add standard libraries at the very end of the linker input, after all objects
+# that may need symbols provided by these libraries.
+LIB_FILES += -lc -lnosys -lm
+
+
+.PHONY: default help
+
+# Default target - first one defined
+default: nrf52832_xxaa
+
+# Print all targets that can be built
+help:
+	@echo following targets are available:
+	@echo		nrf52832_xxaa
+	@echo		flash_softdevice
+	@echo		sdk_config - starting external tool for editing sdk_config.h
+	@echo		flash      - flashing binary
+
+TEMPLATE_PATH := $(SDK_ROOT)/components/toolchain/gcc
+
+
+include $(TEMPLATE_PATH)/Makefile.common
+
+$(foreach target, $(TARGETS), $(call define_target, $(target)))
+
+.PHONY: flash flash_softdevice erase
+
+# Flash the program
+flash: default
+	@echo Flashing: $(OUTPUT_DIRECTORY)/nrf52832_xxaa.hex
+	nrfjprog -f nrf52 --program $(OUTPUT_DIRECTORY)/nrf52832_xxaa.hex --sectorerase
+	nrfjprog -f nrf52 --reset
+
+# Flash softdevice
+flash_softdevice:
+	@echo Flashing: s112_nrf52_7.0.1_softdevice.hex
+	nrfjprog -f nrf52 --program $(SDK_ROOT)/components/softdevice/s112/hex/s112_nrf52_7.0.1_softdevice.hex --sectorerase
+	nrfjprog -f nrf52 --reset
+
+erase:
+	nrfjprog -f nrf52 --eraseall
+
+SDK_CONFIG_FILE := ../config/sdk_config.h
+CMSIS_CONFIG_TOOL := $(SDK_ROOT)/external_tools/cmsisconfig/CMSIS_Configuration_Wizard.jar
+sdk_config:
+	java -jar $(CMSIS_CONFIG_TOOL) $(SDK_CONFIG_FILE)

smart_shoes/nRF5_SDK_17.0.0_9d13099/examples/Shoes_just_traj_20201208/ble_app_uart_03_link_PC/pca10040/s112/armgcc/ble_app_uart_gcc_nrf52.ld

@@ -0,0 +1,130 @@
+/* Linker script to configure memory regions. */
+
+SEARCH_DIR(.)
+GROUP(-lgcc -lc -lnosys)
+
+MEMORY
+{
+  FLASH (rx) : ORIGIN = 0x19000, LENGTH = 0x67000
+  RAM (rwx) :  ORIGIN = 0x200022c8, LENGTH = 0xdd38
+}
+
+SECTIONS
+{
+}
+
+SECTIONS
+{
+  . = ALIGN(4);
+  .mem_section_dummy_ram :
+  {
+  }
+  .cli_sorted_cmd_ptrs :
+  {
+    PROVIDE(__start_cli_sorted_cmd_ptrs = .);
+    KEEP(*(.cli_sorted_cmd_ptrs))
+    PROVIDE(__stop_cli_sorted_cmd_ptrs = .);
+  } > RAM
+  .fs_data :
+  {
+    PROVIDE(__start_fs_data = .);
+    KEEP(*(.fs_data))
+    PROVIDE(__stop_fs_data = .);
+  } > RAM
+  .log_dynamic_data :
+  {
+    PROVIDE(__start_log_dynamic_data = .);
+    KEEP(*(SORT(.log_dynamic_data*)))
+    PROVIDE(__stop_log_dynamic_data = .);
+  } > RAM
+  .log_filter_data :
+  {
+    PROVIDE(__start_log_filter_data = .);
+    KEEP(*(SORT(.log_filter_data*)))
+    PROVIDE(__stop_log_filter_data = .);
+  } > RAM
+
+} INSERT AFTER .data;
+
+SECTIONS
+{
+  .mem_section_dummy_rom :
+  {
+  }
+  .sdh_soc_observers :
+  {
+    PROVIDE(__start_sdh_soc_observers = .);
+    KEEP(*(SORT(.sdh_soc_observers*)))
+    PROVIDE(__stop_sdh_soc_observers = .);
+  } > FLASH
+  .sdh_ble_observers :
+  {
+    PROVIDE(__start_sdh_ble_observers = .);
+    KEEP(*(SORT(.sdh_ble_observers*)))
+    PROVIDE(__stop_sdh_ble_observers = .);
+  } > FLASH
+  .pwr_mgmt_data :
+  {
+    PROVIDE(__start_pwr_mgmt_data = .);
+    KEEP(*(SORT(.pwr_mgmt_data*)))
+    PROVIDE(__stop_pwr_mgmt_data = .);
+  } > FLASH
+  .sdh_req_observers :
+  {
+    PROVIDE(__start_sdh_req_observers = .);
+    KEEP(*(SORT(.sdh_req_observers*)))
+    PROVIDE(__stop_sdh_req_observers = .);
+  } > FLASH
+  .sdh_state_observers :
+  {
+    PROVIDE(__start_sdh_state_observers = .);
+    KEEP(*(SORT(.sdh_state_observers*)))
+    PROVIDE(__stop_sdh_state_observers = .);
+  } > FLASH
+  .sdh_stack_observers :
+  {
+    PROVIDE(__start_sdh_stack_observers = .);
+    KEEP(*(SORT(.sdh_stack_observers*)))
+    PROVIDE(__stop_sdh_stack_observers = .);
+  } > FLASH
+    .nrf_queue :
+  {
+    PROVIDE(__start_nrf_queue = .);
+    KEEP(*(.nrf_queue))
+    PROVIDE(__stop_nrf_queue = .);
+  } > FLASH
+    .nrf_balloc :
+  {
+    PROVIDE(__start_nrf_balloc = .);
+    KEEP(*(.nrf_balloc))
+    PROVIDE(__stop_nrf_balloc = .);
+  } > FLASH
+    .cli_command :
+  {
+    PROVIDE(__start_cli_command = .);
+    KEEP(*(.cli_command))
+    PROVIDE(__stop_cli_command = .);
+  } > FLASH
+  .crypto_data :
+  {
+    PROVIDE(__start_crypto_data = .);
+    KEEP(*(SORT(.crypto_data*)))
+    PROVIDE(__stop_crypto_data = .);
+  } > FLASH
+  .log_const_data :
+  {
+    PROVIDE(__start_log_const_data = .);
+    KEEP(*(SORT(.log_const_data*)))
+    PROVIDE(__stop_log_const_data = .);
+  } > FLASH
+  .log_backends :
+  {
+    PROVIDE(__start_log_backends = .);
+    KEEP(*(SORT(.log_backends*)))
+    PROVIDE(__stop_log_backends = .);
+  } > FLASH
+
+} INSERT AFTER .text
+
+
+INCLUDE "nrf_common.ld"

smart_shoes/nRF5_SDK_17.0.0_9d13099/examples/Shoes_just_traj_20201208/ble_app_uart_03_link_PC/pca10040/s112/config/sdk_config.h

@@ -0,0 +1,11940 @@
+/**
+ * Copyright (c) 2017 - 2020, Nordic Semiconductor ASA
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without modification,
+ * are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ *    list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form, except as embedded into a Nordic
+ *    Semiconductor ASA integrated circuit in a product or a software update for
+ *    such product, must reproduce the above copyright notice, this list of
+ *    conditions and the following disclaimer in the documentation and/or other
+ *    materials provided with the distribution.
+ *
+ * 3. Neither the name of Nordic Semiconductor ASA nor the names of its
+ *    contributors may be used to endorse or promote products derived from this
+ *    software without specific prior written permission.
+ *
+ * 4. This software, with or without modification, must only be used with a
+ *    Nordic Semiconductor ASA integrated circuit.
+ *
+ * 5. Any software provided in binary form under this license must not be reverse
+ *    engineered, decompiled, modified and/or disassembled.
+ *
+ * THIS SOFTWARE IS PROVIDED BY NORDIC SEMICONDUCTOR ASA "AS IS" AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY, NONINFRINGEMENT, AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL NORDIC SEMICONDUCTOR ASA OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
+ * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ */
+
+
+
+#ifndef SDK_CONFIG_H
+#define SDK_CONFIG_H
+// <<< Use Configuration Wizard in Context Menu >>>\n
+#ifdef USE_APP_CONFIG
+#include "app_config.h"
+#endif
+// <h> Board Support 
+
+//==========================================================
+// <q> BSP_BTN_BLE_ENABLED  - bsp_btn_ble - Button Control for BLE
+ 
+
+#ifndef BSP_BTN_BLE_ENABLED
+#define BSP_BTN_BLE_ENABLED 1
+#endif
+
+// </h> 
+//==========================================================
+
+// <h> nRF_BLE 
+
+//==========================================================
+// <q> BLE_ADVERTISING_ENABLED  - ble_advertising - Advertising module
+ 
+
+#ifndef BLE_ADVERTISING_ENABLED
+#define BLE_ADVERTISING_ENABLED 1
+#endif
+
+// <q> BLE_DTM_ENABLED  - ble_dtm - Module for testing RF/PHY using DTM commands
+ 
+
+#ifndef BLE_DTM_ENABLED
+#define BLE_DTM_ENABLED 0
+#endif
+
+// <q> BLE_RACP_ENABLED  - ble_racp - Record Access Control Point library
+ 
+
+#ifndef BLE_RACP_ENABLED
+#define BLE_RACP_ENABLED 0
+#endif
+
+// <e> NRF_BLE_CONN_PARAMS_ENABLED - ble_conn_params - Initiating and executing a connection parameters negotiation procedure
+//==========================================================
+#ifndef NRF_BLE_CONN_PARAMS_ENABLED
+#define NRF_BLE_CONN_PARAMS_ENABLED 1
+#endif
+// <o> NRF_BLE_CONN_PARAMS_MAX_SLAVE_LATENCY_DEVIATION - The largest acceptable deviation in slave latency. 
+// <i> The largest deviation (+ or -) from the requested slave latency that will not be renegotiated.
+
+#ifndef NRF_BLE_CONN_PARAMS_MAX_SLAVE_LATENCY_DEVIATION
+#define NRF_BLE_CONN_PARAMS_MAX_SLAVE_LATENCY_DEVIATION 499
+#endif
+
+// <o> NRF_BLE_CONN_PARAMS_MAX_SUPERVISION_TIMEOUT_DEVIATION - The largest acceptable deviation (in 10 ms units) in supervision timeout. 
+// <i> The largest deviation (+ or -, in 10 ms units) from the requested supervision timeout that will not be renegotiated.
+
+#ifndef NRF_BLE_CONN_PARAMS_MAX_SUPERVISION_TIMEOUT_DEVIATION
+#define NRF_BLE_CONN_PARAMS_MAX_SUPERVISION_TIMEOUT_DEVIATION 65535
+#endif
+
+// </e>
+
+// <q> NRF_BLE_GATT_ENABLED  - nrf_ble_gatt - GATT module
+ 
+
+#ifndef NRF_BLE_GATT_ENABLED
+#define NRF_BLE_GATT_ENABLED 1
+#endif
+
+// <e> NRF_BLE_QWR_ENABLED - nrf_ble_qwr - Queued writes support module (prepare/execute write)
+//==========================================================
+#ifndef NRF_BLE_QWR_ENABLED
+#define NRF_BLE_QWR_ENABLED 1
+#endif
+// <o> NRF_BLE_QWR_MAX_ATTR - Maximum number of attribute handles that can be registered. This number must be adjusted according to the number of attributes for which Queued Writes will be enabled. If it is zero, the module will reject all Queued Write requests. 
+#ifndef NRF_BLE_QWR_MAX_ATTR
+#define NRF_BLE_QWR_MAX_ATTR 0
+#endif
+
+// </e>
+
+// <e> PEER_MANAGER_ENABLED - peer_manager - Peer Manager
+//==========================================================
+#ifndef PEER_MANAGER_ENABLED
+#define PEER_MANAGER_ENABLED 0
+#endif
+// <o> PM_MAX_REGISTRANTS - Number of event handlers that can be registered. 
+#ifndef PM_MAX_REGISTRANTS
+#define PM_MAX_REGISTRANTS 3
+#endif
+
+// <o> PM_FLASH_BUFFERS - Number of internal buffers for flash operations. 
+// <i> Decrease this value to lower RAM usage.
+
+#ifndef PM_FLASH_BUFFERS
+#define PM_FLASH_BUFFERS 4
+#endif
+
+// <q> PM_CENTRAL_ENABLED  - Enable/disable central-specific Peer Manager functionality.
+ 
+
+// <i> Enable/disable central-specific Peer Manager functionality.
+
+#ifndef PM_CENTRAL_ENABLED
+#define PM_CENTRAL_ENABLED 1
+#endif
+
+// <q> PM_SERVICE_CHANGED_ENABLED  - Enable/disable the service changed management for GATT server in Peer Manager.
+ 
+
+// <i> If not using a GATT server, or using a server wihout a service changed characteristic,
+// <i> disable this to save code space.
+
+#ifndef PM_SERVICE_CHANGED_ENABLED
+#define PM_SERVICE_CHANGED_ENABLED 1
+#endif
+
+// <q> PM_PEER_RANKS_ENABLED  - Enable/disable the peer rank management in Peer Manager.
+ 
+
+// <i> Set this to false to save code space if not using the peer rank API.
+
+#ifndef PM_PEER_RANKS_ENABLED
+#define PM_PEER_RANKS_ENABLED 1
+#endif
+
+// <q> PM_LESC_ENABLED  - Enable/disable LESC support in Peer Manager.
+ 
+
+// <i> If set to true, you need to call nrf_ble_lesc_request_handler() in the main loop to respond to LESC-related BLE events. If LESC support is not required, set this to false to save code space.
+
+#ifndef PM_LESC_ENABLED
+#define PM_LESC_ENABLED 0
+#endif
+
+// <e> PM_RA_PROTECTION_ENABLED - Enable/disable protection against repeated pairing attempts in Peer Manager.
+//==========================================================
+#ifndef PM_RA_PROTECTION_ENABLED
+#define PM_RA_PROTECTION_ENABLED 0
+#endif
+// <o> PM_RA_PROTECTION_TRACKED_PEERS_NUM - Maximum number of peers whose authorization status can be tracked. 
+#ifndef PM_RA_PROTECTION_TRACKED_PEERS_NUM
+#define PM_RA_PROTECTION_TRACKED_PEERS_NUM 8
+#endif
+
+// <o> PM_RA_PROTECTION_MIN_WAIT_INTERVAL - Minimum waiting interval (in ms) before a new pairing attempt can be initiated. 
+#ifndef PM_RA_PROTECTION_MIN_WAIT_INTERVAL
+#define PM_RA_PROTECTION_MIN_WAIT_INTERVAL 4000
+#endif
+
+// <o> PM_RA_PROTECTION_MAX_WAIT_INTERVAL - Maximum waiting interval (in ms) before a new pairing attempt can be initiated. 
+#ifndef PM_RA_PROTECTION_MAX_WAIT_INTERVAL
+#define PM_RA_PROTECTION_MAX_WAIT_INTERVAL 64000
+#endif
+
+// <o> PM_RA_PROTECTION_REWARD_PERIOD - Reward period (in ms). 
+// <i> The waiting interval is gradually decreased when no new failed pairing attempts are made during reward period.
+
+#ifndef PM_RA_PROTECTION_REWARD_PERIOD
+#define PM_RA_PROTECTION_REWARD_PERIOD 10000
+#endif
+
+// </e>
+
+// <o> PM_HANDLER_SEC_DELAY_MS - Delay before starting security. 
+// <i>  This might be necessary for interoperability reasons, especially as peripheral.
+
+#ifndef PM_HANDLER_SEC_DELAY_MS
+#define PM_HANDLER_SEC_DELAY_MS 0
+#endif
+
+// </e>
+
+// </h> 
+//==========================================================
+
+// <h> nRF_BLE_Services 
+
+//==========================================================
+// <q> BLE_ANCS_C_ENABLED  - ble_ancs_c - Apple Notification Service Client
+ 
+
+#ifndef BLE_ANCS_C_ENABLED
+#define BLE_ANCS_C_ENABLED 0
+#endif
+
+// <q> BLE_ANS_C_ENABLED  - ble_ans_c - Alert Notification Service Client
+ 
+
+#ifndef BLE_ANS_C_ENABLED
+#define BLE_ANS_C_ENABLED 0
+#endif
+
+// <q> BLE_BAS_C_ENABLED  - ble_bas_c - Battery Service Client
+ 
+
+#ifndef BLE_BAS_C_ENABLED
+#define BLE_BAS_C_ENABLED 0
+#endif
+
+// <e> BLE_BAS_ENABLED - ble_bas - Battery Service
+//==========================================================
+#ifndef BLE_BAS_ENABLED
+#define BLE_BAS_ENABLED 0
+#endif
+// <e> BLE_BAS_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef BLE_BAS_CONFIG_LOG_ENABLED
+#define BLE_BAS_CONFIG_LOG_ENABLED 0
+#endif
+// <o> BLE_BAS_CONFIG_LOG_LEVEL  - Default Severity level
+ 
+// <0=> Off 
+// <1=> Error 
+// <2=> Warning 
+// <3=> Info 
+// <4=> Debug 
+
+#ifndef BLE_BAS_CONFIG_LOG_LEVEL
+#define BLE_BAS_CONFIG_LOG_LEVEL 3
+#endif
+
+// <o> BLE_BAS_CONFIG_INFO_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef BLE_BAS_CONFIG_INFO_COLOR
+#define BLE_BAS_CONFIG_INFO_COLOR 0
+#endif
+
+// <o> BLE_BAS_CONFIG_DEBUG_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef BLE_BAS_CONFIG_DEBUG_COLOR
+#define BLE_BAS_CONFIG_DEBUG_COLOR 0
+#endif
+
+// </e>
+
+// </e>
+
+// <q> BLE_CSCS_ENABLED  - ble_cscs - Cycling Speed and Cadence Service
+ 
+
+#ifndef BLE_CSCS_ENABLED
+#define BLE_CSCS_ENABLED 0
+#endif
+
+// <q> BLE_CTS_C_ENABLED  - ble_cts_c - Current Time Service Client
+ 
+
+#ifndef BLE_CTS_C_ENABLED
+#define BLE_CTS_C_ENABLED 0
+#endif
+
+// <q> BLE_DIS_ENABLED  - ble_dis - Device Information Service
+ 
+
+#ifndef BLE_DIS_ENABLED
+#define BLE_DIS_ENABLED 0
+#endif
+
+// <q> BLE_GLS_ENABLED  - ble_gls - Glucose Service
+ 
+
+#ifndef BLE_GLS_ENABLED
+#define BLE_GLS_ENABLED 0
+#endif
+
+// <q> BLE_HIDS_ENABLED  - ble_hids - Human Interface Device Service
+ 
+
+#ifndef BLE_HIDS_ENABLED
+#define BLE_HIDS_ENABLED 0
+#endif
+
+// <q> BLE_HRS_C_ENABLED  - ble_hrs_c - Heart Rate Service Client
+ 
+
+#ifndef BLE_HRS_C_ENABLED
+#define BLE_HRS_C_ENABLED 0
+#endif
+
+// <q> BLE_HRS_ENABLED  - ble_hrs - Heart Rate Service
+ 
+
+#ifndef BLE_HRS_ENABLED
+#define BLE_HRS_ENABLED 0
+#endif
+
+// <q> BLE_HTS_ENABLED  - ble_hts - Health Thermometer Service
+ 
+
+#ifndef BLE_HTS_ENABLED
+#define BLE_HTS_ENABLED 0
+#endif
+
+// <q> BLE_IAS_C_ENABLED  - ble_ias_c - Immediate Alert Service Client
+ 
+
+#ifndef BLE_IAS_C_ENABLED
+#define BLE_IAS_C_ENABLED 0
+#endif
+
+// <e> BLE_IAS_ENABLED - ble_ias - Immediate Alert Service
+//==========================================================
+#ifndef BLE_IAS_ENABLED
+#define BLE_IAS_ENABLED 0
+#endif
+// <e> BLE_IAS_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef BLE_IAS_CONFIG_LOG_ENABLED
+#define BLE_IAS_CONFIG_LOG_ENABLED 0
+#endif
+// <o> BLE_IAS_CONFIG_LOG_LEVEL  - Default Severity level
+ 
+// <0=> Off 
+// <1=> Error 
+// <2=> Warning 
+// <3=> Info 
+// <4=> Debug 
+
+#ifndef BLE_IAS_CONFIG_LOG_LEVEL
+#define BLE_IAS_CONFIG_LOG_LEVEL 3
+#endif
+
+// <o> BLE_IAS_CONFIG_INFO_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef BLE_IAS_CONFIG_INFO_COLOR
+#define BLE_IAS_CONFIG_INFO_COLOR 0
+#endif
+
+// <o> BLE_IAS_CONFIG_DEBUG_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef BLE_IAS_CONFIG_DEBUG_COLOR
+#define BLE_IAS_CONFIG_DEBUG_COLOR 0
+#endif
+
+// </e>
+
+// </e>
+
+// <q> BLE_LBS_C_ENABLED  - ble_lbs_c - Nordic LED Button Service Client
+ 
+
+#ifndef BLE_LBS_C_ENABLED
+#define BLE_LBS_C_ENABLED 0
+#endif
+
+// <q> BLE_LBS_ENABLED  - ble_lbs - LED Button Service
+ 
+
+#ifndef BLE_LBS_ENABLED
+#define BLE_LBS_ENABLED 0
+#endif
+
+// <q> BLE_LLS_ENABLED  - ble_lls - Link Loss Service
+ 
+
+#ifndef BLE_LLS_ENABLED
+#define BLE_LLS_ENABLED 0
+#endif
+
+// <q> BLE_NUS_C_ENABLED  - ble_nus_c - Nordic UART Central Service
+ 
+
+#ifndef BLE_NUS_C_ENABLED
+#define BLE_NUS_C_ENABLED 0
+#endif
+
+// <e> BLE_NUS_ENABLED - ble_nus - Nordic UART Service
+//==========================================================
+#ifndef BLE_NUS_ENABLED
+#define BLE_NUS_ENABLED 1
+#endif
+// <e> BLE_NUS_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef BLE_NUS_CONFIG_LOG_ENABLED
+#define BLE_NUS_CONFIG_LOG_ENABLED 0
+#endif
+// <o> BLE_NUS_CONFIG_LOG_LEVEL  - Default Severity level
+ 
+// <0=> Off 
+// <1=> Error 
+// <2=> Warning 
+// <3=> Info 
+// <4=> Debug 
+
+#ifndef BLE_NUS_CONFIG_LOG_LEVEL
+#define BLE_NUS_CONFIG_LOG_LEVEL 3
+#endif
+
+// <o> BLE_NUS_CONFIG_INFO_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef BLE_NUS_CONFIG_INFO_COLOR
+#define BLE_NUS_CONFIG_INFO_COLOR 0
+#endif
+
+// <o> BLE_NUS_CONFIG_DEBUG_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef BLE_NUS_CONFIG_DEBUG_COLOR
+#define BLE_NUS_CONFIG_DEBUG_COLOR 0
+#endif
+
+// </e>
+
+// </e>
+
+// <q> BLE_RSCS_C_ENABLED  - ble_rscs_c - Running Speed and Cadence Client
+ 
+
+#ifndef BLE_RSCS_C_ENABLED
+#define BLE_RSCS_C_ENABLED 0
+#endif
+
+// <q> BLE_RSCS_ENABLED  - ble_rscs - Running Speed and Cadence Service
+ 
+
+#ifndef BLE_RSCS_ENABLED
+#define BLE_RSCS_ENABLED 0
+#endif
+
+// <q> BLE_TPS_ENABLED  - ble_tps - TX Power Service
+ 
+
+#ifndef BLE_TPS_ENABLED
+#define BLE_TPS_ENABLED 0
+#endif
+
+// </h> 
+//==========================================================
+
+// <h> nRF_Core 
+
+//==========================================================
+// <e> NRF_MPU_LIB_ENABLED - nrf_mpu_lib - Module for MPU
+//==========================================================
+#ifndef NRF_MPU_LIB_ENABLED
+#define NRF_MPU_LIB_ENABLED 0
+#endif
+// <q> NRF_MPU_LIB_CLI_CMDS  - Enable CLI commands specific to the module.
+ 
+
+#ifndef NRF_MPU_LIB_CLI_CMDS
+#define NRF_MPU_LIB_CLI_CMDS 0
+#endif
+
+// </e>
+
+// <e> NRF_STACK_GUARD_ENABLED - nrf_stack_guard - Stack guard
+//==========================================================
+#ifndef NRF_STACK_GUARD_ENABLED
+#define NRF_STACK_GUARD_ENABLED 0
+#endif
+// <o> NRF_STACK_GUARD_CONFIG_SIZE  - Size of the stack guard.
+ 
+// <5=> 32 bytes 
+// <6=> 64 bytes 
+// <7=> 128 bytes 
+// <8=> 256 bytes 
+// <9=> 512 bytes 
+// <10=> 1024 bytes 
+// <11=> 2048 bytes 
+// <12=> 4096 bytes 
+
+#ifndef NRF_STACK_GUARD_CONFIG_SIZE
+#define NRF_STACK_GUARD_CONFIG_SIZE 7
+#endif
+
+// </e>
+
+// </h> 
+//==========================================================
+
+// <h> nRF_Crypto 
+
+//==========================================================
+// <e> NRF_CRYPTO_ENABLED - nrf_crypto - Cryptography library.
+//==========================================================
+#ifndef NRF_CRYPTO_ENABLED
+#define NRF_CRYPTO_ENABLED 1
+#endif
+// <o> NRF_CRYPTO_ALLOCATOR  - Memory allocator
+ 
+
+// <i> Choose memory allocator used by nrf_crypto. Default is alloca if possible or nrf_malloc otherwise. If 'User macros' are selected, the user has to create 'nrf_crypto_allocator.h' file that contains NRF_CRYPTO_ALLOC, NRF_CRYPTO_FREE, and NRF_CRYPTO_ALLOC_ON_STACK.
+// <0=> Default 
+// <1=> User macros 
+// <2=> On stack (alloca) 
+// <3=> C dynamic memory (malloc) 
+// <4=> SDK Memory Manager (nrf_malloc) 
+
+#ifndef NRF_CRYPTO_ALLOCATOR
+#define NRF_CRYPTO_ALLOCATOR 0
+#endif
+
+// <e> NRF_CRYPTO_BACKEND_CC310_BL_ENABLED - Enable the ARM Cryptocell CC310 reduced backend.
+
+// <i> The CC310 hardware-accelerated cryptography backend with reduced functionality and footprint (only available on nRF52840).
+//==========================================================
+#ifndef NRF_CRYPTO_BACKEND_CC310_BL_ENABLED
+#define NRF_CRYPTO_BACKEND_CC310_BL_ENABLED 0
+#endif
+// <q> NRF_CRYPTO_BACKEND_CC310_BL_ECC_SECP224R1_ENABLED  - Enable the secp224r1 elliptic curve support using CC310_BL.
+ 
+
+#ifndef NRF_CRYPTO_BACKEND_CC310_BL_ECC_SECP224R1_ENABLED
+#define NRF_CRYPTO_BACKEND_CC310_BL_ECC_SECP224R1_ENABLED 0
+#endif
+
+// <q> NRF_CRYPTO_BACKEND_CC310_BL_ECC_SECP256R1_ENABLED  - Enable the secp256r1 elliptic curve support using CC310_BL.
+ 
+
+#ifndef NRF_CRYPTO_BACKEND_CC310_BL_ECC_SECP256R1_ENABLED
+#define NRF_CRYPTO_BACKEND_CC310_BL_ECC_SECP256R1_ENABLED 1
+#endif
+
+// <q> NRF_CRYPTO_BACKEND_CC310_BL_HASH_SHA256_ENABLED  - CC310_BL SHA-256 hash functionality.
+ 
+
+// <i> CC310_BL backend implementation for hardware-accelerated SHA-256.
+
+#ifndef NRF_CRYPTO_BACKEND_CC310_BL_HASH_SHA256_ENABLED
+#define NRF_CRYPTO_BACKEND_CC310_BL_HASH_SHA256_ENABLED 1
+#endif
+
+// <q> NRF_CRYPTO_BACKEND_CC310_BL_HASH_AUTOMATIC_RAM_BUFFER_ENABLED  - nrf_cc310_bl buffers to RAM before running hash operation
+ 
+
+// <i> Enabling this makes hashing of addresses in FLASH range possible. Size of buffer allocated for hashing is set by NRF_CRYPTO_BACKEND_CC310_BL_HASH_AUTOMATIC_RAM_BUFFER_SIZE
+
+#ifndef NRF_CRYPTO_BACKEND_CC310_BL_HASH_AUTOMATIC_RAM_BUFFER_ENABLED
+#define NRF_CRYPTO_BACKEND_CC310_BL_HASH_AUTOMATIC_RAM_BUFFER_ENABLED 0
+#endif
+
+// <o> NRF_CRYPTO_BACKEND_CC310_BL_HASH_AUTOMATIC_RAM_BUFFER_SIZE - nrf_cc310_bl hash outputs digests in little endian 
+// <i> Makes the nrf_cc310_bl hash functions output digests in little endian format. Only for use in nRF SDK DFU!
+
+#ifndef NRF_CRYPTO_BACKEND_CC310_BL_HASH_AUTOMATIC_RAM_BUFFER_SIZE
+#define NRF_CRYPTO_BACKEND_CC310_BL_HASH_AUTOMATIC_RAM_BUFFER_SIZE 4096
+#endif
+
+// <q> NRF_CRYPTO_BACKEND_CC310_BL_INTERRUPTS_ENABLED  - Enable Interrupts while support using CC310 bl.
+ 
+
+// <i> Select a library version compatible with the configuration. When interrupts are disable, a version named _noint must be used
+
+#ifndef NRF_CRYPTO_BACKEND_CC310_BL_INTERRUPTS_ENABLED
+#define NRF_CRYPTO_BACKEND_CC310_BL_INTERRUPTS_ENABLED 1
+#endif
+
+// </e>
+
+// <e> NRF_CRYPTO_BACKEND_CC310_ENABLED - Enable the ARM Cryptocell CC310 backend.
+
+// <i> The CC310 hardware-accelerated cryptography backend (only available on nRF52840).
+//==========================================================
+#ifndef NRF_CRYPTO_BACKEND_CC310_ENABLED
+#define NRF_CRYPTO_BACKEND_CC310_ENABLED 0
+#endif
+// <q> NRF_CRYPTO_BACKEND_CC310_AES_CBC_ENABLED  - Enable the AES CBC mode using CC310.
+ 
+
+#ifndef NRF_CRYPTO_BACKEND_CC310_AES_CBC_ENABLED
+#define NRF_CRYPTO_BACKEND_CC310_AES_CBC_ENABLED 1
+#endif
+
+// <q> NRF_CRYPTO_BACKEND_CC310_AES_CTR_ENABLED  - Enable the AES CTR mode using CC310.
+ 
+
+#ifndef NRF_CRYPTO_BACKEND_CC310_AES_CTR_ENABLED
+#define NRF_CRYPTO_BACKEND_CC310_AES_CTR_ENABLED 1
+#endif
+
+// <q> NRF_CRYPTO_BACKEND_CC310_AES_ECB_ENABLED  - Enable the AES ECB mode using CC310.
+ 
+
+#ifndef NRF_CRYPTO_BACKEND_CC310_AES_ECB_ENABLED
+#define NRF_CRYPTO_BACKEND_CC310_AES_ECB_ENABLED 1
+#endif
+
+// <q> NRF_CRYPTO_BACKEND_CC310_AES_CBC_MAC_ENABLED  - Enable the AES CBC_MAC mode using CC310.
+ 
+
+#ifndef NRF_CRYPTO_BACKEND_CC310_AES_CBC_MAC_ENABLED
+#define NRF_CRYPTO_BACKEND_CC310_AES_CBC_MAC_ENABLED 1
+#endif
+
+// <q> NRF_CRYPTO_BACKEND_CC310_AES_CMAC_ENABLED  - Enable the AES CMAC mode using CC310.
+ 
+
+#ifndef NRF_CRYPTO_BACKEND_CC310_AES_CMAC_ENABLED
+#define NRF_CRYPTO_BACKEND_CC310_AES_CMAC_ENABLED 1
+#endif
+
+// <q> NRF_CRYPTO_BACKEND_CC310_AES_CCM_ENABLED  - Enable the AES CCM mode using CC310.
+ 
+
+#ifndef NRF_CRYPTO_BACKEND_CC310_AES_CCM_ENABLED
+#define NRF_CRYPTO_BACKEND_CC310_AES_CCM_ENABLED 1
+#endif
+
+// <q> NRF_CRYPTO_BACKEND_CC310_AES_CCM_STAR_ENABLED  - Enable the AES CCM* mode using CC310.
+ 
+
+#ifndef NRF_CRYPTO_BACKEND_CC310_AES_CCM_STAR_ENABLED
+#define NRF_CRYPTO_BACKEND_CC310_AES_CCM_STAR_ENABLED 1
+#endif
+
+// <q> NRF_CRYPTO_BACKEND_CC310_CHACHA_POLY_ENABLED  - Enable the CHACHA-POLY mode using CC310.
+ 
+
+#ifndef NRF_CRYPTO_BACKEND_CC310_CHACHA_POLY_ENABLED
+#define NRF_CRYPTO_BACKEND_CC310_CHACHA_POLY_ENABLED 1
+#endif
+
+// <q> NRF_CRYPTO_BACKEND_CC310_ECC_SECP160R1_ENABLED  - Enable the secp160r1 elliptic curve support using CC310.
+ 
+
+#ifndef NRF_CRYPTO_BACKEND_CC310_ECC_SECP160R1_ENABLED
+#define NRF_CRYPTO_BACKEND_CC310_ECC_SECP160R1_ENABLED 1
+#endif
+
+// <q> NRF_CRYPTO_BACKEND_CC310_ECC_SECP160R2_ENABLED  - Enable the secp160r2 elliptic curve support using CC310.
+ 
+
+#ifndef NRF_CRYPTO_BACKEND_CC310_ECC_SECP160R2_ENABLED
+#define NRF_CRYPTO_BACKEND_CC310_ECC_SECP160R2_ENABLED 1
+#endif
+
+// <q> NRF_CRYPTO_BACKEND_CC310_ECC_SECP192R1_ENABLED  - Enable the secp192r1 elliptic curve support using CC310.
+ 
+
+#ifndef NRF_CRYPTO_BACKEND_CC310_ECC_SECP192R1_ENABLED
+#define NRF_CRYPTO_BACKEND_CC310_ECC_SECP192R1_ENABLED 1
+#endif
+
+// <q> NRF_CRYPTO_BACKEND_CC310_ECC_SECP224R1_ENABLED  - Enable the secp224r1 elliptic curve support using CC310.
+ 
+
+#ifndef NRF_CRYPTO_BACKEND_CC310_ECC_SECP224R1_ENABLED
+#define NRF_CRYPTO_BACKEND_CC310_ECC_SECP224R1_ENABLED 1
+#endif
+
+// <q> NRF_CRYPTO_BACKEND_CC310_ECC_SECP256R1_ENABLED  - Enable the secp256r1 elliptic curve support using CC310.
+ 
+
+#ifndef NRF_CRYPTO_BACKEND_CC310_ECC_SECP256R1_ENABLED
+#define NRF_CRYPTO_BACKEND_CC310_ECC_SECP256R1_ENABLED 1
+#endif
+
+// <q> NRF_CRYPTO_BACKEND_CC310_ECC_SECP384R1_ENABLED  - Enable the secp384r1 elliptic curve support using CC310.
+ 
+
+#ifndef NRF_CRYPTO_BACKEND_CC310_ECC_SECP384R1_ENABLED
+#define NRF_CRYPTO_BACKEND_CC310_ECC_SECP384R1_ENABLED 1
+#endif
+
+// <q> NRF_CRYPTO_BACKEND_CC310_ECC_SECP521R1_ENABLED  - Enable the secp521r1 elliptic curve support using CC310.
+ 
+
+#ifndef NRF_CRYPTO_BACKEND_CC310_ECC_SECP521R1_ENABLED
+#define NRF_CRYPTO_BACKEND_CC310_ECC_SECP521R1_ENABLED 1
+#endif
+
+// <q> NRF_CRYPTO_BACKEND_CC310_ECC_SECP160K1_ENABLED  - Enable the secp160k1 elliptic curve support using CC310.
+ 
+
+#ifndef NRF_CRYPTO_BACKEND_CC310_ECC_SECP160K1_ENABLED
+#define NRF_CRYPTO_BACKEND_CC310_ECC_SECP160K1_ENABLED 1
+#endif
+
+// <q> NRF_CRYPTO_BACKEND_CC310_ECC_SECP192K1_ENABLED  - Enable the secp192k1 elliptic curve support using CC310.
+ 
+
+#ifndef NRF_CRYPTO_BACKEND_CC310_ECC_SECP192K1_ENABLED
+#define NRF_CRYPTO_BACKEND_CC310_ECC_SECP192K1_ENABLED 1
+#endif
+
+// <q> NRF_CRYPTO_BACKEND_CC310_ECC_SECP224K1_ENABLED  - Enable the secp224k1 elliptic curve support using CC310.
+ 
+
+#ifndef NRF_CRYPTO_BACKEND_CC310_ECC_SECP224K1_ENABLED
+#define NRF_CRYPTO_BACKEND_CC310_ECC_SECP224K1_ENABLED 1
+#endif
+
+// <q> NRF_CRYPTO_BACKEND_CC310_ECC_SECP256K1_ENABLED  - Enable the secp256k1 elliptic curve support using CC310.
+ 
+
+#ifndef NRF_CRYPTO_BACKEND_CC310_ECC_SECP256K1_ENABLED
+#define NRF_CRYPTO_BACKEND_CC310_ECC_SECP256K1_ENABLED 1
+#endif
+
+// <q> NRF_CRYPTO_BACKEND_CC310_ECC_CURVE25519_ENABLED  - Enable the Curve25519 curve support using CC310.
+ 
+
+#ifndef NRF_CRYPTO_BACKEND_CC310_ECC_CURVE25519_ENABLED
+#define NRF_CRYPTO_BACKEND_CC310_ECC_CURVE25519_ENABLED 1
+#endif
+
+// <q> NRF_CRYPTO_BACKEND_CC310_ECC_ED25519_ENABLED  - Enable the Ed25519 curve support using CC310.
+ 
+
+#ifndef NRF_CRYPTO_BACKEND_CC310_ECC_ED25519_ENABLED
+#define NRF_CRYPTO_BACKEND_CC310_ECC_ED25519_ENABLED 1
+#endif
+
+// <q> NRF_CRYPTO_BACKEND_CC310_HASH_SHA256_ENABLED  - CC310 SHA-256 hash functionality.
+ 
+
+// <i> CC310 backend implementation for hardware-accelerated SHA-256.
+
+#ifndef NRF_CRYPTO_BACKEND_CC310_HASH_SHA256_ENABLED
+#define NRF_CRYPTO_BACKEND_CC310_HASH_SHA256_ENABLED 1
+#endif
+
+// <q> NRF_CRYPTO_BACKEND_CC310_HASH_SHA512_ENABLED  - CC310 SHA-512 hash functionality
+ 
+
+// <i> CC310 backend implementation for SHA-512 (in software).
+
+#ifndef NRF_CRYPTO_BACKEND_CC310_HASH_SHA512_ENABLED
+#define NRF_CRYPTO_BACKEND_CC310_HASH_SHA512_ENABLED 1
+#endif
+
+// <q> NRF_CRYPTO_BACKEND_CC310_HMAC_SHA256_ENABLED  - CC310 HMAC using SHA-256
+ 
+
+// <i> CC310 backend implementation for HMAC using hardware-accelerated SHA-256.
+
+#ifndef NRF_CRYPTO_BACKEND_CC310_HMAC_SHA256_ENABLED
+#define NRF_CRYPTO_BACKEND_CC310_HMAC_SHA256_ENABLED 1
+#endif
+
+// <q> NRF_CRYPTO_BACKEND_CC310_HMAC_SHA512_ENABLED  - CC310 HMAC using SHA-512
+ 
+
+// <i> CC310 backend implementation for HMAC using SHA-512 (in software).
+
+#ifndef NRF_CRYPTO_BACKEND_CC310_HMAC_SHA512_ENABLED
+#define NRF_CRYPTO_BACKEND_CC310_HMAC_SHA512_ENABLED 1
+#endif
+
+// <q> NRF_CRYPTO_BACKEND_CC310_RNG_ENABLED  - Enable RNG support using CC310.
+ 
+
+#ifndef NRF_CRYPTO_BACKEND_CC310_RNG_ENABLED
+#define NRF_CRYPTO_BACKEND_CC310_RNG_ENABLED 1
+#endif
+
+// <q> NRF_CRYPTO_BACKEND_CC310_INTERRUPTS_ENABLED  - Enable Interrupts while support using CC310.
+ 
+
+// <i> Select a library version compatible with the configuration. When interrupts are disable, a version named _noint must be used
+
+#ifndef NRF_CRYPTO_BACKEND_CC310_INTERRUPTS_ENABLED
+#define NRF_CRYPTO_BACKEND_CC310_INTERRUPTS_ENABLED 1
+#endif
+
+// </e>
+
+// <e> NRF_CRYPTO_BACKEND_CIFRA_ENABLED - Enable the Cifra backend.
+//==========================================================
+#ifndef NRF_CRYPTO_BACKEND_CIFRA_ENABLED
+#define NRF_CRYPTO_BACKEND_CIFRA_ENABLED 0
+#endif
+// <q> NRF_CRYPTO_BACKEND_CIFRA_AES_EAX_ENABLED  - Enable the AES EAX mode using Cifra.
+ 
+
+#ifndef NRF_CRYPTO_BACKEND_CIFRA_AES_EAX_ENABLED
+#define NRF_CRYPTO_BACKEND_CIFRA_AES_EAX_ENABLED 1
+#endif
+
+// </e>
+
+// <e> NRF_CRYPTO_BACKEND_MBEDTLS_ENABLED - Enable the mbed TLS backend.
+//==========================================================
+#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_ENABLED
+#define NRF_CRYPTO_BACKEND_MBEDTLS_ENABLED 0
+#endif
+// <q> NRF_CRYPTO_BACKEND_MBEDTLS_AES_CBC_ENABLED  - Enable the AES CBC mode mbed TLS.
+ 
+
+#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_AES_CBC_ENABLED
+#define NRF_CRYPTO_BACKEND_MBEDTLS_AES_CBC_ENABLED 1
+#endif
+
+// <q> NRF_CRYPTO_BACKEND_MBEDTLS_AES_CTR_ENABLED  - Enable the AES CTR mode using mbed TLS.
+ 
+
+#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_AES_CTR_ENABLED
+#define NRF_CRYPTO_BACKEND_MBEDTLS_AES_CTR_ENABLED 1
+#endif
+
+// <q> NRF_CRYPTO_BACKEND_MBEDTLS_AES_CFB_ENABLED  - Enable the AES CFB mode using mbed TLS.
+ 
+
+#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_AES_CFB_ENABLED
+#define NRF_CRYPTO_BACKEND_MBEDTLS_AES_CFB_ENABLED 1
+#endif
+
+// <q> NRF_CRYPTO_BACKEND_MBEDTLS_AES_ECB_ENABLED  - Enable the AES ECB mode using mbed TLS.
+ 
+
+#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_AES_ECB_ENABLED
+#define NRF_CRYPTO_BACKEND_MBEDTLS_AES_ECB_ENABLED 1
+#endif
+
+// <q> NRF_CRYPTO_BACKEND_MBEDTLS_AES_CBC_MAC_ENABLED  - Enable the AES CBC MAC mode using mbed TLS.
+ 
+
+#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_AES_CBC_MAC_ENABLED
+#define NRF_CRYPTO_BACKEND_MBEDTLS_AES_CBC_MAC_ENABLED 1
+#endif
+
+// <q> NRF_CRYPTO_BACKEND_MBEDTLS_AES_CMAC_ENABLED  - Enable the AES CMAC mode using mbed TLS.
+ 
+
+#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_AES_CMAC_ENABLED
+#define NRF_CRYPTO_BACKEND_MBEDTLS_AES_CMAC_ENABLED 1
+#endif
+
+// <q> NRF_CRYPTO_BACKEND_MBEDTLS_AES_CCM_ENABLED  - Enable the AES CCM mode using mbed TLS.
+ 
+
+#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_AES_CCM_ENABLED
+#define NRF_CRYPTO_BACKEND_MBEDTLS_AES_CCM_ENABLED 1
+#endif
+
+// <q> NRF_CRYPTO_BACKEND_MBEDTLS_AES_GCM_ENABLED  - Enable the AES GCM mode using mbed TLS.
+ 
+
+#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_AES_GCM_ENABLED
+#define NRF_CRYPTO_BACKEND_MBEDTLS_AES_GCM_ENABLED 1
+#endif
+
+// <q> NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP192R1_ENABLED  - Enable secp192r1 (NIST 192-bit) curve
+ 
+
+// <i> Enable this setting if you need secp192r1 (NIST 192-bit) support using MBEDTLS
+
+#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP192R1_ENABLED
+#define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP192R1_ENABLED 1
+#endif
+
+// <q> NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP224R1_ENABLED  - Enable secp224r1 (NIST 224-bit) curve
+ 
+
+// <i> Enable this setting if you need secp224r1 (NIST 224-bit) support using MBEDTLS
+
+#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP224R1_ENABLED
+#define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP224R1_ENABLED 1
+#endif
+
+// <q> NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP256R1_ENABLED  - Enable secp256r1 (NIST 256-bit) curve
+ 
+
+// <i> Enable this setting if you need secp256r1 (NIST 256-bit) support using MBEDTLS
+
+#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP256R1_ENABLED
+#define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP256R1_ENABLED 1
+#endif
+
+// <q> NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP384R1_ENABLED  - Enable secp384r1 (NIST 384-bit) curve
+ 
+
+// <i> Enable this setting if you need secp384r1 (NIST 384-bit) support using MBEDTLS
+
+#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP384R1_ENABLED
+#define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP384R1_ENABLED 1
+#endif
+
+// <q> NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP521R1_ENABLED  - Enable secp521r1 (NIST 521-bit) curve
+ 
+
+// <i> Enable this setting if you need secp521r1 (NIST 521-bit) support using MBEDTLS
+
+#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP521R1_ENABLED
+#define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP521R1_ENABLED 1
+#endif
+
+// <q> NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP192K1_ENABLED  - Enable secp192k1 (Koblitz 192-bit) curve
+ 
+
+// <i> Enable this setting if you need secp192k1 (Koblitz 192-bit) support using MBEDTLS
+
+#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP192K1_ENABLED
+#define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP192K1_ENABLED 1
+#endif
+
+// <q> NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP224K1_ENABLED  - Enable secp224k1 (Koblitz 224-bit) curve
+ 
+
+// <i> Enable this setting if you need secp224k1 (Koblitz 224-bit) support using MBEDTLS
+
+#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP224K1_ENABLED
+#define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP224K1_ENABLED 1
+#endif
+
+// <q> NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP256K1_ENABLED  - Enable secp256k1 (Koblitz 256-bit) curve
+ 
+
+// <i> Enable this setting if you need secp256k1 (Koblitz 256-bit) support using MBEDTLS
+
+#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP256K1_ENABLED
+#define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_SECP256K1_ENABLED 1
+#endif
+
+// <q> NRF_CRYPTO_BACKEND_MBEDTLS_ECC_BP256R1_ENABLED  - Enable bp256r1 (Brainpool 256-bit) curve
+ 
+
+// <i> Enable this setting if you need bp256r1 (Brainpool 256-bit) support using MBEDTLS
+
+#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_ECC_BP256R1_ENABLED
+#define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_BP256R1_ENABLED 1
+#endif
+
+// <q> NRF_CRYPTO_BACKEND_MBEDTLS_ECC_BP384R1_ENABLED  - Enable bp384r1 (Brainpool 384-bit) curve
+ 
+
+// <i> Enable this setting if you need bp384r1 (Brainpool 384-bit) support using MBEDTLS
+
+#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_ECC_BP384R1_ENABLED
+#define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_BP384R1_ENABLED 1
+#endif
+
+// <q> NRF_CRYPTO_BACKEND_MBEDTLS_ECC_BP512R1_ENABLED  - Enable bp512r1 (Brainpool 512-bit) curve
+ 
+
+// <i> Enable this setting if you need bp512r1 (Brainpool 512-bit) support using MBEDTLS
+
+#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_ECC_BP512R1_ENABLED
+#define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_BP512R1_ENABLED 1
+#endif
+
+// <q> NRF_CRYPTO_BACKEND_MBEDTLS_ECC_CURVE25519_ENABLED  - Enable Curve25519 curve
+ 
+
+// <i> Enable this setting if you need Curve25519 support using MBEDTLS
+
+#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_ECC_CURVE25519_ENABLED
+#define NRF_CRYPTO_BACKEND_MBEDTLS_ECC_CURVE25519_ENABLED 1
+#endif
+
+// <q> NRF_CRYPTO_BACKEND_MBEDTLS_HASH_SHA256_ENABLED  - Enable mbed TLS SHA-256 hash functionality.
+ 
+
+// <i> mbed TLS backend implementation for SHA-256.
+
+#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_HASH_SHA256_ENABLED
+#define NRF_CRYPTO_BACKEND_MBEDTLS_HASH_SHA256_ENABLED 1
+#endif
+
+// <q> NRF_CRYPTO_BACKEND_MBEDTLS_HASH_SHA512_ENABLED  - Enable mbed TLS SHA-512 hash functionality.
+ 
+
+// <i> mbed TLS backend implementation for SHA-512.
+
+#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_HASH_SHA512_ENABLED
+#define NRF_CRYPTO_BACKEND_MBEDTLS_HASH_SHA512_ENABLED 1
+#endif
+
+// <q> NRF_CRYPTO_BACKEND_MBEDTLS_HMAC_SHA256_ENABLED  - Enable mbed TLS HMAC using SHA-256.
+ 
+
+// <i> mbed TLS backend implementation for HMAC using SHA-256.
+
+#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_HMAC_SHA256_ENABLED
+#define NRF_CRYPTO_BACKEND_MBEDTLS_HMAC_SHA256_ENABLED 1
+#endif
+
+// <q> NRF_CRYPTO_BACKEND_MBEDTLS_HMAC_SHA512_ENABLED  - Enable mbed TLS HMAC using SHA-512.
+ 
+
+// <i> mbed TLS backend implementation for HMAC using SHA-512.
+
+#ifndef NRF_CRYPTO_BACKEND_MBEDTLS_HMAC_SHA512_ENABLED
+#define NRF_CRYPTO_BACKEND_MBEDTLS_HMAC_SHA512_ENABLED 1
+#endif
+
+// </e>
+
+// <e> NRF_CRYPTO_BACKEND_MICRO_ECC_ENABLED - Enable the micro-ecc backend.
+//==========================================================
+#ifndef NRF_CRYPTO_BACKEND_MICRO_ECC_ENABLED
+#define NRF_CRYPTO_BACKEND_MICRO_ECC_ENABLED 0
+#endif
+// <q> NRF_CRYPTO_BACKEND_MICRO_ECC_ECC_SECP192R1_ENABLED  - Enable secp192r1 (NIST 192-bit) curve
+ 
+
+// <i> Enable this setting if you need secp192r1 (NIST 192-bit) support using micro-ecc
+
+#ifndef NRF_CRYPTO_BACKEND_MICRO_ECC_ECC_SECP192R1_ENABLED
+#define NRF_CRYPTO_BACKEND_MICRO_ECC_ECC_SECP192R1_ENABLED 1
+#endif
+
+// <q> NRF_CRYPTO_BACKEND_MICRO_ECC_ECC_SECP224R1_ENABLED  - Enable secp224r1 (NIST 224-bit) curve
+ 
+
+// <i> Enable this setting if you need secp224r1 (NIST 224-bit) support using micro-ecc
+
+#ifndef NRF_CRYPTO_BACKEND_MICRO_ECC_ECC_SECP224R1_ENABLED
+#define NRF_CRYPTO_BACKEND_MICRO_ECC_ECC_SECP224R1_ENABLED 1
+#endif
+
+// <q> NRF_CRYPTO_BACKEND_MICRO_ECC_ECC_SECP256R1_ENABLED  - Enable secp256r1 (NIST 256-bit) curve
+ 
+
+// <i> Enable this setting if you need secp256r1 (NIST 256-bit) support using micro-ecc
+
+#ifndef NRF_CRYPTO_BACKEND_MICRO_ECC_ECC_SECP256R1_ENABLED
+#define NRF_CRYPTO_BACKEND_MICRO_ECC_ECC_SECP256R1_ENABLED 1
+#endif
+
+// <q> NRF_CRYPTO_BACKEND_MICRO_ECC_ECC_SECP256K1_ENABLED  - Enable secp256k1 (Koblitz 256-bit) curve
+ 
+
+// <i> Enable this setting if you need secp256k1 (Koblitz 256-bit) support using micro-ecc
+
+#ifndef NRF_CRYPTO_BACKEND_MICRO_ECC_ECC_SECP256K1_ENABLED
+#define NRF_CRYPTO_BACKEND_MICRO_ECC_ECC_SECP256K1_ENABLED 1
+#endif
+
+// </e>
+
+// <e> NRF_CRYPTO_BACKEND_NRF_HW_RNG_ENABLED - Enable the nRF HW RNG backend.
+
+// <i> The nRF HW backend provide access to RNG peripheral in nRF5x devices.
+//==========================================================
+#ifndef NRF_CRYPTO_BACKEND_NRF_HW_RNG_ENABLED
+#define NRF_CRYPTO_BACKEND_NRF_HW_RNG_ENABLED 0
+#endif
+// <q> NRF_CRYPTO_BACKEND_NRF_HW_RNG_MBEDTLS_CTR_DRBG_ENABLED  - Enable mbed TLS CTR-DRBG algorithm.
+ 
+
+// <i> Enable mbed TLS CTR-DRBG standardized by NIST (NIST SP 800-90A Rev. 1). The nRF HW RNG is used as an entropy source for seeding.
+
+#ifndef NRF_CRYPTO_BACKEND_NRF_HW_RNG_MBEDTLS_CTR_DRBG_ENABLED
+#define NRF_CRYPTO_BACKEND_NRF_HW_RNG_MBEDTLS_CTR_DRBG_ENABLED 1
+#endif
+
+// </e>
+
+// <e> NRF_CRYPTO_BACKEND_NRF_SW_ENABLED - Enable the legacy nRFx sw for crypto.
+
+// <i> The nRF SW cryptography backend (only used in bootloader context).
+//==========================================================
+#ifndef NRF_CRYPTO_BACKEND_NRF_SW_ENABLED
+#define NRF_CRYPTO_BACKEND_NRF_SW_ENABLED 0
+#endif
+// <q> NRF_CRYPTO_BACKEND_NRF_SW_HASH_SHA256_ENABLED  - nRF SW hash backend support for SHA-256
+ 
+
+// <i> The nRF SW backend provide access to nRF SDK legacy hash implementation of SHA-256.
+
+#ifndef NRF_CRYPTO_BACKEND_NRF_SW_HASH_SHA256_ENABLED
+#define NRF_CRYPTO_BACKEND_NRF_SW_HASH_SHA256_ENABLED 1
+#endif
+
+// </e>
+
+// <e> NRF_CRYPTO_BACKEND_OBERON_ENABLED - Enable the Oberon backend
+
+// <i> The Oberon backend
+//==========================================================
+#ifndef NRF_CRYPTO_BACKEND_OBERON_ENABLED
+#define NRF_CRYPTO_BACKEND_OBERON_ENABLED 0
+#endif
+// <q> NRF_CRYPTO_BACKEND_OBERON_CHACHA_POLY_ENABLED  - Enable the CHACHA-POLY mode using Oberon.
+ 
+
+#ifndef NRF_CRYPTO_BACKEND_OBERON_CHACHA_POLY_ENABLED
+#define NRF_CRYPTO_BACKEND_OBERON_CHACHA_POLY_ENABLED 1
+#endif
+
+// <q> NRF_CRYPTO_BACKEND_OBERON_ECC_SECP256R1_ENABLED  - Enable secp256r1 curve
+ 
+
+// <i> Enable this setting if you need secp256r1 curve support using Oberon library
+
+#ifndef NRF_CRYPTO_BACKEND_OBERON_ECC_SECP256R1_ENABLED
+#define NRF_CRYPTO_BACKEND_OBERON_ECC_SECP256R1_ENABLED 1
+#endif
+
+// <q> NRF_CRYPTO_BACKEND_OBERON_ECC_CURVE25519_ENABLED  - Enable Curve25519 ECDH
+ 
+
+// <i> Enable this setting if you need Curve25519 ECDH support using Oberon library
+
+#ifndef NRF_CRYPTO_BACKEND_OBERON_ECC_CURVE25519_ENABLED
+#define NRF_CRYPTO_BACKEND_OBERON_ECC_CURVE25519_ENABLED 1
+#endif
+
+// <q> NRF_CRYPTO_BACKEND_OBERON_ECC_ED25519_ENABLED  - Enable Ed25519 signature scheme
+ 
+
+// <i> Enable this setting if you need Ed25519 support using Oberon library
+
+#ifndef NRF_CRYPTO_BACKEND_OBERON_ECC_ED25519_ENABLED
+#define NRF_CRYPTO_BACKEND_OBERON_ECC_ED25519_ENABLED 1
+#endif
+
+// <q> NRF_CRYPTO_BACKEND_OBERON_HASH_SHA256_ENABLED  - Oberon SHA-256 hash functionality
+ 
+
+// <i> Oberon backend implementation for SHA-256.
+
+#ifndef NRF_CRYPTO_BACKEND_OBERON_HASH_SHA256_ENABLED
+#define NRF_CRYPTO_BACKEND_OBERON_HASH_SHA256_ENABLED 1
+#endif
+
+// <q> NRF_CRYPTO_BACKEND_OBERON_HASH_SHA512_ENABLED  - Oberon SHA-512 hash functionality
+ 
+
+// <i> Oberon backend implementation for SHA-512.
+
+#ifndef NRF_CRYPTO_BACKEND_OBERON_HASH_SHA512_ENABLED
+#define NRF_CRYPTO_BACKEND_OBERON_HASH_SHA512_ENABLED 1
+#endif
+
+// <q> NRF_CRYPTO_BACKEND_OBERON_HMAC_SHA256_ENABLED  - Oberon HMAC using SHA-256
+ 
+
+// <i> Oberon backend implementation for HMAC using SHA-256.
+
+#ifndef NRF_CRYPTO_BACKEND_OBERON_HMAC_SHA256_ENABLED
+#define NRF_CRYPTO_BACKEND_OBERON_HMAC_SHA256_ENABLED 1
+#endif
+
+// <q> NRF_CRYPTO_BACKEND_OBERON_HMAC_SHA512_ENABLED  - Oberon HMAC using SHA-512
+ 
+
+// <i> Oberon backend implementation for HMAC using SHA-512.
+
+#ifndef NRF_CRYPTO_BACKEND_OBERON_HMAC_SHA512_ENABLED
+#define NRF_CRYPTO_BACKEND_OBERON_HMAC_SHA512_ENABLED 1
+#endif
+
+// </e>
+
+// <e> NRF_CRYPTO_BACKEND_OPTIGA_ENABLED - Enable the nrf_crypto Optiga Trust X backend.
+
+// <i> Enables the nrf_crypto backend for Optiga Trust X devices.
+//==========================================================
+#ifndef NRF_CRYPTO_BACKEND_OPTIGA_ENABLED
+#define NRF_CRYPTO_BACKEND_OPTIGA_ENABLED 0
+#endif
+// <q> NRF_CRYPTO_BACKEND_OPTIGA_RNG_ENABLED  - Optiga backend support for RNG
+ 
+
+// <i> The Optiga backend provide external chip RNG.
+
+#ifndef NRF_CRYPTO_BACKEND_OPTIGA_RNG_ENABLED
+#define NRF_CRYPTO_BACKEND_OPTIGA_RNG_ENABLED 0
+#endif
+
+// <q> NRF_CRYPTO_BACKEND_OPTIGA_ECC_SECP256R1_ENABLED  - Optiga backend support for ECC secp256r1
+ 
+
+// <i> The Optiga backend provide external chip ECC using secp256r1.
+
+#ifndef NRF_CRYPTO_BACKEND_OPTIGA_ECC_SECP256R1_ENABLED
+#define NRF_CRYPTO_BACKEND_OPTIGA_ECC_SECP256R1_ENABLED 1
+#endif
+
+// </e>
+
+// <q> NRF_CRYPTO_CURVE25519_BIG_ENDIAN_ENABLED  - Big-endian byte order in raw Curve25519 data
+ 
+
+// <i> Enable big-endian byte order in Curve25519 API, if set to 1. Use little-endian, if set to 0.
+
+#ifndef NRF_CRYPTO_CURVE25519_BIG_ENDIAN_ENABLED
+#define NRF_CRYPTO_CURVE25519_BIG_ENDIAN_ENABLED 0
+#endif
+
+// </e>
+
+// </h> 
+//==========================================================
+
+// <h> nRF_DFU 
+
+//==========================================================
+// <h> ble_dfu - Device Firmware Update
+
+//==========================================================
+// <q> BLE_DFU_ENABLED  - Enable DFU Service.
+ 
+
+#ifndef BLE_DFU_ENABLED
+#define BLE_DFU_ENABLED 0
+#endif
+
+// <q> NRF_DFU_BLE_BUTTONLESS_SUPPORTS_BONDS  - Buttonless DFU supports bonds.
+ 
+
+#ifndef NRF_DFU_BLE_BUTTONLESS_SUPPORTS_BONDS
+#define NRF_DFU_BLE_BUTTONLESS_SUPPORTS_BONDS 0
+#endif
+
+// </h> 
+//==========================================================
+
+// </h> 
+//==========================================================
+
+// <h> nRF_Drivers 
+
+//==========================================================
+// <e> COMP_ENABLED - nrf_drv_comp - COMP peripheral driver - legacy layer
+//==========================================================
+#ifndef COMP_ENABLED
+#define COMP_ENABLED 0
+#endif
+// <o> COMP_CONFIG_REF  - Reference voltage
+ 
+// <0=> Internal 1.2V 
+// <1=> Internal 1.8V 
+// <2=> Internal 2.4V 
+// <4=> VDD 
+// <7=> ARef 
+
+#ifndef COMP_CONFIG_REF
+#define COMP_CONFIG_REF 1
+#endif
+
+// <o> COMP_CONFIG_MAIN_MODE  - Main mode
+ 
+// <0=> Single ended 
+// <1=> Differential 
+
+#ifndef COMP_CONFIG_MAIN_MODE
+#define COMP_CONFIG_MAIN_MODE 0
+#endif
+
+// <o> COMP_CONFIG_SPEED_MODE  - Speed mode
+ 
+// <0=> Low power 
+// <1=> Normal 
+// <2=> High speed 
+
+#ifndef COMP_CONFIG_SPEED_MODE
+#define COMP_CONFIG_SPEED_MODE 2
+#endif
+
+// <o> COMP_CONFIG_HYST  - Hystheresis
+ 
+// <0=> No 
+// <1=> 50mV 
+
+#ifndef COMP_CONFIG_HYST
+#define COMP_CONFIG_HYST 0
+#endif
+
+// <o> COMP_CONFIG_ISOURCE  - Current Source
+ 
+// <0=> Off 
+// <1=> 2.5 uA 
+// <2=> 5 uA 
+// <3=> 10 uA 
+
+#ifndef COMP_CONFIG_ISOURCE
+#define COMP_CONFIG_ISOURCE 0
+#endif
+
+// <o> COMP_CONFIG_INPUT  - Analog input
+ 
+// <0=> 0 
+// <1=> 1 
+// <2=> 2 
+// <3=> 3 
+// <4=> 4 
+// <5=> 5 
+// <6=> 6 
+// <7=> 7 
+
+#ifndef COMP_CONFIG_INPUT
+#define COMP_CONFIG_INPUT 0
+#endif
+
+// <o> COMP_CONFIG_IRQ_PRIORITY  - Interrupt priority
+ 
+
+// <i> Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
+// <0=> 0 (highest) 
+// <1=> 1 
+// <2=> 2 
+// <3=> 3 
+// <4=> 4 
+// <5=> 5 
+// <6=> 6 
+// <7=> 7 
+
+#ifndef COMP_CONFIG_IRQ_PRIORITY
+#define COMP_CONFIG_IRQ_PRIORITY 6
+#endif
+
+// </e>
+
+// <q> EGU_ENABLED  - nrf_drv_swi - SWI(EGU) peripheral driver - legacy layer
+ 
+
+#ifndef EGU_ENABLED
+#define EGU_ENABLED 0
+#endif
+
+// <e> GPIOTE_ENABLED - nrf_drv_gpiote - GPIOTE peripheral driver - legacy layer
+//==========================================================
+#ifndef GPIOTE_ENABLED
+#define GPIOTE_ENABLED 1
+#endif
+// <o> GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS - Number of lower power input pins 
+#ifndef GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS
+#define GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS 4
+#endif
+
+// <o> GPIOTE_CONFIG_IRQ_PRIORITY  - Interrupt priority
+ 
+
+// <i> Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
+// <0=> 0 (highest) 
+// <1=> 1 
+// <2=> 2 
+// <3=> 3 
+// <4=> 4 
+// <5=> 5 
+// <6=> 6 
+// <7=> 7 
+
+#ifndef GPIOTE_CONFIG_IRQ_PRIORITY
+#define GPIOTE_CONFIG_IRQ_PRIORITY 6
+#endif
+
+// </e>
+
+// <e> I2S_ENABLED - nrf_drv_i2s - I2S peripheral driver - legacy layer
+//==========================================================
+#ifndef I2S_ENABLED
+#define I2S_ENABLED 0
+#endif
+// <o> I2S_CONFIG_SCK_PIN - SCK pin  <0-31> 
+
+
+#ifndef I2S_CONFIG_SCK_PIN
+#define I2S_CONFIG_SCK_PIN 31
+#endif
+
+// <o> I2S_CONFIG_LRCK_PIN - LRCK pin  <1-31> 
+
+
+#ifndef I2S_CONFIG_LRCK_PIN
+#define I2S_CONFIG_LRCK_PIN 30
+#endif
+
+// <o> I2S_CONFIG_MCK_PIN - MCK pin 
+#ifndef I2S_CONFIG_MCK_PIN
+#define I2S_CONFIG_MCK_PIN 255
+#endif
+
+// <o> I2S_CONFIG_SDOUT_PIN - SDOUT pin  <0-31> 
+
+
+#ifndef I2S_CONFIG_SDOUT_PIN
+#define I2S_CONFIG_SDOUT_PIN 29
+#endif
+
+// <o> I2S_CONFIG_SDIN_PIN - SDIN pin  <0-31> 
+
+
+#ifndef I2S_CONFIG_SDIN_PIN
+#define I2S_CONFIG_SDIN_PIN 28
+#endif
+
+// <o> I2S_CONFIG_MASTER  - Mode
+ 
+// <0=> Master 
+// <1=> Slave 
+
+#ifndef I2S_CONFIG_MASTER
+#define I2S_CONFIG_MASTER 0
+#endif
+
+// <o> I2S_CONFIG_FORMAT  - Format
+ 
+// <0=> I2S 
+// <1=> Aligned 
+
+#ifndef I2S_CONFIG_FORMAT
+#define I2S_CONFIG_FORMAT 0
+#endif
+
+// <o> I2S_CONFIG_ALIGN  - Alignment
+ 
+// <0=> Left 
+// <1=> Right 
+
+#ifndef I2S_CONFIG_ALIGN
+#define I2S_CONFIG_ALIGN 0
+#endif
+
+// <o> I2S_CONFIG_SWIDTH  - Sample width (bits)
+ 
+// <0=> 8 
+// <1=> 16 
+// <2=> 24 
+
+#ifndef I2S_CONFIG_SWIDTH
+#define I2S_CONFIG_SWIDTH 1
+#endif
+
+// <o> I2S_CONFIG_CHANNELS  - Channels
+ 
+// <0=> Stereo 
+// <1=> Left 
+// <2=> Right 
+
+#ifndef I2S_CONFIG_CHANNELS
+#define I2S_CONFIG_CHANNELS 1
+#endif
+
+// <o> I2S_CONFIG_MCK_SETUP  - MCK behavior
+ 
+// <0=> Disabled 
+// <2147483648=> 32MHz/2 
+// <1342177280=> 32MHz/3 
+// <1073741824=> 32MHz/4 
+// <805306368=> 32MHz/5 
+// <671088640=> 32MHz/6 
+// <536870912=> 32MHz/8 
+// <402653184=> 32MHz/10 
+// <369098752=> 32MHz/11 
+// <285212672=> 32MHz/15 
+// <268435456=> 32MHz/16 
+// <201326592=> 32MHz/21 
+// <184549376=> 32MHz/23 
+// <142606336=> 32MHz/30 
+// <138412032=> 32MHz/31 
+// <134217728=> 32MHz/32 
+// <100663296=> 32MHz/42 
+// <68157440=> 32MHz/63 
+// <34340864=> 32MHz/125 
+
+#ifndef I2S_CONFIG_MCK_SETUP
+#define I2S_CONFIG_MCK_SETUP 536870912
+#endif
+
+// <o> I2S_CONFIG_RATIO  - MCK/LRCK ratio
+ 
+// <0=> 32x 
+// <1=> 48x 
+// <2=> 64x 
+// <3=> 96x 
+// <4=> 128x 
+// <5=> 192x 
+// <6=> 256x 
+// <7=> 384x 
+// <8=> 512x 
+
+#ifndef I2S_CONFIG_RATIO
+#define I2S_CONFIG_RATIO 2000
+#endif
+
+// <o> I2S_CONFIG_IRQ_PRIORITY  - Interrupt priority
+ 
+
+// <i> Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
+// <0=> 0 (highest) 
+// <1=> 1 
+// <2=> 2 
+// <3=> 3 
+// <4=> 4 
+// <5=> 5 
+// <6=> 6 
+// <7=> 7 
+
+#ifndef I2S_CONFIG_IRQ_PRIORITY
+#define I2S_CONFIG_IRQ_PRIORITY 6
+#endif
+
+// <e> I2S_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef I2S_CONFIG_LOG_ENABLED
+#define I2S_CONFIG_LOG_ENABLED 0
+#endif
+// <o> I2S_CONFIG_LOG_LEVEL  - Default Severity level
+ 
+// <0=> Off 
+// <1=> Error 
+// <2=> Warning 
+// <3=> Info 
+// <4=> Debug 
+
+#ifndef I2S_CONFIG_LOG_LEVEL
+#define I2S_CONFIG_LOG_LEVEL 3
+#endif
+
+// <o> I2S_CONFIG_INFO_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef I2S_CONFIG_INFO_COLOR
+#define I2S_CONFIG_INFO_COLOR 0
+#endif
+
+// <o> I2S_CONFIG_DEBUG_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef I2S_CONFIG_DEBUG_COLOR
+#define I2S_CONFIG_DEBUG_COLOR 0
+#endif
+
+// </e>
+
+// </e>
+
+// <e> LPCOMP_ENABLED - nrf_drv_lpcomp - LPCOMP peripheral driver - legacy layer
+//==========================================================
+#ifndef LPCOMP_ENABLED
+#define LPCOMP_ENABLED 0
+#endif
+// <o> LPCOMP_CONFIG_REFERENCE  - Reference voltage
+ 
+// <0=> Supply 1/8 
+// <1=> Supply 2/8 
+// <2=> Supply 3/8 
+// <3=> Supply 4/8 
+// <4=> Supply 5/8 
+// <5=> Supply 6/8 
+// <6=> Supply 7/8 
+// <8=> Supply 1/16 (nRF52) 
+// <9=> Supply 3/16 (nRF52) 
+// <10=> Supply 5/16 (nRF52) 
+// <11=> Supply 7/16 (nRF52) 
+// <12=> Supply 9/16 (nRF52) 
+// <13=> Supply 11/16 (nRF52) 
+// <14=> Supply 13/16 (nRF52) 
+// <15=> Supply 15/16 (nRF52) 
+// <7=> External Ref 0 
+// <65543=> External Ref 1 
+
+#ifndef LPCOMP_CONFIG_REFERENCE
+#define LPCOMP_CONFIG_REFERENCE 3
+#endif
+
+// <o> LPCOMP_CONFIG_DETECTION  - Detection
+ 
+// <0=> Crossing 
+// <1=> Up 
+// <2=> Down 
+
+#ifndef LPCOMP_CONFIG_DETECTION
+#define LPCOMP_CONFIG_DETECTION 2
+#endif
+
+// <o> LPCOMP_CONFIG_INPUT  - Analog input
+ 
+// <0=> 0 
+// <1=> 1 
+// <2=> 2 
+// <3=> 3 
+// <4=> 4 
+// <5=> 5 
+// <6=> 6 
+// <7=> 7 
+
+#ifndef LPCOMP_CONFIG_INPUT
+#define LPCOMP_CONFIG_INPUT 0
+#endif
+
+// <q> LPCOMP_CONFIG_HYST  - Hysteresis
+ 
+
+#ifndef LPCOMP_CONFIG_HYST
+#define LPCOMP_CONFIG_HYST 0
+#endif
+
+// <o> LPCOMP_CONFIG_IRQ_PRIORITY  - Interrupt priority
+ 
+
+// <i> Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
+// <0=> 0 (highest) 
+// <1=> 1 
+// <2=> 2 
+// <3=> 3 
+// <4=> 4 
+// <5=> 5 
+// <6=> 6 
+// <7=> 7 
+
+#ifndef LPCOMP_CONFIG_IRQ_PRIORITY
+#define LPCOMP_CONFIG_IRQ_PRIORITY 6
+#endif
+
+// </e>
+
+// <e> NRFX_CLOCK_ENABLED - nrfx_clock - CLOCK peripheral driver
+//==========================================================
+#ifndef NRFX_CLOCK_ENABLED
+#define NRFX_CLOCK_ENABLED 1
+#endif
+// <o> NRFX_CLOCK_CONFIG_LF_SRC  - LF Clock Source
+ 
+// <0=> RC 
+// <1=> XTAL 
+// <2=> Synth 
+// <131073=> External Low Swing 
+// <196609=> External Full Swing 
+
+#ifndef NRFX_CLOCK_CONFIG_LF_SRC
+#define NRFX_CLOCK_CONFIG_LF_SRC 1
+#endif
+
+// <o> NRFX_CLOCK_CONFIG_IRQ_PRIORITY  - Interrupt priority
+ 
+// <0=> 0 (highest) 
+// <1=> 1 
+// <2=> 2 
+// <3=> 3 
+// <4=> 4 
+// <5=> 5 
+// <6=> 6 
+// <7=> 7 
+
+#ifndef NRFX_CLOCK_CONFIG_IRQ_PRIORITY
+#define NRFX_CLOCK_CONFIG_IRQ_PRIORITY 6
+#endif
+
+// <e> NRFX_CLOCK_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef NRFX_CLOCK_CONFIG_LOG_ENABLED
+#define NRFX_CLOCK_CONFIG_LOG_ENABLED 0
+#endif
+// <o> NRFX_CLOCK_CONFIG_LOG_LEVEL  - Default Severity level
+ 
+// <0=> Off 
+// <1=> Error 
+// <2=> Warning 
+// <3=> Info 
+// <4=> Debug 
+
+#ifndef NRFX_CLOCK_CONFIG_LOG_LEVEL
+#define NRFX_CLOCK_CONFIG_LOG_LEVEL 3
+#endif
+
+// <o> NRFX_CLOCK_CONFIG_INFO_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef NRFX_CLOCK_CONFIG_INFO_COLOR
+#define NRFX_CLOCK_CONFIG_INFO_COLOR 0
+#endif
+
+// <o> NRFX_CLOCK_CONFIG_DEBUG_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef NRFX_CLOCK_CONFIG_DEBUG_COLOR
+#define NRFX_CLOCK_CONFIG_DEBUG_COLOR 0
+#endif
+
+// </e>
+
+// </e>
+
+// <e> NRFX_COMP_ENABLED - nrfx_comp - COMP peripheral driver
+//==========================================================
+#ifndef NRFX_COMP_ENABLED
+#define NRFX_COMP_ENABLED 0
+#endif
+// <o> NRFX_COMP_CONFIG_REF  - Reference voltage
+ 
+// <0=> Internal 1.2V 
+// <1=> Internal 1.8V 
+// <2=> Internal 2.4V 
+// <4=> VDD 
+// <7=> ARef 
+
+#ifndef NRFX_COMP_CONFIG_REF
+#define NRFX_COMP_CONFIG_REF 1
+#endif
+
+// <o> NRFX_COMP_CONFIG_MAIN_MODE  - Main mode
+ 
+// <0=> Single ended 
+// <1=> Differential 
+
+#ifndef NRFX_COMP_CONFIG_MAIN_MODE
+#define NRFX_COMP_CONFIG_MAIN_MODE 0
+#endif
+
+// <o> NRFX_COMP_CONFIG_SPEED_MODE  - Speed mode
+ 
+// <0=> Low power 
+// <1=> Normal 
+// <2=> High speed 
+
+#ifndef NRFX_COMP_CONFIG_SPEED_MODE
+#define NRFX_COMP_CONFIG_SPEED_MODE 2
+#endif
+
+// <o> NRFX_COMP_CONFIG_HYST  - Hystheresis
+ 
+// <0=> No 
+// <1=> 50mV 
+
+#ifndef NRFX_COMP_CONFIG_HYST
+#define NRFX_COMP_CONFIG_HYST 0
+#endif
+
+// <o> NRFX_COMP_CONFIG_ISOURCE  - Current Source
+ 
+// <0=> Off 
+// <1=> 2.5 uA 
+// <2=> 5 uA 
+// <3=> 10 uA 
+
+#ifndef NRFX_COMP_CONFIG_ISOURCE
+#define NRFX_COMP_CONFIG_ISOURCE 0
+#endif
+
+// <o> NRFX_COMP_CONFIG_INPUT  - Analog input
+ 
+// <0=> 0 
+// <1=> 1 
+// <2=> 2 
+// <3=> 3 
+// <4=> 4 
+// <5=> 5 
+// <6=> 6 
+// <7=> 7 
+
+#ifndef NRFX_COMP_CONFIG_INPUT
+#define NRFX_COMP_CONFIG_INPUT 0
+#endif
+
+// <o> NRFX_COMP_CONFIG_IRQ_PRIORITY  - Interrupt priority
+ 
+// <0=> 0 (highest) 
+// <1=> 1 
+// <2=> 2 
+// <3=> 3 
+// <4=> 4 
+// <5=> 5 
+// <6=> 6 
+// <7=> 7 
+
+#ifndef NRFX_COMP_CONFIG_IRQ_PRIORITY
+#define NRFX_COMP_CONFIG_IRQ_PRIORITY 6
+#endif
+
+// <e> NRFX_COMP_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef NRFX_COMP_CONFIG_LOG_ENABLED
+#define NRFX_COMP_CONFIG_LOG_ENABLED 0
+#endif
+// <o> NRFX_COMP_CONFIG_LOG_LEVEL  - Default Severity level
+ 
+// <0=> Off 
+// <1=> Error 
+// <2=> Warning 
+// <3=> Info 
+// <4=> Debug 
+
+#ifndef NRFX_COMP_CONFIG_LOG_LEVEL
+#define NRFX_COMP_CONFIG_LOG_LEVEL 3
+#endif
+
+// <o> NRFX_COMP_CONFIG_INFO_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef NRFX_COMP_CONFIG_INFO_COLOR
+#define NRFX_COMP_CONFIG_INFO_COLOR 0
+#endif
+
+// <o> NRFX_COMP_CONFIG_DEBUG_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef NRFX_COMP_CONFIG_DEBUG_COLOR
+#define NRFX_COMP_CONFIG_DEBUG_COLOR 0
+#endif
+
+// </e>
+
+// </e>
+
+// <e> NRFX_GPIOTE_ENABLED - nrfx_gpiote - GPIOTE peripheral driver
+//==========================================================
+#ifndef NRFX_GPIOTE_ENABLED
+#define NRFX_GPIOTE_ENABLED 1
+#endif
+// <o> NRFX_GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS - Number of lower power input pins 
+#ifndef NRFX_GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS
+#define NRFX_GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS 1
+#endif
+
+// <o> NRFX_GPIOTE_CONFIG_IRQ_PRIORITY  - Interrupt priority
+ 
+// <0=> 0 (highest) 
+// <1=> 1 
+// <2=> 2 
+// <3=> 3 
+// <4=> 4 
+// <5=> 5 
+// <6=> 6 
+// <7=> 7 
+
+#ifndef NRFX_GPIOTE_CONFIG_IRQ_PRIORITY
+#define NRFX_GPIOTE_CONFIG_IRQ_PRIORITY 6
+#endif
+
+// <e> NRFX_GPIOTE_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef NRFX_GPIOTE_CONFIG_LOG_ENABLED
+#define NRFX_GPIOTE_CONFIG_LOG_ENABLED 0
+#endif
+// <o> NRFX_GPIOTE_CONFIG_LOG_LEVEL  - Default Severity level
+ 
+// <0=> Off 
+// <1=> Error 
+// <2=> Warning 
+// <3=> Info 
+// <4=> Debug 
+
+#ifndef NRFX_GPIOTE_CONFIG_LOG_LEVEL
+#define NRFX_GPIOTE_CONFIG_LOG_LEVEL 3
+#endif
+
+// <o> NRFX_GPIOTE_CONFIG_INFO_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef NRFX_GPIOTE_CONFIG_INFO_COLOR
+#define NRFX_GPIOTE_CONFIG_INFO_COLOR 0
+#endif
+
+// <o> NRFX_GPIOTE_CONFIG_DEBUG_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef NRFX_GPIOTE_CONFIG_DEBUG_COLOR
+#define NRFX_GPIOTE_CONFIG_DEBUG_COLOR 0
+#endif
+
+// </e>
+
+// </e>
+
+// <e> NRFX_I2S_ENABLED - nrfx_i2s - I2S peripheral driver
+//==========================================================
+#ifndef NRFX_I2S_ENABLED
+#define NRFX_I2S_ENABLED 0
+#endif
+// <o> NRFX_I2S_CONFIG_SCK_PIN - SCK pin  <0-31> 
+
+
+#ifndef NRFX_I2S_CONFIG_SCK_PIN
+#define NRFX_I2S_CONFIG_SCK_PIN 31
+#endif
+
+// <o> NRFX_I2S_CONFIG_LRCK_PIN - LRCK pin  <1-31> 
+
+
+#ifndef NRFX_I2S_CONFIG_LRCK_PIN
+#define NRFX_I2S_CONFIG_LRCK_PIN 30
+#endif
+
+// <o> NRFX_I2S_CONFIG_MCK_PIN - MCK pin 
+#ifndef NRFX_I2S_CONFIG_MCK_PIN
+#define NRFX_I2S_CONFIG_MCK_PIN 255
+#endif
+
+// <o> NRFX_I2S_CONFIG_SDOUT_PIN - SDOUT pin  <0-31> 
+
+
+#ifndef NRFX_I2S_CONFIG_SDOUT_PIN
+#define NRFX_I2S_CONFIG_SDOUT_PIN 29
+#endif
+
+// <o> NRFX_I2S_CONFIG_SDIN_PIN - SDIN pin  <0-31> 
+
+
+#ifndef NRFX_I2S_CONFIG_SDIN_PIN
+#define NRFX_I2S_CONFIG_SDIN_PIN 28
+#endif
+
+// <o> NRFX_I2S_CONFIG_MASTER  - Mode
+ 
+// <0=> Master 
+// <1=> Slave 
+
+#ifndef NRFX_I2S_CONFIG_MASTER
+#define NRFX_I2S_CONFIG_MASTER 0
+#endif
+
+// <o> NRFX_I2S_CONFIG_FORMAT  - Format
+ 
+// <0=> I2S 
+// <1=> Aligned 
+
+#ifndef NRFX_I2S_CONFIG_FORMAT
+#define NRFX_I2S_CONFIG_FORMAT 0
+#endif
+
+// <o> NRFX_I2S_CONFIG_ALIGN  - Alignment
+ 
+// <0=> Left 
+// <1=> Right 
+
+#ifndef NRFX_I2S_CONFIG_ALIGN
+#define NRFX_I2S_CONFIG_ALIGN 0
+#endif
+
+// <o> NRFX_I2S_CONFIG_SWIDTH  - Sample width (bits)
+ 
+// <0=> 8 
+// <1=> 16 
+// <2=> 24 
+
+#ifndef NRFX_I2S_CONFIG_SWIDTH
+#define NRFX_I2S_CONFIG_SWIDTH 1
+#endif
+
+// <o> NRFX_I2S_CONFIG_CHANNELS  - Channels
+ 
+// <0=> Stereo 
+// <1=> Left 
+// <2=> Right 
+
+#ifndef NRFX_I2S_CONFIG_CHANNELS
+#define NRFX_I2S_CONFIG_CHANNELS 1
+#endif
+
+// <o> NRFX_I2S_CONFIG_MCK_SETUP  - MCK behavior
+ 
+// <0=> Disabled 
+// <2147483648=> 32MHz/2 
+// <1342177280=> 32MHz/3 
+// <1073741824=> 32MHz/4 
+// <805306368=> 32MHz/5 
+// <671088640=> 32MHz/6 
+// <536870912=> 32MHz/8 
+// <402653184=> 32MHz/10 
+// <369098752=> 32MHz/11 
+// <285212672=> 32MHz/15 
+// <268435456=> 32MHz/16 
+// <201326592=> 32MHz/21 
+// <184549376=> 32MHz/23 
+// <142606336=> 32MHz/30 
+// <138412032=> 32MHz/31 
+// <134217728=> 32MHz/32 
+// <100663296=> 32MHz/42 
+// <68157440=> 32MHz/63 
+// <34340864=> 32MHz/125 
+
+#ifndef NRFX_I2S_CONFIG_MCK_SETUP
+#define NRFX_I2S_CONFIG_MCK_SETUP 536870912
+#endif
+
+// <o> NRFX_I2S_CONFIG_RATIO  - MCK/LRCK ratio
+ 
+// <0=> 32x 
+// <1=> 48x 
+// <2=> 64x 
+// <3=> 96x 
+// <4=> 128x 
+// <5=> 192x 
+// <6=> 256x 
+// <7=> 384x 
+// <8=> 512x 
+
+#ifndef NRFX_I2S_CONFIG_RATIO
+#define NRFX_I2S_CONFIG_RATIO 2000
+#endif
+
+// <o> NRFX_I2S_CONFIG_IRQ_PRIORITY  - Interrupt priority
+ 
+// <0=> 0 (highest) 
+// <1=> 1 
+// <2=> 2 
+// <3=> 3 
+// <4=> 4 
+// <5=> 5 
+// <6=> 6 
+// <7=> 7 
+
+#ifndef NRFX_I2S_CONFIG_IRQ_PRIORITY
+#define NRFX_I2S_CONFIG_IRQ_PRIORITY 6
+#endif
+
+// <e> NRFX_I2S_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef NRFX_I2S_CONFIG_LOG_ENABLED
+#define NRFX_I2S_CONFIG_LOG_ENABLED 0
+#endif
+// <o> NRFX_I2S_CONFIG_LOG_LEVEL  - Default Severity level
+ 
+// <0=> Off 
+// <1=> Error 
+// <2=> Warning 
+// <3=> Info 
+// <4=> Debug 
+
+#ifndef NRFX_I2S_CONFIG_LOG_LEVEL
+#define NRFX_I2S_CONFIG_LOG_LEVEL 3
+#endif
+
+// <o> NRFX_I2S_CONFIG_INFO_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef NRFX_I2S_CONFIG_INFO_COLOR
+#define NRFX_I2S_CONFIG_INFO_COLOR 0
+#endif
+
+// <o> NRFX_I2S_CONFIG_DEBUG_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef NRFX_I2S_CONFIG_DEBUG_COLOR
+#define NRFX_I2S_CONFIG_DEBUG_COLOR 0
+#endif
+
+// </e>
+
+// </e>
+
+// <e> NRFX_LPCOMP_ENABLED - nrfx_lpcomp - LPCOMP peripheral driver
+//==========================================================
+#ifndef NRFX_LPCOMP_ENABLED
+#define NRFX_LPCOMP_ENABLED 0
+#endif
+// <o> NRFX_LPCOMP_CONFIG_REFERENCE  - Reference voltage
+ 
+// <0=> Supply 1/8 
+// <1=> Supply 2/8 
+// <2=> Supply 3/8 
+// <3=> Supply 4/8 
+// <4=> Supply 5/8 
+// <5=> Supply 6/8 
+// <6=> Supply 7/8 
+// <8=> Supply 1/16 (nRF52) 
+// <9=> Supply 3/16 (nRF52) 
+// <10=> Supply 5/16 (nRF52) 
+// <11=> Supply 7/16 (nRF52) 
+// <12=> Supply 9/16 (nRF52) 
+// <13=> Supply 11/16 (nRF52) 
+// <14=> Supply 13/16 (nRF52) 
+// <15=> Supply 15/16 (nRF52) 
+// <7=> External Ref 0 
+// <65543=> External Ref 1 
+
+#ifndef NRFX_LPCOMP_CONFIG_REFERENCE
+#define NRFX_LPCOMP_CONFIG_REFERENCE 3
+#endif
+
+// <o> NRFX_LPCOMP_CONFIG_DETECTION  - Detection
+ 
+// <0=> Crossing 
+// <1=> Up 
+// <2=> Down 
+
+#ifndef NRFX_LPCOMP_CONFIG_DETECTION
+#define NRFX_LPCOMP_CONFIG_DETECTION 2
+#endif
+
+// <o> NRFX_LPCOMP_CONFIG_INPUT  - Analog input
+ 
+// <0=> 0 
+// <1=> 1 
+// <2=> 2 
+// <3=> 3 
+// <4=> 4 
+// <5=> 5 
+// <6=> 6 
+// <7=> 7 
+
+#ifndef NRFX_LPCOMP_CONFIG_INPUT
+#define NRFX_LPCOMP_CONFIG_INPUT 0
+#endif
+
+// <q> NRFX_LPCOMP_CONFIG_HYST  - Hysteresis
+ 
+
+#ifndef NRFX_LPCOMP_CONFIG_HYST
+#define NRFX_LPCOMP_CONFIG_HYST 0
+#endif
+
+// <o> NRFX_LPCOMP_CONFIG_IRQ_PRIORITY  - Interrupt priority
+ 
+// <0=> 0 (highest) 
+// <1=> 1 
+// <2=> 2 
+// <3=> 3 
+// <4=> 4 
+// <5=> 5 
+// <6=> 6 
+// <7=> 7 
+
+#ifndef NRFX_LPCOMP_CONFIG_IRQ_PRIORITY
+#define NRFX_LPCOMP_CONFIG_IRQ_PRIORITY 6
+#endif
+
+// <e> NRFX_LPCOMP_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef NRFX_LPCOMP_CONFIG_LOG_ENABLED
+#define NRFX_LPCOMP_CONFIG_LOG_ENABLED 0
+#endif
+// <o> NRFX_LPCOMP_CONFIG_LOG_LEVEL  - Default Severity level
+ 
+// <0=> Off 
+// <1=> Error 
+// <2=> Warning 
+// <3=> Info 
+// <4=> Debug 
+
+#ifndef NRFX_LPCOMP_CONFIG_LOG_LEVEL
+#define NRFX_LPCOMP_CONFIG_LOG_LEVEL 3
+#endif
+
+// <o> NRFX_LPCOMP_CONFIG_INFO_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef NRFX_LPCOMP_CONFIG_INFO_COLOR
+#define NRFX_LPCOMP_CONFIG_INFO_COLOR 0
+#endif
+
+// <o> NRFX_LPCOMP_CONFIG_DEBUG_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef NRFX_LPCOMP_CONFIG_DEBUG_COLOR
+#define NRFX_LPCOMP_CONFIG_DEBUG_COLOR 0
+#endif
+
+// </e>
+
+// </e>
+
+// <e> NRFX_NFCT_ENABLED - nrfx_nfct - NFCT peripheral driver
+//==========================================================
+#ifndef NRFX_NFCT_ENABLED
+#define NRFX_NFCT_ENABLED 0
+#endif
+// <o> NRFX_NFCT_CONFIG_IRQ_PRIORITY  - Interrupt priority
+ 
+// <0=> 0 (highest) 
+// <1=> 1 
+// <2=> 2 
+// <3=> 3 
+// <4=> 4 
+// <5=> 5 
+// <6=> 6 
+// <7=> 7 
+
+#ifndef NRFX_NFCT_CONFIG_IRQ_PRIORITY
+#define NRFX_NFCT_CONFIG_IRQ_PRIORITY 6
+#endif
+
+// <e> NRFX_NFCT_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef NRFX_NFCT_CONFIG_LOG_ENABLED
+#define NRFX_NFCT_CONFIG_LOG_ENABLED 0
+#endif
+// <o> NRFX_NFCT_CONFIG_LOG_LEVEL  - Default Severity level
+ 
+// <0=> Off 
+// <1=> Error 
+// <2=> Warning 
+// <3=> Info 
+// <4=> Debug 
+
+#ifndef NRFX_NFCT_CONFIG_LOG_LEVEL
+#define NRFX_NFCT_CONFIG_LOG_LEVEL 3
+#endif
+
+// <o> NRFX_NFCT_CONFIG_INFO_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef NRFX_NFCT_CONFIG_INFO_COLOR
+#define NRFX_NFCT_CONFIG_INFO_COLOR 0
+#endif
+
+// <o> NRFX_NFCT_CONFIG_DEBUG_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef NRFX_NFCT_CONFIG_DEBUG_COLOR
+#define NRFX_NFCT_CONFIG_DEBUG_COLOR 0
+#endif
+
+// </e>
+
+// </e>
+
+// <e> NRFX_PDM_ENABLED - nrfx_pdm - PDM peripheral driver
+//==========================================================
+#ifndef NRFX_PDM_ENABLED
+#define NRFX_PDM_ENABLED 0
+#endif
+// <o> NRFX_PDM_CONFIG_MODE  - Mode
+ 
+// <0=> Stereo 
+// <1=> Mono 
+
+#ifndef NRFX_PDM_CONFIG_MODE
+#define NRFX_PDM_CONFIG_MODE 1
+#endif
+
+// <o> NRFX_PDM_CONFIG_EDGE  - Edge
+ 
+// <0=> Left falling 
+// <1=> Left rising 
+
+#ifndef NRFX_PDM_CONFIG_EDGE
+#define NRFX_PDM_CONFIG_EDGE 0
+#endif
+
+// <o> NRFX_PDM_CONFIG_CLOCK_FREQ  - Clock frequency
+ 
+// <134217728=> 1000k 
+// <138412032=> 1032k (default) 
+// <142606336=> 1067k 
+
+#ifndef NRFX_PDM_CONFIG_CLOCK_FREQ
+#define NRFX_PDM_CONFIG_CLOCK_FREQ 138412032
+#endif
+
+// <o> NRFX_PDM_CONFIG_IRQ_PRIORITY  - Interrupt priority
+ 
+// <0=> 0 (highest) 
+// <1=> 1 
+// <2=> 2 
+// <3=> 3 
+// <4=> 4 
+// <5=> 5 
+// <6=> 6 
+// <7=> 7 
+
+#ifndef NRFX_PDM_CONFIG_IRQ_PRIORITY
+#define NRFX_PDM_CONFIG_IRQ_PRIORITY 6
+#endif
+
+// <e> NRFX_PDM_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef NRFX_PDM_CONFIG_LOG_ENABLED
+#define NRFX_PDM_CONFIG_LOG_ENABLED 0
+#endif
+// <o> NRFX_PDM_CONFIG_LOG_LEVEL  - Default Severity level
+ 
+// <0=> Off 
+// <1=> Error 
+// <2=> Warning 
+// <3=> Info 
+// <4=> Debug 
+
+#ifndef NRFX_PDM_CONFIG_LOG_LEVEL
+#define NRFX_PDM_CONFIG_LOG_LEVEL 3
+#endif
+
+// <o> NRFX_PDM_CONFIG_INFO_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef NRFX_PDM_CONFIG_INFO_COLOR
+#define NRFX_PDM_CONFIG_INFO_COLOR 0
+#endif
+
+// <o> NRFX_PDM_CONFIG_DEBUG_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef NRFX_PDM_CONFIG_DEBUG_COLOR
+#define NRFX_PDM_CONFIG_DEBUG_COLOR 0
+#endif
+
+// </e>
+
+// </e>
+
+// <e> NRFX_POWER_ENABLED - nrfx_power - POWER peripheral driver
+//==========================================================
+#ifndef NRFX_POWER_ENABLED
+#define NRFX_POWER_ENABLED 0
+#endif
+// <o> NRFX_POWER_CONFIG_IRQ_PRIORITY  - Interrupt priority
+ 
+// <0=> 0 (highest) 
+// <1=> 1 
+// <2=> 2 
+// <3=> 3 
+// <4=> 4 
+// <5=> 5 
+// <6=> 6 
+// <7=> 7 
+
+#ifndef NRFX_POWER_CONFIG_IRQ_PRIORITY
+#define NRFX_POWER_CONFIG_IRQ_PRIORITY 6
+#endif
+
+// <q> NRFX_POWER_CONFIG_DEFAULT_DCDCEN  - The default configuration of main DCDC regulator
+ 
+
+// <i> This settings means only that components for DCDC regulator are installed and it can be enabled.
+
+#ifndef NRFX_POWER_CONFIG_DEFAULT_DCDCEN
+#define NRFX_POWER_CONFIG_DEFAULT_DCDCEN 0
+#endif
+
+// <q> NRFX_POWER_CONFIG_DEFAULT_DCDCENHV  - The default configuration of High Voltage DCDC regulator
+ 
+
+// <i> This settings means only that components for DCDC regulator are installed and it can be enabled.
+
+#ifndef NRFX_POWER_CONFIG_DEFAULT_DCDCENHV
+#define NRFX_POWER_CONFIG_DEFAULT_DCDCENHV 0
+#endif
+
+// </e>
+
+// <e> NRFX_PPI_ENABLED - nrfx_ppi - PPI peripheral allocator
+//==========================================================
+#ifndef NRFX_PPI_ENABLED
+#define NRFX_PPI_ENABLED 0
+#endif
+// <e> NRFX_PPI_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef NRFX_PPI_CONFIG_LOG_ENABLED
+#define NRFX_PPI_CONFIG_LOG_ENABLED 0
+#endif
+// <o> NRFX_PPI_CONFIG_LOG_LEVEL  - Default Severity level
+ 
+// <0=> Off 
+// <1=> Error 
+// <2=> Warning 
+// <3=> Info 
+// <4=> Debug 
+
+#ifndef NRFX_PPI_CONFIG_LOG_LEVEL
+#define NRFX_PPI_CONFIG_LOG_LEVEL 3
+#endif
+
+// <o> NRFX_PPI_CONFIG_INFO_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef NRFX_PPI_CONFIG_INFO_COLOR
+#define NRFX_PPI_CONFIG_INFO_COLOR 0
+#endif
+
+// <o> NRFX_PPI_CONFIG_DEBUG_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef NRFX_PPI_CONFIG_DEBUG_COLOR
+#define NRFX_PPI_CONFIG_DEBUG_COLOR 0
+#endif
+
+// </e>
+
+// </e>
+
+// <e> NRFX_PRS_ENABLED - nrfx_prs - Peripheral Resource Sharing module
+//==========================================================
+#ifndef NRFX_PRS_ENABLED
+#define NRFX_PRS_ENABLED 1
+#endif
+// <q> NRFX_PRS_BOX_0_ENABLED  - Enables box 0 in the module.
+ 
+
+#ifndef NRFX_PRS_BOX_0_ENABLED
+#define NRFX_PRS_BOX_0_ENABLED 0
+#endif
+
+// <q> NRFX_PRS_BOX_1_ENABLED  - Enables box 1 in the module.
+ 
+
+#ifndef NRFX_PRS_BOX_1_ENABLED
+#define NRFX_PRS_BOX_1_ENABLED 0
+#endif
+
+// <q> NRFX_PRS_BOX_2_ENABLED  - Enables box 2 in the module.
+ 
+
+#ifndef NRFX_PRS_BOX_2_ENABLED
+#define NRFX_PRS_BOX_2_ENABLED 0
+#endif
+
+// <q> NRFX_PRS_BOX_3_ENABLED  - Enables box 3 in the module.
+ 
+
+#ifndef NRFX_PRS_BOX_3_ENABLED
+#define NRFX_PRS_BOX_3_ENABLED 0
+#endif
+
+// <q> NRFX_PRS_BOX_4_ENABLED  - Enables box 4 in the module.
+ 
+
+#ifndef NRFX_PRS_BOX_4_ENABLED
+#define NRFX_PRS_BOX_4_ENABLED 1
+#endif
+
+// <e> NRFX_PRS_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef NRFX_PRS_CONFIG_LOG_ENABLED
+#define NRFX_PRS_CONFIG_LOG_ENABLED 0
+#endif
+// <o> NRFX_PRS_CONFIG_LOG_LEVEL  - Default Severity level
+ 
+// <0=> Off 
+// <1=> Error 
+// <2=> Warning 
+// <3=> Info 
+// <4=> Debug 
+
+#ifndef NRFX_PRS_CONFIG_LOG_LEVEL
+#define NRFX_PRS_CONFIG_LOG_LEVEL 3
+#endif
+
+// <o> NRFX_PRS_CONFIG_INFO_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef NRFX_PRS_CONFIG_INFO_COLOR
+#define NRFX_PRS_CONFIG_INFO_COLOR 0
+#endif
+
+// <o> NRFX_PRS_CONFIG_DEBUG_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef NRFX_PRS_CONFIG_DEBUG_COLOR
+#define NRFX_PRS_CONFIG_DEBUG_COLOR 0
+#endif
+
+// </e>
+
+// </e>
+
+// <e> NRFX_PWM_ENABLED - nrfx_pwm - PWM peripheral driver
+//==========================================================
+#ifndef NRFX_PWM_ENABLED
+#define NRFX_PWM_ENABLED 0
+#endif
+// <q> NRFX_PWM0_ENABLED  - Enable PWM0 instance
+ 
+
+#ifndef NRFX_PWM0_ENABLED
+#define NRFX_PWM0_ENABLED 0
+#endif
+
+// <q> NRFX_PWM1_ENABLED  - Enable PWM1 instance
+ 
+
+#ifndef NRFX_PWM1_ENABLED
+#define NRFX_PWM1_ENABLED 0
+#endif
+
+// <q> NRFX_PWM2_ENABLED  - Enable PWM2 instance
+ 
+
+#ifndef NRFX_PWM2_ENABLED
+#define NRFX_PWM2_ENABLED 0
+#endif
+
+// <o> NRFX_PWM_DEFAULT_CONFIG_OUT0_PIN - Out0 pin  <0-31> 
+
+
+#ifndef NRFX_PWM_DEFAULT_CONFIG_OUT0_PIN
+#define NRFX_PWM_DEFAULT_CONFIG_OUT0_PIN 31
+#endif
+
+// <o> NRFX_PWM_DEFAULT_CONFIG_OUT1_PIN - Out1 pin  <0-31> 
+
+
+#ifndef NRFX_PWM_DEFAULT_CONFIG_OUT1_PIN
+#define NRFX_PWM_DEFAULT_CONFIG_OUT1_PIN 31
+#endif
+
+// <o> NRFX_PWM_DEFAULT_CONFIG_OUT2_PIN - Out2 pin  <0-31> 
+
+
+#ifndef NRFX_PWM_DEFAULT_CONFIG_OUT2_PIN
+#define NRFX_PWM_DEFAULT_CONFIG_OUT2_PIN 31
+#endif
+
+// <o> NRFX_PWM_DEFAULT_CONFIG_OUT3_PIN - Out3 pin  <0-31> 
+
+
+#ifndef NRFX_PWM_DEFAULT_CONFIG_OUT3_PIN
+#define NRFX_PWM_DEFAULT_CONFIG_OUT3_PIN 31
+#endif
+
+// <o> NRFX_PWM_DEFAULT_CONFIG_BASE_CLOCK  - Base clock
+ 
+// <0=> 16 MHz 
+// <1=> 8 MHz 
+// <2=> 4 MHz 
+// <3=> 2 MHz 
+// <4=> 1 MHz 
+// <5=> 500 kHz 
+// <6=> 250 kHz 
+// <7=> 125 kHz 
+
+#ifndef NRFX_PWM_DEFAULT_CONFIG_BASE_CLOCK
+#define NRFX_PWM_DEFAULT_CONFIG_BASE_CLOCK 4
+#endif
+
+// <o> NRFX_PWM_DEFAULT_CONFIG_COUNT_MODE  - Count mode
+ 
+// <0=> Up 
+// <1=> Up and Down 
+
+#ifndef NRFX_PWM_DEFAULT_CONFIG_COUNT_MODE
+#define NRFX_PWM_DEFAULT_CONFIG_COUNT_MODE 0
+#endif
+
+// <o> NRFX_PWM_DEFAULT_CONFIG_TOP_VALUE - Top value 
+#ifndef NRFX_PWM_DEFAULT_CONFIG_TOP_VALUE
+#define NRFX_PWM_DEFAULT_CONFIG_TOP_VALUE 1000
+#endif
+
+// <o> NRFX_PWM_DEFAULT_CONFIG_LOAD_MODE  - Load mode
+ 
+// <0=> Common 
+// <1=> Grouped 
+// <2=> Individual 
+// <3=> Waveform 
+
+#ifndef NRFX_PWM_DEFAULT_CONFIG_LOAD_MODE
+#define NRFX_PWM_DEFAULT_CONFIG_LOAD_MODE 0
+#endif
+
+// <o> NRFX_PWM_DEFAULT_CONFIG_STEP_MODE  - Step mode
+ 
+// <0=> Auto 
+// <1=> Triggered 
+
+#ifndef NRFX_PWM_DEFAULT_CONFIG_STEP_MODE
+#define NRFX_PWM_DEFAULT_CONFIG_STEP_MODE 0
+#endif
+
+// <o> NRFX_PWM_DEFAULT_CONFIG_IRQ_PRIORITY  - Interrupt priority
+ 
+// <0=> 0 (highest) 
+// <1=> 1 
+// <2=> 2 
+// <3=> 3 
+// <4=> 4 
+// <5=> 5 
+// <6=> 6 
+// <7=> 7 
+
+#ifndef NRFX_PWM_DEFAULT_CONFIG_IRQ_PRIORITY
+#define NRFX_PWM_DEFAULT_CONFIG_IRQ_PRIORITY 6
+#endif
+
+// <e> NRFX_PWM_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef NRFX_PWM_CONFIG_LOG_ENABLED
+#define NRFX_PWM_CONFIG_LOG_ENABLED 0
+#endif
+// <o> NRFX_PWM_CONFIG_LOG_LEVEL  - Default Severity level
+ 
+// <0=> Off 
+// <1=> Error 
+// <2=> Warning 
+// <3=> Info 
+// <4=> Debug 
+
+#ifndef NRFX_PWM_CONFIG_LOG_LEVEL
+#define NRFX_PWM_CONFIG_LOG_LEVEL 3
+#endif
+
+// <o> NRFX_PWM_CONFIG_INFO_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef NRFX_PWM_CONFIG_INFO_COLOR
+#define NRFX_PWM_CONFIG_INFO_COLOR 0
+#endif
+
+// <o> NRFX_PWM_CONFIG_DEBUG_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef NRFX_PWM_CONFIG_DEBUG_COLOR
+#define NRFX_PWM_CONFIG_DEBUG_COLOR 0
+#endif
+
+// </e>
+
+// <e> NRFX_PWM_NRF52_ANOMALY_109_WORKAROUND_ENABLED - Enables nRF52 Anomaly 109 workaround for PWM.
+
+// <i> The workaround uses interrupts to wake up the CPU and ensure
+// <i> it is active when PWM is about to start a DMA transfer. For
+// <i> initial transfer, done when a playback is started via PPI,
+// <i> a specific EGU instance is used to generate the interrupt.
+// <i> During the playback, the PWM interrupt triggered on SEQEND
+// <i> event of a preceding sequence is used to protect the transfer
+// <i> done for the next sequence to be played.
+//==========================================================
+#ifndef NRFX_PWM_NRF52_ANOMALY_109_WORKAROUND_ENABLED
+#define NRFX_PWM_NRF52_ANOMALY_109_WORKAROUND_ENABLED 0
+#endif
+// <o> NRFX_PWM_NRF52_ANOMALY_109_EGU_INSTANCE  - EGU instance used by the nRF52 Anomaly 109 workaround for PWM.
+ 
+// <0=> EGU0 
+// <1=> EGU1 
+// <2=> EGU2 
+// <3=> EGU3 
+// <4=> EGU4 
+// <5=> EGU5 
+
+#ifndef NRFX_PWM_NRF52_ANOMALY_109_EGU_INSTANCE
+#define NRFX_PWM_NRF52_ANOMALY_109_EGU_INSTANCE 5
+#endif
+
+// </e>
+
+// </e>
+
+// <e> NRFX_QDEC_ENABLED - nrfx_qdec - QDEC peripheral driver
+//==========================================================
+#ifndef NRFX_QDEC_ENABLED
+#define NRFX_QDEC_ENABLED 0
+#endif
+// <o> NRFX_QDEC_CONFIG_REPORTPER  - Report period
+ 
+// <0=> 10 Samples 
+// <1=> 40 Samples 
+// <2=> 80 Samples 
+// <3=> 120 Samples 
+// <4=> 160 Samples 
+// <5=> 200 Samples 
+// <6=> 240 Samples 
+// <7=> 280 Samples 
+
+#ifndef NRFX_QDEC_CONFIG_REPORTPER
+#define NRFX_QDEC_CONFIG_REPORTPER 0
+#endif
+
+// <o> NRFX_QDEC_CONFIG_SAMPLEPER  - Sample period
+ 
+// <0=> 128 us 
+// <1=> 256 us 
+// <2=> 512 us 
+// <3=> 1024 us 
+// <4=> 2048 us 
+// <5=> 4096 us 
+// <6=> 8192 us 
+// <7=> 16384 us 
+
+#ifndef NRFX_QDEC_CONFIG_SAMPLEPER
+#define NRFX_QDEC_CONFIG_SAMPLEPER 7
+#endif
+
+// <o> NRFX_QDEC_CONFIG_PIO_A - A pin  <0-31> 
+
+
+#ifndef NRFX_QDEC_CONFIG_PIO_A
+#define NRFX_QDEC_CONFIG_PIO_A 31
+#endif
+
+// <o> NRFX_QDEC_CONFIG_PIO_B - B pin  <0-31> 
+
+
+#ifndef NRFX_QDEC_CONFIG_PIO_B
+#define NRFX_QDEC_CONFIG_PIO_B 31
+#endif
+
+// <o> NRFX_QDEC_CONFIG_PIO_LED - LED pin  <0-31> 
+
+
+#ifndef NRFX_QDEC_CONFIG_PIO_LED
+#define NRFX_QDEC_CONFIG_PIO_LED 31
+#endif
+
+// <o> NRFX_QDEC_CONFIG_LEDPRE - LED pre 
+#ifndef NRFX_QDEC_CONFIG_LEDPRE
+#define NRFX_QDEC_CONFIG_LEDPRE 511
+#endif
+
+// <o> NRFX_QDEC_CONFIG_LEDPOL  - LED polarity
+ 
+// <0=> Active low 
+// <1=> Active high 
+
+#ifndef NRFX_QDEC_CONFIG_LEDPOL
+#define NRFX_QDEC_CONFIG_LEDPOL 1
+#endif
+
+// <q> NRFX_QDEC_CONFIG_DBFEN  - Debouncing enable
+ 
+
+#ifndef NRFX_QDEC_CONFIG_DBFEN
+#define NRFX_QDEC_CONFIG_DBFEN 0
+#endif
+
+// <q> NRFX_QDEC_CONFIG_SAMPLE_INTEN  - Sample ready interrupt enable
+ 
+
+#ifndef NRFX_QDEC_CONFIG_SAMPLE_INTEN
+#define NRFX_QDEC_CONFIG_SAMPLE_INTEN 0
+#endif
+
+// <o> NRFX_QDEC_CONFIG_IRQ_PRIORITY  - Interrupt priority
+ 
+// <0=> 0 (highest) 
+// <1=> 1 
+// <2=> 2 
+// <3=> 3 
+// <4=> 4 
+// <5=> 5 
+// <6=> 6 
+// <7=> 7 
+
+#ifndef NRFX_QDEC_CONFIG_IRQ_PRIORITY
+#define NRFX_QDEC_CONFIG_IRQ_PRIORITY 6
+#endif
+
+// <e> NRFX_QDEC_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef NRFX_QDEC_CONFIG_LOG_ENABLED
+#define NRFX_QDEC_CONFIG_LOG_ENABLED 0
+#endif
+// <o> NRFX_QDEC_CONFIG_LOG_LEVEL  - Default Severity level
+ 
+// <0=> Off 
+// <1=> Error 
+// <2=> Warning 
+// <3=> Info 
+// <4=> Debug 
+
+#ifndef NRFX_QDEC_CONFIG_LOG_LEVEL
+#define NRFX_QDEC_CONFIG_LOG_LEVEL 3
+#endif
+
+// <o> NRFX_QDEC_CONFIG_INFO_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef NRFX_QDEC_CONFIG_INFO_COLOR
+#define NRFX_QDEC_CONFIG_INFO_COLOR 0
+#endif
+
+// <o> NRFX_QDEC_CONFIG_DEBUG_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef NRFX_QDEC_CONFIG_DEBUG_COLOR
+#define NRFX_QDEC_CONFIG_DEBUG_COLOR 0
+#endif
+
+// </e>
+
+// </e>
+
+// <e> NRFX_RNG_ENABLED - nrfx_rng - RNG peripheral driver
+//==========================================================
+#ifndef NRFX_RNG_ENABLED
+#define NRFX_RNG_ENABLED 0
+#endif
+// <q> NRFX_RNG_CONFIG_ERROR_CORRECTION  - Error correction
+ 
+
+#ifndef NRFX_RNG_CONFIG_ERROR_CORRECTION
+#define NRFX_RNG_CONFIG_ERROR_CORRECTION 1
+#endif
+
+// <o> NRFX_RNG_CONFIG_IRQ_PRIORITY  - Interrupt priority
+ 
+// <0=> 0 (highest) 
+// <1=> 1 
+// <2=> 2 
+// <3=> 3 
+// <4=> 4 
+// <5=> 5 
+// <6=> 6 
+// <7=> 7 
+
+#ifndef NRFX_RNG_CONFIG_IRQ_PRIORITY
+#define NRFX_RNG_CONFIG_IRQ_PRIORITY 6
+#endif
+
+// <e> NRFX_RNG_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef NRFX_RNG_CONFIG_LOG_ENABLED
+#define NRFX_RNG_CONFIG_LOG_ENABLED 0
+#endif
+// <o> NRFX_RNG_CONFIG_LOG_LEVEL  - Default Severity level
+ 
+// <0=> Off 
+// <1=> Error 
+// <2=> Warning 
+// <3=> Info 
+// <4=> Debug 
+
+#ifndef NRFX_RNG_CONFIG_LOG_LEVEL
+#define NRFX_RNG_CONFIG_LOG_LEVEL 3
+#endif
+
+// <o> NRFX_RNG_CONFIG_INFO_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef NRFX_RNG_CONFIG_INFO_COLOR
+#define NRFX_RNG_CONFIG_INFO_COLOR 0
+#endif
+
+// <o> NRFX_RNG_CONFIG_DEBUG_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef NRFX_RNG_CONFIG_DEBUG_COLOR
+#define NRFX_RNG_CONFIG_DEBUG_COLOR 0
+#endif
+
+// </e>
+
+// </e>
+
+// <e> NRFX_RTC_ENABLED - nrfx_rtc - RTC peripheral driver
+//==========================================================
+#ifndef NRFX_RTC_ENABLED
+#define NRFX_RTC_ENABLED 0
+#endif
+// <q> NRFX_RTC0_ENABLED  - Enable RTC0 instance
+ 
+
+#ifndef NRFX_RTC0_ENABLED
+#define NRFX_RTC0_ENABLED 0
+#endif
+
+// <q> NRFX_RTC1_ENABLED  - Enable RTC1 instance
+ 
+
+#ifndef NRFX_RTC1_ENABLED
+#define NRFX_RTC1_ENABLED 0
+#endif
+
+// <q> NRFX_RTC2_ENABLED  - Enable RTC2 instance
+ 
+
+#ifndef NRFX_RTC2_ENABLED
+#define NRFX_RTC2_ENABLED 0
+#endif
+
+// <o> NRFX_RTC_MAXIMUM_LATENCY_US - Maximum possible time[us] in highest priority interrupt 
+#ifndef NRFX_RTC_MAXIMUM_LATENCY_US
+#define NRFX_RTC_MAXIMUM_LATENCY_US 2000
+#endif
+
+// <o> NRFX_RTC_DEFAULT_CONFIG_FREQUENCY - Frequency  <16-32768> 
+
+
+#ifndef NRFX_RTC_DEFAULT_CONFIG_FREQUENCY
+#define NRFX_RTC_DEFAULT_CONFIG_FREQUENCY 32768
+#endif
+
+// <q> NRFX_RTC_DEFAULT_CONFIG_RELIABLE  - Ensures safe compare event triggering
+ 
+
+#ifndef NRFX_RTC_DEFAULT_CONFIG_RELIABLE
+#define NRFX_RTC_DEFAULT_CONFIG_RELIABLE 0
+#endif
+
+// <o> NRFX_RTC_DEFAULT_CONFIG_IRQ_PRIORITY  - Interrupt priority
+ 
+// <0=> 0 (highest) 
+// <1=> 1 
+// <2=> 2 
+// <3=> 3 
+// <4=> 4 
+// <5=> 5 
+// <6=> 6 
+// <7=> 7 
+
+#ifndef NRFX_RTC_DEFAULT_CONFIG_IRQ_PRIORITY
+#define NRFX_RTC_DEFAULT_CONFIG_IRQ_PRIORITY 6
+#endif
+
+// <e> NRFX_RTC_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef NRFX_RTC_CONFIG_LOG_ENABLED
+#define NRFX_RTC_CONFIG_LOG_ENABLED 0
+#endif
+// <o> NRFX_RTC_CONFIG_LOG_LEVEL  - Default Severity level
+ 
+// <0=> Off 
+// <1=> Error 
+// <2=> Warning 
+// <3=> Info 
+// <4=> Debug 
+
+#ifndef NRFX_RTC_CONFIG_LOG_LEVEL
+#define NRFX_RTC_CONFIG_LOG_LEVEL 3
+#endif
+
+// <o> NRFX_RTC_CONFIG_INFO_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef NRFX_RTC_CONFIG_INFO_COLOR
+#define NRFX_RTC_CONFIG_INFO_COLOR 0
+#endif
+
+// <o> NRFX_RTC_CONFIG_DEBUG_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef NRFX_RTC_CONFIG_DEBUG_COLOR
+#define NRFX_RTC_CONFIG_DEBUG_COLOR 0
+#endif
+
+// </e>
+
+// </e>
+
+// <e> NRFX_SAADC_ENABLED - nrfx_saadc - SAADC peripheral driver
+//==========================================================
+#ifndef NRFX_SAADC_ENABLED
+#define NRFX_SAADC_ENABLED 0
+#endif
+// <o> NRFX_SAADC_CONFIG_RESOLUTION  - Resolution
+ 
+// <0=> 8 bit 
+// <1=> 10 bit 
+// <2=> 12 bit 
+// <3=> 14 bit 
+
+#ifndef NRFX_SAADC_CONFIG_RESOLUTION
+#define NRFX_SAADC_CONFIG_RESOLUTION 1
+#endif
+
+// <o> NRFX_SAADC_CONFIG_OVERSAMPLE  - Sample period
+ 
+// <0=> Disabled 
+// <1=> 2x 
+// <2=> 4x 
+// <3=> 8x 
+// <4=> 16x 
+// <5=> 32x 
+// <6=> 64x 
+// <7=> 128x 
+// <8=> 256x 
+
+#ifndef NRFX_SAADC_CONFIG_OVERSAMPLE
+#define NRFX_SAADC_CONFIG_OVERSAMPLE 0
+#endif
+
+// <q> NRFX_SAADC_CONFIG_LP_MODE  - Enabling low power mode
+ 
+
+#ifndef NRFX_SAADC_CONFIG_LP_MODE
+#define NRFX_SAADC_CONFIG_LP_MODE 0
+#endif
+
+// <o> NRFX_SAADC_CONFIG_IRQ_PRIORITY  - Interrupt priority
+ 
+// <0=> 0 (highest) 
+// <1=> 1 
+// <2=> 2 
+// <3=> 3 
+// <4=> 4 
+// <5=> 5 
+// <6=> 6 
+// <7=> 7 
+
+#ifndef NRFX_SAADC_CONFIG_IRQ_PRIORITY
+#define NRFX_SAADC_CONFIG_IRQ_PRIORITY 6
+#endif
+
+// <e> NRFX_SAADC_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef NRFX_SAADC_CONFIG_LOG_ENABLED
+#define NRFX_SAADC_CONFIG_LOG_ENABLED 0
+#endif
+// <o> NRFX_SAADC_CONFIG_LOG_LEVEL  - Default Severity level
+ 
+// <0=> Off 
+// <1=> Error 
+// <2=> Warning 
+// <3=> Info 
+// <4=> Debug 
+
+#ifndef NRFX_SAADC_CONFIG_LOG_LEVEL
+#define NRFX_SAADC_CONFIG_LOG_LEVEL 3
+#endif
+
+// <o> NRFX_SAADC_CONFIG_INFO_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef NRFX_SAADC_CONFIG_INFO_COLOR
+#define NRFX_SAADC_CONFIG_INFO_COLOR 0
+#endif
+
+// <o> NRFX_SAADC_CONFIG_DEBUG_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef NRFX_SAADC_CONFIG_DEBUG_COLOR
+#define NRFX_SAADC_CONFIG_DEBUG_COLOR 0
+#endif
+
+// </e>
+
+// </e>
+
+// <e> NRFX_SPIM_ENABLED - nrfx_spim - SPIM peripheral driver
+//==========================================================
+#ifndef NRFX_SPIM_ENABLED
+#define NRFX_SPIM_ENABLED 0
+#endif
+// <q> NRFX_SPIM0_ENABLED  - Enable SPIM0 instance
+ 
+
+#ifndef NRFX_SPIM0_ENABLED
+#define NRFX_SPIM0_ENABLED 0
+#endif
+
+// <q> NRFX_SPIM1_ENABLED  - Enable SPIM1 instance
+ 
+
+#ifndef NRFX_SPIM1_ENABLED
+#define NRFX_SPIM1_ENABLED 0
+#endif
+
+// <q> NRFX_SPIM2_ENABLED  - Enable SPIM2 instance
+ 
+
+#ifndef NRFX_SPIM2_ENABLED
+#define NRFX_SPIM2_ENABLED 0
+#endif
+
+// <o> NRFX_SPIM_MISO_PULL_CFG  - MISO pin pull configuration.
+ 
+// <0=> NRF_GPIO_PIN_NOPULL 
+// <1=> NRF_GPIO_PIN_PULLDOWN 
+// <3=> NRF_GPIO_PIN_PULLUP 
+
+#ifndef NRFX_SPIM_MISO_PULL_CFG
+#define NRFX_SPIM_MISO_PULL_CFG 1
+#endif
+
+// <o> NRFX_SPIM_DEFAULT_CONFIG_IRQ_PRIORITY  - Interrupt priority
+ 
+// <0=> 0 (highest) 
+// <1=> 1 
+// <2=> 2 
+// <3=> 3 
+// <4=> 4 
+// <5=> 5 
+// <6=> 6 
+// <7=> 7 
+
+#ifndef NRFX_SPIM_DEFAULT_CONFIG_IRQ_PRIORITY
+#define NRFX_SPIM_DEFAULT_CONFIG_IRQ_PRIORITY 6
+#endif
+
+// <e> NRFX_SPIM_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef NRFX_SPIM_CONFIG_LOG_ENABLED
+#define NRFX_SPIM_CONFIG_LOG_ENABLED 0
+#endif
+// <o> NRFX_SPIM_CONFIG_LOG_LEVEL  - Default Severity level
+ 
+// <0=> Off 
+// <1=> Error 
+// <2=> Warning 
+// <3=> Info 
+// <4=> Debug 
+
+#ifndef NRFX_SPIM_CONFIG_LOG_LEVEL
+#define NRFX_SPIM_CONFIG_LOG_LEVEL 3
+#endif
+
+// <o> NRFX_SPIM_CONFIG_INFO_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef NRFX_SPIM_CONFIG_INFO_COLOR
+#define NRFX_SPIM_CONFIG_INFO_COLOR 0
+#endif
+
+// <o> NRFX_SPIM_CONFIG_DEBUG_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef NRFX_SPIM_CONFIG_DEBUG_COLOR
+#define NRFX_SPIM_CONFIG_DEBUG_COLOR 0
+#endif
+
+// </e>
+
+// <q> NRFX_SPIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED  - Enables nRF52 anomaly 109 workaround for SPIM.
+ 
+
+// <i> The workaround uses interrupts to wake up the CPU by catching
+// <i> a start event of zero-length transmission to start the clock. This 
+// <i> ensures that the DMA transfer will be executed without issues and
+// <i> that the proper transfer will be started. See more in the Errata 
+// <i> document or Anomaly 109 Addendum located at 
+// <i> https://infocenter.nordicsemi.com/
+
+#ifndef NRFX_SPIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED
+#define NRFX_SPIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED 0
+#endif
+
+// </e>
+
+// <e> NRFX_SPIS_ENABLED - nrfx_spis - SPIS peripheral driver
+//==========================================================
+#ifndef NRFX_SPIS_ENABLED
+#define NRFX_SPIS_ENABLED 0
+#endif
+// <q> NRFX_SPIS0_ENABLED  - Enable SPIS0 instance
+ 
+
+#ifndef NRFX_SPIS0_ENABLED
+#define NRFX_SPIS0_ENABLED 0
+#endif
+
+// <q> NRFX_SPIS1_ENABLED  - Enable SPIS1 instance
+ 
+
+#ifndef NRFX_SPIS1_ENABLED
+#define NRFX_SPIS1_ENABLED 0
+#endif
+
+// <q> NRFX_SPIS2_ENABLED  - Enable SPIS2 instance
+ 
+
+#ifndef NRFX_SPIS2_ENABLED
+#define NRFX_SPIS2_ENABLED 0
+#endif
+
+// <o> NRFX_SPIS_DEFAULT_CONFIG_IRQ_PRIORITY  - Interrupt priority
+ 
+// <0=> 0 (highest) 
+// <1=> 1 
+// <2=> 2 
+// <3=> 3 
+// <4=> 4 
+// <5=> 5 
+// <6=> 6 
+// <7=> 7 
+
+#ifndef NRFX_SPIS_DEFAULT_CONFIG_IRQ_PRIORITY
+#define NRFX_SPIS_DEFAULT_CONFIG_IRQ_PRIORITY 6
+#endif
+
+// <o> NRFX_SPIS_DEFAULT_DEF - SPIS default DEF character  <0-255> 
+
+
+#ifndef NRFX_SPIS_DEFAULT_DEF
+#define NRFX_SPIS_DEFAULT_DEF 255
+#endif
+
+// <o> NRFX_SPIS_DEFAULT_ORC - SPIS default ORC character  <0-255> 
+
+
+#ifndef NRFX_SPIS_DEFAULT_ORC
+#define NRFX_SPIS_DEFAULT_ORC 255
+#endif
+
+// <e> NRFX_SPIS_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef NRFX_SPIS_CONFIG_LOG_ENABLED
+#define NRFX_SPIS_CONFIG_LOG_ENABLED 0
+#endif
+// <o> NRFX_SPIS_CONFIG_LOG_LEVEL  - Default Severity level
+ 
+// <0=> Off 
+// <1=> Error 
+// <2=> Warning 
+// <3=> Info 
+// <4=> Debug 
+
+#ifndef NRFX_SPIS_CONFIG_LOG_LEVEL
+#define NRFX_SPIS_CONFIG_LOG_LEVEL 3
+#endif
+
+// <o> NRFX_SPIS_CONFIG_INFO_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef NRFX_SPIS_CONFIG_INFO_COLOR
+#define NRFX_SPIS_CONFIG_INFO_COLOR 0
+#endif
+
+// <o> NRFX_SPIS_CONFIG_DEBUG_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef NRFX_SPIS_CONFIG_DEBUG_COLOR
+#define NRFX_SPIS_CONFIG_DEBUG_COLOR 0
+#endif
+
+// </e>
+
+// <q> NRFX_SPIS_NRF52_ANOMALY_109_WORKAROUND_ENABLED  - Enables nRF52 Anomaly 109 workaround for SPIS.
+ 
+
+// <i> The workaround uses a GPIOTE channel to generate interrupts
+// <i> on falling edges detected on the CSN line. This will make
+// <i> the CPU active for the moment when SPIS starts DMA transfers,
+// <i> and this way the transfers will be protected.
+// <i> This workaround uses GPIOTE driver, so this driver must be
+// <i> enabled as well.
+
+#ifndef NRFX_SPIS_NRF52_ANOMALY_109_WORKAROUND_ENABLED
+#define NRFX_SPIS_NRF52_ANOMALY_109_WORKAROUND_ENABLED 0
+#endif
+
+// </e>
+
+// <e> NRFX_SPI_ENABLED - nrfx_spi - SPI peripheral driver
+//==========================================================
+#ifndef NRFX_SPI_ENABLED
+#define NRFX_SPI_ENABLED 0
+#endif
+// <q> NRFX_SPI0_ENABLED  - Enable SPI0 instance
+ 
+
+#ifndef NRFX_SPI0_ENABLED
+#define NRFX_SPI0_ENABLED 0
+#endif
+
+// <q> NRFX_SPI1_ENABLED  - Enable SPI1 instance
+ 
+
+#ifndef NRFX_SPI1_ENABLED
+#define NRFX_SPI1_ENABLED 0
+#endif
+
+// <q> NRFX_SPI2_ENABLED  - Enable SPI2 instance
+ 
+
+#ifndef NRFX_SPI2_ENABLED
+#define NRFX_SPI2_ENABLED 0
+#endif
+
+// <o> NRFX_SPI_MISO_PULL_CFG  - MISO pin pull configuration.
+ 
+// <0=> NRF_GPIO_PIN_NOPULL 
+// <1=> NRF_GPIO_PIN_PULLDOWN 
+// <3=> NRF_GPIO_PIN_PULLUP 
+
+#ifndef NRFX_SPI_MISO_PULL_CFG
+#define NRFX_SPI_MISO_PULL_CFG 1
+#endif
+
+// <o> NRFX_SPI_DEFAULT_CONFIG_IRQ_PRIORITY  - Interrupt priority
+ 
+// <0=> 0 (highest) 
+// <1=> 1 
+// <2=> 2 
+// <3=> 3 
+// <4=> 4 
+// <5=> 5 
+// <6=> 6 
+// <7=> 7 
+
+#ifndef NRFX_SPI_DEFAULT_CONFIG_IRQ_PRIORITY
+#define NRFX_SPI_DEFAULT_CONFIG_IRQ_PRIORITY 6
+#endif
+
+// <e> NRFX_SPI_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef NRFX_SPI_CONFIG_LOG_ENABLED
+#define NRFX_SPI_CONFIG_LOG_ENABLED 0
+#endif
+// <o> NRFX_SPI_CONFIG_LOG_LEVEL  - Default Severity level
+ 
+// <0=> Off 
+// <1=> Error 
+// <2=> Warning 
+// <3=> Info 
+// <4=> Debug 
+
+#ifndef NRFX_SPI_CONFIG_LOG_LEVEL
+#define NRFX_SPI_CONFIG_LOG_LEVEL 3
+#endif
+
+// <o> NRFX_SPI_CONFIG_INFO_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef NRFX_SPI_CONFIG_INFO_COLOR
+#define NRFX_SPI_CONFIG_INFO_COLOR 0
+#endif
+
+// <o> NRFX_SPI_CONFIG_DEBUG_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef NRFX_SPI_CONFIG_DEBUG_COLOR
+#define NRFX_SPI_CONFIG_DEBUG_COLOR 0
+#endif
+
+// </e>
+
+// </e>
+
+// <e> NRFX_SWI_ENABLED - nrfx_swi - SWI/EGU peripheral allocator
+//==========================================================
+#ifndef NRFX_SWI_ENABLED
+#define NRFX_SWI_ENABLED 0
+#endif
+// <q> NRFX_EGU_ENABLED  - Enable EGU support
+ 
+
+#ifndef NRFX_EGU_ENABLED
+#define NRFX_EGU_ENABLED 0
+#endif
+
+// <q> NRFX_SWI0_DISABLED  - Exclude SWI0 from being utilized by the driver
+ 
+
+#ifndef NRFX_SWI0_DISABLED
+#define NRFX_SWI0_DISABLED 0
+#endif
+
+// <q> NRFX_SWI1_DISABLED  - Exclude SWI1 from being utilized by the driver
+ 
+
+#ifndef NRFX_SWI1_DISABLED
+#define NRFX_SWI1_DISABLED 0
+#endif
+
+// <q> NRFX_SWI2_DISABLED  - Exclude SWI2 from being utilized by the driver
+ 
+
+#ifndef NRFX_SWI2_DISABLED
+#define NRFX_SWI2_DISABLED 0
+#endif
+
+// <q> NRFX_SWI3_DISABLED  - Exclude SWI3 from being utilized by the driver
+ 
+
+#ifndef NRFX_SWI3_DISABLED
+#define NRFX_SWI3_DISABLED 0
+#endif
+
+// <q> NRFX_SWI4_DISABLED  - Exclude SWI4 from being utilized by the driver
+ 
+
+#ifndef NRFX_SWI4_DISABLED
+#define NRFX_SWI4_DISABLED 0
+#endif
+
+// <q> NRFX_SWI5_DISABLED  - Exclude SWI5 from being utilized by the driver
+ 
+
+#ifndef NRFX_SWI5_DISABLED
+#define NRFX_SWI5_DISABLED 0
+#endif
+
+// <e> NRFX_SWI_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef NRFX_SWI_CONFIG_LOG_ENABLED
+#define NRFX_SWI_CONFIG_LOG_ENABLED 0
+#endif
+// <o> NRFX_SWI_CONFIG_LOG_LEVEL  - Default Severity level
+ 
+// <0=> Off 
+// <1=> Error 
+// <2=> Warning 
+// <3=> Info 
+// <4=> Debug 
+
+#ifndef NRFX_SWI_CONFIG_LOG_LEVEL
+#define NRFX_SWI_CONFIG_LOG_LEVEL 3
+#endif
+
+// <o> NRFX_SWI_CONFIG_INFO_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef NRFX_SWI_CONFIG_INFO_COLOR
+#define NRFX_SWI_CONFIG_INFO_COLOR 0
+#endif
+
+// <o> NRFX_SWI_CONFIG_DEBUG_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef NRFX_SWI_CONFIG_DEBUG_COLOR
+#define NRFX_SWI_CONFIG_DEBUG_COLOR 0
+#endif
+
+// </e>
+
+// </e>
+
+// <e> NRFX_TIMER_ENABLED - nrfx_timer - TIMER periperal driver
+//==========================================================
+#ifndef NRFX_TIMER_ENABLED
+#define NRFX_TIMER_ENABLED 0
+#endif
+// <q> NRFX_TIMER0_ENABLED  - Enable TIMER0 instance
+ 
+
+#ifndef NRFX_TIMER0_ENABLED
+#define NRFX_TIMER0_ENABLED 0
+#endif
+
+// <q> NRFX_TIMER1_ENABLED  - Enable TIMER1 instance
+ 
+
+#ifndef NRFX_TIMER1_ENABLED
+#define NRFX_TIMER1_ENABLED 0
+#endif
+
+// <q> NRFX_TIMER2_ENABLED  - Enable TIMER2 instance
+ 
+
+#ifndef NRFX_TIMER2_ENABLED
+#define NRFX_TIMER2_ENABLED 0
+#endif
+
+// <q> NRFX_TIMER3_ENABLED  - Enable TIMER3 instance
+ 
+
+#ifndef NRFX_TIMER3_ENABLED
+#define NRFX_TIMER3_ENABLED 0
+#endif
+
+// <q> NRFX_TIMER4_ENABLED  - Enable TIMER4 instance
+ 
+
+#ifndef NRFX_TIMER4_ENABLED
+#define NRFX_TIMER4_ENABLED 0
+#endif
+
+// <o> NRFX_TIMER_DEFAULT_CONFIG_FREQUENCY  - Timer frequency if in Timer mode
+ 
+// <0=> 16 MHz 
+// <1=> 8 MHz 
+// <2=> 4 MHz 
+// <3=> 2 MHz 
+// <4=> 1 MHz 
+// <5=> 500 kHz 
+// <6=> 250 kHz 
+// <7=> 125 kHz 
+// <8=> 62.5 kHz 
+// <9=> 31.25 kHz 
+
+#ifndef NRFX_TIMER_DEFAULT_CONFIG_FREQUENCY
+#define NRFX_TIMER_DEFAULT_CONFIG_FREQUENCY 0
+#endif
+
+// <o> NRFX_TIMER_DEFAULT_CONFIG_MODE  - Timer mode or operation
+ 
+// <0=> Timer 
+// <1=> Counter 
+
+#ifndef NRFX_TIMER_DEFAULT_CONFIG_MODE
+#define NRFX_TIMER_DEFAULT_CONFIG_MODE 0
+#endif
+
+// <o> NRFX_TIMER_DEFAULT_CONFIG_BIT_WIDTH  - Timer counter bit width
+ 
+// <0=> 16 bit 
+// <1=> 8 bit 
+// <2=> 24 bit 
+// <3=> 32 bit 
+
+#ifndef NRFX_TIMER_DEFAULT_CONFIG_BIT_WIDTH
+#define NRFX_TIMER_DEFAULT_CONFIG_BIT_WIDTH 0
+#endif
+
+// <o> NRFX_TIMER_DEFAULT_CONFIG_IRQ_PRIORITY  - Interrupt priority
+ 
+// <0=> 0 (highest) 
+// <1=> 1 
+// <2=> 2 
+// <3=> 3 
+// <4=> 4 
+// <5=> 5 
+// <6=> 6 
+// <7=> 7 
+
+#ifndef NRFX_TIMER_DEFAULT_CONFIG_IRQ_PRIORITY
+#define NRFX_TIMER_DEFAULT_CONFIG_IRQ_PRIORITY 6
+#endif
+
+// <e> NRFX_TIMER_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef NRFX_TIMER_CONFIG_LOG_ENABLED
+#define NRFX_TIMER_CONFIG_LOG_ENABLED 0
+#endif
+// <o> NRFX_TIMER_CONFIG_LOG_LEVEL  - Default Severity level
+ 
+// <0=> Off 
+// <1=> Error 
+// <2=> Warning 
+// <3=> Info 
+// <4=> Debug 
+
+#ifndef NRFX_TIMER_CONFIG_LOG_LEVEL
+#define NRFX_TIMER_CONFIG_LOG_LEVEL 3
+#endif
+
+// <o> NRFX_TIMER_CONFIG_INFO_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef NRFX_TIMER_CONFIG_INFO_COLOR
+#define NRFX_TIMER_CONFIG_INFO_COLOR 0
+#endif
+
+// <o> NRFX_TIMER_CONFIG_DEBUG_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef NRFX_TIMER_CONFIG_DEBUG_COLOR
+#define NRFX_TIMER_CONFIG_DEBUG_COLOR 0
+#endif
+
+// </e>
+
+// </e>
+
+// <e> NRFX_TWIM_ENABLED - nrfx_twim - TWIM peripheral driver
+//==========================================================
+#ifndef NRFX_TWIM_ENABLED
+#define NRFX_TWIM_ENABLED 0
+#endif
+// <q> NRFX_TWIM0_ENABLED  - Enable TWIM0 instance
+ 
+
+#ifndef NRFX_TWIM0_ENABLED
+#define NRFX_TWIM0_ENABLED 0
+#endif
+
+// <q> NRFX_TWIM1_ENABLED  - Enable TWIM1 instance
+ 
+
+#ifndef NRFX_TWIM1_ENABLED
+#define NRFX_TWIM1_ENABLED 0
+#endif
+
+// <o> NRFX_TWIM_DEFAULT_CONFIG_FREQUENCY  - Frequency
+ 
+// <26738688=> 100k 
+// <67108864=> 250k 
+// <104857600=> 400k 
+
+#ifndef NRFX_TWIM_DEFAULT_CONFIG_FREQUENCY
+#define NRFX_TWIM_DEFAULT_CONFIG_FREQUENCY 26738688
+#endif
+
+// <q> NRFX_TWIM_DEFAULT_CONFIG_HOLD_BUS_UNINIT  - Enables bus holding after uninit
+ 
+
+#ifndef NRFX_TWIM_DEFAULT_CONFIG_HOLD_BUS_UNINIT
+#define NRFX_TWIM_DEFAULT_CONFIG_HOLD_BUS_UNINIT 0
+#endif
+
+// <o> NRFX_TWIM_DEFAULT_CONFIG_IRQ_PRIORITY  - Interrupt priority
+ 
+// <0=> 0 (highest) 
+// <1=> 1 
+// <2=> 2 
+// <3=> 3 
+// <4=> 4 
+// <5=> 5 
+// <6=> 6 
+// <7=> 7 
+
+#ifndef NRFX_TWIM_DEFAULT_CONFIG_IRQ_PRIORITY
+#define NRFX_TWIM_DEFAULT_CONFIG_IRQ_PRIORITY 6
+#endif
+
+// <e> NRFX_TWIM_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef NRFX_TWIM_CONFIG_LOG_ENABLED
+#define NRFX_TWIM_CONFIG_LOG_ENABLED 0
+#endif
+// <o> NRFX_TWIM_CONFIG_LOG_LEVEL  - Default Severity level
+ 
+// <0=> Off 
+// <1=> Error 
+// <2=> Warning 
+// <3=> Info 
+// <4=> Debug 
+
+#ifndef NRFX_TWIM_CONFIG_LOG_LEVEL
+#define NRFX_TWIM_CONFIG_LOG_LEVEL 3
+#endif
+
+// <o> NRFX_TWIM_CONFIG_INFO_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef NRFX_TWIM_CONFIG_INFO_COLOR
+#define NRFX_TWIM_CONFIG_INFO_COLOR 0
+#endif
+
+// <o> NRFX_TWIM_CONFIG_DEBUG_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef NRFX_TWIM_CONFIG_DEBUG_COLOR
+#define NRFX_TWIM_CONFIG_DEBUG_COLOR 0
+#endif
+
+// </e>
+
+// <q> NRFX_TWIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED  - Enables nRF52 anomaly 109 workaround for TWIM.
+ 
+
+// <i> The workaround uses interrupts to wake up the CPU by catching
+// <i> the start event of zero-frequency transmission, clear the 
+// <i> peripheral, set desired frequency, start the peripheral, and
+// <i> the proper transmission. See more in the Errata document or
+// <i> Anomaly 109 Addendum located at https://infocenter.nordicsemi.com/
+
+#ifndef NRFX_TWIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED
+#define NRFX_TWIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED 0
+#endif
+
+// </e>
+
+// <e> NRFX_TWIS_ENABLED - nrfx_twis - TWIS peripheral driver
+//==========================================================
+#ifndef NRFX_TWIS_ENABLED
+#define NRFX_TWIS_ENABLED 0
+#endif
+// <q> NRFX_TWIS0_ENABLED  - Enable TWIS0 instance
+ 
+
+#ifndef NRFX_TWIS0_ENABLED
+#define NRFX_TWIS0_ENABLED 0
+#endif
+
+// <q> NRFX_TWIS1_ENABLED  - Enable TWIS1 instance
+ 
+
+#ifndef NRFX_TWIS1_ENABLED
+#define NRFX_TWIS1_ENABLED 0
+#endif
+
+// <q> NRFX_TWIS_ASSUME_INIT_AFTER_RESET_ONLY  - Assume that any instance would be initialized only once
+ 
+
+// <i> Optimization flag. Registers used by TWIS are shared by other peripherals. Normally, during initialization driver tries to clear all registers to known state before doing the initialization itself. This gives initialization safe procedure, no matter when it would be called. If you activate TWIS only once and do never uninitialize it - set this flag to 1 what gives more optimal code.
+
+#ifndef NRFX_TWIS_ASSUME_INIT_AFTER_RESET_ONLY
+#define NRFX_TWIS_ASSUME_INIT_AFTER_RESET_ONLY 0
+#endif
+
+// <q> NRFX_TWIS_NO_SYNC_MODE  - Remove support for synchronous mode
+ 
+
+// <i> Synchronous mode would be used in specific situations. And it uses some additional code and data memory to safely process state machine by polling it in status functions. If this functionality is not required it may be disabled to free some resources.
+
+#ifndef NRFX_TWIS_NO_SYNC_MODE
+#define NRFX_TWIS_NO_SYNC_MODE 0
+#endif
+
+// <o> NRFX_TWIS_DEFAULT_CONFIG_ADDR0 - Address0 
+#ifndef NRFX_TWIS_DEFAULT_CONFIG_ADDR0
+#define NRFX_TWIS_DEFAULT_CONFIG_ADDR0 0
+#endif
+
+// <o> NRFX_TWIS_DEFAULT_CONFIG_ADDR1 - Address1 
+#ifndef NRFX_TWIS_DEFAULT_CONFIG_ADDR1
+#define NRFX_TWIS_DEFAULT_CONFIG_ADDR1 0
+#endif
+
+// <o> NRFX_TWIS_DEFAULT_CONFIG_SCL_PULL  - SCL pin pull configuration
+ 
+// <0=> Disabled 
+// <1=> Pull down 
+// <3=> Pull up 
+
+#ifndef NRFX_TWIS_DEFAULT_CONFIG_SCL_PULL
+#define NRFX_TWIS_DEFAULT_CONFIG_SCL_PULL 0
+#endif
+
+// <o> NRFX_TWIS_DEFAULT_CONFIG_SDA_PULL  - SDA pin pull configuration
+ 
+// <0=> Disabled 
+// <1=> Pull down 
+// <3=> Pull up 
+
+#ifndef NRFX_TWIS_DEFAULT_CONFIG_SDA_PULL
+#define NRFX_TWIS_DEFAULT_CONFIG_SDA_PULL 0
+#endif
+
+// <o> NRFX_TWIS_DEFAULT_CONFIG_IRQ_PRIORITY  - Interrupt priority
+ 
+// <0=> 0 (highest) 
+// <1=> 1 
+// <2=> 2 
+// <3=> 3 
+// <4=> 4 
+// <5=> 5 
+// <6=> 6 
+// <7=> 7 
+
+#ifndef NRFX_TWIS_DEFAULT_CONFIG_IRQ_PRIORITY
+#define NRFX_TWIS_DEFAULT_CONFIG_IRQ_PRIORITY 6
+#endif
+
+// <e> NRFX_TWIS_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef NRFX_TWIS_CONFIG_LOG_ENABLED
+#define NRFX_TWIS_CONFIG_LOG_ENABLED 0
+#endif
+// <o> NRFX_TWIS_CONFIG_LOG_LEVEL  - Default Severity level
+ 
+// <0=> Off 
+// <1=> Error 
+// <2=> Warning 
+// <3=> Info 
+// <4=> Debug 
+
+#ifndef NRFX_TWIS_CONFIG_LOG_LEVEL
+#define NRFX_TWIS_CONFIG_LOG_LEVEL 3
+#endif
+
+// <o> NRFX_TWIS_CONFIG_INFO_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef NRFX_TWIS_CONFIG_INFO_COLOR
+#define NRFX_TWIS_CONFIG_INFO_COLOR 0
+#endif
+
+// <o> NRFX_TWIS_CONFIG_DEBUG_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef NRFX_TWIS_CONFIG_DEBUG_COLOR
+#define NRFX_TWIS_CONFIG_DEBUG_COLOR 0
+#endif
+
+// </e>
+
+// </e>
+
+// <e> NRFX_TWI_ENABLED - nrfx_twi - TWI peripheral driver
+//==========================================================
+#ifndef NRFX_TWI_ENABLED
+#define NRFX_TWI_ENABLED 0
+#endif
+// <q> NRFX_TWI0_ENABLED  - Enable TWI0 instance
+ 
+
+#ifndef NRFX_TWI0_ENABLED
+#define NRFX_TWI0_ENABLED 0
+#endif
+
+// <q> NRFX_TWI1_ENABLED  - Enable TWI1 instance
+ 
+
+#ifndef NRFX_TWI1_ENABLED
+#define NRFX_TWI1_ENABLED 0
+#endif
+
+// <o> NRFX_TWI_DEFAULT_CONFIG_FREQUENCY  - Frequency
+ 
+// <26738688=> 100k 
+// <67108864=> 250k 
+// <104857600=> 400k 
+
+#ifndef NRFX_TWI_DEFAULT_CONFIG_FREQUENCY
+#define NRFX_TWI_DEFAULT_CONFIG_FREQUENCY 26738688
+#endif
+
+// <q> NRFX_TWI_DEFAULT_CONFIG_HOLD_BUS_UNINIT  - Enables bus holding after uninit
+ 
+
+#ifndef NRFX_TWI_DEFAULT_CONFIG_HOLD_BUS_UNINIT
+#define NRFX_TWI_DEFAULT_CONFIG_HOLD_BUS_UNINIT 0
+#endif
+
+// <o> NRFX_TWI_DEFAULT_CONFIG_IRQ_PRIORITY  - Interrupt priority
+ 
+// <0=> 0 (highest) 
+// <1=> 1 
+// <2=> 2 
+// <3=> 3 
+// <4=> 4 
+// <5=> 5 
+// <6=> 6 
+// <7=> 7 
+
+#ifndef NRFX_TWI_DEFAULT_CONFIG_IRQ_PRIORITY
+#define NRFX_TWI_DEFAULT_CONFIG_IRQ_PRIORITY 6
+#endif
+
+// <e> NRFX_TWI_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef NRFX_TWI_CONFIG_LOG_ENABLED
+#define NRFX_TWI_CONFIG_LOG_ENABLED 0
+#endif
+// <o> NRFX_TWI_CONFIG_LOG_LEVEL  - Default Severity level
+ 
+// <0=> Off 
+// <1=> Error 
+// <2=> Warning 
+// <3=> Info 
+// <4=> Debug 
+
+#ifndef NRFX_TWI_CONFIG_LOG_LEVEL
+#define NRFX_TWI_CONFIG_LOG_LEVEL 3
+#endif
+
+// <o> NRFX_TWI_CONFIG_INFO_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef NRFX_TWI_CONFIG_INFO_COLOR
+#define NRFX_TWI_CONFIG_INFO_COLOR 0
+#endif
+
+// <o> NRFX_TWI_CONFIG_DEBUG_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef NRFX_TWI_CONFIG_DEBUG_COLOR
+#define NRFX_TWI_CONFIG_DEBUG_COLOR 0
+#endif
+
+// </e>
+
+// </e>
+
+// <e> NRFX_UARTE_ENABLED - nrfx_uarte - UARTE peripheral driver
+//==========================================================
+#ifndef NRFX_UARTE_ENABLED
+#define NRFX_UARTE_ENABLED 1
+#endif
+// <o> NRFX_UARTE0_ENABLED - Enable UARTE0 instance 
+#ifndef NRFX_UARTE0_ENABLED
+#define NRFX_UARTE0_ENABLED 0
+#endif
+
+// <o> NRFX_UARTE_DEFAULT_CONFIG_HWFC  - Hardware Flow Control
+ 
+// <0=> Disabled 
+// <1=> Enabled 
+
+#ifndef NRFX_UARTE_DEFAULT_CONFIG_HWFC
+#define NRFX_UARTE_DEFAULT_CONFIG_HWFC 0
+#endif
+
+// <o> NRFX_UARTE_DEFAULT_CONFIG_PARITY  - Parity
+ 
+// <0=> Excluded 
+// <14=> Included 
+
+#ifndef NRFX_UARTE_DEFAULT_CONFIG_PARITY
+#define NRFX_UARTE_DEFAULT_CONFIG_PARITY 0
+#endif
+
+// <o> NRFX_UARTE_DEFAULT_CONFIG_BAUDRATE  - Default Baudrate
+ 
+// <323584=> 1200 baud 
+// <643072=> 2400 baud 
+// <1290240=> 4800 baud 
+// <2576384=> 9600 baud 
+// <3862528=> 14400 baud 
+// <5152768=> 19200 baud 
+// <7716864=> 28800 baud 
+// <8388608=> 31250 baud 
+// <10289152=> 38400 baud 
+// <15007744=> 56000 baud 
+// <15400960=> 57600 baud 
+// <20615168=> 76800 baud 
+// <30801920=> 115200 baud 
+// <61865984=> 230400 baud 
+// <67108864=> 250000 baud 
+// <121634816=> 460800 baud 
+// <251658240=> 921600 baud 
+// <268435456=> 1000000 baud 
+
+#ifndef NRFX_UARTE_DEFAULT_CONFIG_BAUDRATE
+#define NRFX_UARTE_DEFAULT_CONFIG_BAUDRATE 30801920
+#endif
+
+// <o> NRFX_UARTE_DEFAULT_CONFIG_IRQ_PRIORITY  - Interrupt priority
+ 
+// <0=> 0 (highest) 
+// <1=> 1 
+// <2=> 2 
+// <3=> 3 
+// <4=> 4 
+// <5=> 5 
+// <6=> 6 
+// <7=> 7 
+
+#ifndef NRFX_UARTE_DEFAULT_CONFIG_IRQ_PRIORITY
+#define NRFX_UARTE_DEFAULT_CONFIG_IRQ_PRIORITY 6
+#endif
+
+// <e> NRFX_UARTE_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef NRFX_UARTE_CONFIG_LOG_ENABLED
+#define NRFX_UARTE_CONFIG_LOG_ENABLED 0
+#endif
+// <o> NRFX_UARTE_CONFIG_LOG_LEVEL  - Default Severity level
+ 
+// <0=> Off 
+// <1=> Error 
+// <2=> Warning 
+// <3=> Info 
+// <4=> Debug 
+
+#ifndef NRFX_UARTE_CONFIG_LOG_LEVEL
+#define NRFX_UARTE_CONFIG_LOG_LEVEL 3
+#endif
+
+// <o> NRFX_UARTE_CONFIG_INFO_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef NRFX_UARTE_CONFIG_INFO_COLOR
+#define NRFX_UARTE_CONFIG_INFO_COLOR 0
+#endif
+
+// <o> NRFX_UARTE_CONFIG_DEBUG_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef NRFX_UARTE_CONFIG_DEBUG_COLOR
+#define NRFX_UARTE_CONFIG_DEBUG_COLOR 0
+#endif
+
+// </e>
+
+// </e>
+
+// <e> NRFX_UART_ENABLED - nrfx_uart - UART peripheral driver
+//==========================================================
+#ifndef NRFX_UART_ENABLED
+#define NRFX_UART_ENABLED 1
+#endif
+// <o> NRFX_UART0_ENABLED - Enable UART0 instance 
+#ifndef NRFX_UART0_ENABLED
+#define NRFX_UART0_ENABLED 0
+#endif
+
+// <o> NRFX_UART_DEFAULT_CONFIG_HWFC  - Hardware Flow Control
+ 
+// <0=> Disabled 
+// <1=> Enabled 
+
+#ifndef NRFX_UART_DEFAULT_CONFIG_HWFC
+#define NRFX_UART_DEFAULT_CONFIG_HWFC 0
+#endif
+
+// <o> NRFX_UART_DEFAULT_CONFIG_PARITY  - Parity
+ 
+// <0=> Excluded 
+// <14=> Included 
+
+#ifndef NRFX_UART_DEFAULT_CONFIG_PARITY
+#define NRFX_UART_DEFAULT_CONFIG_PARITY 0
+#endif
+
+// <o> NRFX_UART_DEFAULT_CONFIG_BAUDRATE  - Default Baudrate
+ 
+// <323584=> 1200 baud 
+// <643072=> 2400 baud 
+// <1290240=> 4800 baud 
+// <2576384=> 9600 baud 
+// <3866624=> 14400 baud 
+// <5152768=> 19200 baud 
+// <7729152=> 28800 baud 
+// <8388608=> 31250 baud 
+// <10309632=> 38400 baud 
+// <15007744=> 56000 baud 
+// <15462400=> 57600 baud 
+// <20615168=> 76800 baud 
+// <30924800=> 115200 baud 
+// <61845504=> 230400 baud 
+// <67108864=> 250000 baud 
+// <123695104=> 460800 baud 
+// <247386112=> 921600 baud 
+// <268435456=> 1000000 baud 
+
+#ifndef NRFX_UART_DEFAULT_CONFIG_BAUDRATE
+#define NRFX_UART_DEFAULT_CONFIG_BAUDRATE 30924800
+#endif
+
+// <o> NRFX_UART_DEFAULT_CONFIG_IRQ_PRIORITY  - Interrupt priority
+ 
+// <0=> 0 (highest) 
+// <1=> 1 
+// <2=> 2 
+// <3=> 3 
+// <4=> 4 
+// <5=> 5 
+// <6=> 6 
+// <7=> 7 
+
+#ifndef NRFX_UART_DEFAULT_CONFIG_IRQ_PRIORITY
+#define NRFX_UART_DEFAULT_CONFIG_IRQ_PRIORITY 6
+#endif
+
+// <e> NRFX_UART_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef NRFX_UART_CONFIG_LOG_ENABLED
+#define NRFX_UART_CONFIG_LOG_ENABLED 0
+#endif
+// <o> NRFX_UART_CONFIG_LOG_LEVEL  - Default Severity level
+ 
+// <0=> Off 
+// <1=> Error 
+// <2=> Warning 
+// <3=> Info 
+// <4=> Debug 
+
+#ifndef NRFX_UART_CONFIG_LOG_LEVEL
+#define NRFX_UART_CONFIG_LOG_LEVEL 3
+#endif
+
+// <o> NRFX_UART_CONFIG_INFO_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef NRFX_UART_CONFIG_INFO_COLOR
+#define NRFX_UART_CONFIG_INFO_COLOR 0
+#endif
+
+// <o> NRFX_UART_CONFIG_DEBUG_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef NRFX_UART_CONFIG_DEBUG_COLOR
+#define NRFX_UART_CONFIG_DEBUG_COLOR 0
+#endif
+
+// </e>
+
+// </e>
+
+// <e> NRFX_WDT_ENABLED - nrfx_wdt - WDT peripheral driver
+//==========================================================
+#ifndef NRFX_WDT_ENABLED
+#define NRFX_WDT_ENABLED 0
+#endif
+// <o> NRFX_WDT_CONFIG_BEHAVIOUR  - WDT behavior in CPU SLEEP or HALT mode
+ 
+// <1=> Run in SLEEP, Pause in HALT 
+// <8=> Pause in SLEEP, Run in HALT 
+// <9=> Run in SLEEP and HALT 
+// <0=> Pause in SLEEP and HALT 
+
+#ifndef NRFX_WDT_CONFIG_BEHAVIOUR
+#define NRFX_WDT_CONFIG_BEHAVIOUR 1
+#endif
+
+// <o> NRFX_WDT_CONFIG_RELOAD_VALUE - Reload value in ms  <1-131072000> 
+
+
+#ifndef NRFX_WDT_CONFIG_RELOAD_VALUE
+#define NRFX_WDT_CONFIG_RELOAD_VALUE 2000
+#endif
+
+// <o> NRFX_WDT_CONFIG_NO_IRQ  - Remove WDT IRQ handling from WDT driver
+ 
+// <0=> Include WDT IRQ handling 
+// <1=> Remove WDT IRQ handling 
+
+#ifndef NRFX_WDT_CONFIG_NO_IRQ
+#define NRFX_WDT_CONFIG_NO_IRQ 0
+#endif
+
+// <o> NRFX_WDT_CONFIG_IRQ_PRIORITY  - Interrupt priority
+ 
+// <0=> 0 (highest) 
+// <1=> 1 
+// <2=> 2 
+// <3=> 3 
+// <4=> 4 
+// <5=> 5 
+// <6=> 6 
+// <7=> 7 
+
+#ifndef NRFX_WDT_CONFIG_IRQ_PRIORITY
+#define NRFX_WDT_CONFIG_IRQ_PRIORITY 6
+#endif
+
+// <e> NRFX_WDT_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef NRFX_WDT_CONFIG_LOG_ENABLED
+#define NRFX_WDT_CONFIG_LOG_ENABLED 0
+#endif
+// <o> NRFX_WDT_CONFIG_LOG_LEVEL  - Default Severity level
+ 
+// <0=> Off 
+// <1=> Error 
+// <2=> Warning 
+// <3=> Info 
+// <4=> Debug 
+
+#ifndef NRFX_WDT_CONFIG_LOG_LEVEL
+#define NRFX_WDT_CONFIG_LOG_LEVEL 3
+#endif
+
+// <o> NRFX_WDT_CONFIG_INFO_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef NRFX_WDT_CONFIG_INFO_COLOR
+#define NRFX_WDT_CONFIG_INFO_COLOR 0
+#endif
+
+// <o> NRFX_WDT_CONFIG_DEBUG_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef NRFX_WDT_CONFIG_DEBUG_COLOR
+#define NRFX_WDT_CONFIG_DEBUG_COLOR 0
+#endif
+
+// </e>
+
+// </e>
+
+// <e> NRF_CLOCK_ENABLED - nrf_drv_clock - CLOCK peripheral driver - legacy layer
+//==========================================================
+#ifndef NRF_CLOCK_ENABLED
+#define NRF_CLOCK_ENABLED 1
+#endif
+// <o> CLOCK_CONFIG_LF_SRC  - LF Clock Source
+ 
+// <0=> RC 
+// <1=> XTAL 
+// <2=> Synth 
+// <131073=> External Low Swing 
+// <196609=> External Full Swing 
+
+#ifndef CLOCK_CONFIG_LF_SRC
+#define CLOCK_CONFIG_LF_SRC 1
+#endif
+
+// <q> CLOCK_CONFIG_LF_CAL_ENABLED  - Calibration enable for LF Clock Source
+ 
+
+#ifndef CLOCK_CONFIG_LF_CAL_ENABLED
+#define CLOCK_CONFIG_LF_CAL_ENABLED 0
+#endif
+
+// <o> CLOCK_CONFIG_IRQ_PRIORITY  - Interrupt priority
+ 
+
+// <i> Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
+// <0=> 0 (highest) 
+// <1=> 1 
+// <2=> 2 
+// <3=> 3 
+// <4=> 4 
+// <5=> 5 
+// <6=> 6 
+// <7=> 7 
+
+#ifndef CLOCK_CONFIG_IRQ_PRIORITY
+#define CLOCK_CONFIG_IRQ_PRIORITY 6
+#endif
+
+// </e>
+
+// <e> PDM_ENABLED - nrf_drv_pdm - PDM peripheral driver - legacy layer
+//==========================================================
+#ifndef PDM_ENABLED
+#define PDM_ENABLED 0
+#endif
+// <o> PDM_CONFIG_MODE  - Mode
+ 
+// <0=> Stereo 
+// <1=> Mono 
+
+#ifndef PDM_CONFIG_MODE
+#define PDM_CONFIG_MODE 1
+#endif
+
+// <o> PDM_CONFIG_EDGE  - Edge
+ 
+// <0=> Left falling 
+// <1=> Left rising 
+
+#ifndef PDM_CONFIG_EDGE
+#define PDM_CONFIG_EDGE 0
+#endif
+
+// <o> PDM_CONFIG_CLOCK_FREQ  - Clock frequency
+ 
+// <134217728=> 1000k 
+// <138412032=> 1032k (default) 
+// <142606336=> 1067k 
+
+#ifndef PDM_CONFIG_CLOCK_FREQ
+#define PDM_CONFIG_CLOCK_FREQ 138412032
+#endif
+
+// <o> PDM_CONFIG_IRQ_PRIORITY  - Interrupt priority
+ 
+
+// <i> Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
+// <0=> 0 (highest) 
+// <1=> 1 
+// <2=> 2 
+// <3=> 3 
+// <4=> 4 
+// <5=> 5 
+// <6=> 6 
+// <7=> 7 
+
+#ifndef PDM_CONFIG_IRQ_PRIORITY
+#define PDM_CONFIG_IRQ_PRIORITY 6
+#endif
+
+// </e>
+
+// <e> POWER_ENABLED - nrf_drv_power - POWER peripheral driver - legacy layer
+//==========================================================
+#ifndef POWER_ENABLED
+#define POWER_ENABLED 0
+#endif
+// <o> POWER_CONFIG_IRQ_PRIORITY  - Interrupt priority
+ 
+
+// <i> Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
+// <0=> 0 (highest) 
+// <1=> 1 
+// <2=> 2 
+// <3=> 3 
+// <4=> 4 
+// <5=> 5 
+// <6=> 6 
+// <7=> 7 
+
+#ifndef POWER_CONFIG_IRQ_PRIORITY
+#define POWER_CONFIG_IRQ_PRIORITY 6
+#endif
+
+// <q> POWER_CONFIG_DEFAULT_DCDCEN  - The default configuration of main DCDC regulator
+ 
+
+// <i> This settings means only that components for DCDC regulator are installed and it can be enabled.
+
+#ifndef POWER_CONFIG_DEFAULT_DCDCEN
+#define POWER_CONFIG_DEFAULT_DCDCEN 0
+#endif
+
+// <q> POWER_CONFIG_DEFAULT_DCDCENHV  - The default configuration of High Voltage DCDC regulator
+ 
+
+// <i> This settings means only that components for DCDC regulator are installed and it can be enabled.
+
+#ifndef POWER_CONFIG_DEFAULT_DCDCENHV
+#define POWER_CONFIG_DEFAULT_DCDCENHV 0
+#endif
+
+// </e>
+
+// <q> PPI_ENABLED  - nrf_drv_ppi - PPI peripheral driver - legacy layer
+ 
+
+#ifndef PPI_ENABLED
+#define PPI_ENABLED 0
+#endif
+
+// <e> PWM_ENABLED - nrf_drv_pwm - PWM peripheral driver - legacy layer
+//==========================================================
+#ifndef PWM_ENABLED
+#define PWM_ENABLED 0
+#endif
+// <o> PWM_DEFAULT_CONFIG_OUT0_PIN - Out0 pin  <0-31> 
+
+
+#ifndef PWM_DEFAULT_CONFIG_OUT0_PIN
+#define PWM_DEFAULT_CONFIG_OUT0_PIN 31
+#endif
+
+// <o> PWM_DEFAULT_CONFIG_OUT1_PIN - Out1 pin  <0-31> 
+
+
+#ifndef PWM_DEFAULT_CONFIG_OUT1_PIN
+#define PWM_DEFAULT_CONFIG_OUT1_PIN 31
+#endif
+
+// <o> PWM_DEFAULT_CONFIG_OUT2_PIN - Out2 pin  <0-31> 
+
+
+#ifndef PWM_DEFAULT_CONFIG_OUT2_PIN
+#define PWM_DEFAULT_CONFIG_OUT2_PIN 31
+#endif
+
+// <o> PWM_DEFAULT_CONFIG_OUT3_PIN - Out3 pin  <0-31> 
+
+
+#ifndef PWM_DEFAULT_CONFIG_OUT3_PIN
+#define PWM_DEFAULT_CONFIG_OUT3_PIN 31
+#endif
+
+// <o> PWM_DEFAULT_CONFIG_BASE_CLOCK  - Base clock
+ 
+// <0=> 16 MHz 
+// <1=> 8 MHz 
+// <2=> 4 MHz 
+// <3=> 2 MHz 
+// <4=> 1 MHz 
+// <5=> 500 kHz 
+// <6=> 250 kHz 
+// <7=> 125 kHz 
+
+#ifndef PWM_DEFAULT_CONFIG_BASE_CLOCK
+#define PWM_DEFAULT_CONFIG_BASE_CLOCK 4
+#endif
+
+// <o> PWM_DEFAULT_CONFIG_COUNT_MODE  - Count mode
+ 
+// <0=> Up 
+// <1=> Up and Down 
+
+#ifndef PWM_DEFAULT_CONFIG_COUNT_MODE
+#define PWM_DEFAULT_CONFIG_COUNT_MODE 0
+#endif
+
+// <o> PWM_DEFAULT_CONFIG_TOP_VALUE - Top value 
+#ifndef PWM_DEFAULT_CONFIG_TOP_VALUE
+#define PWM_DEFAULT_CONFIG_TOP_VALUE 1000
+#endif
+
+// <o> PWM_DEFAULT_CONFIG_LOAD_MODE  - Load mode
+ 
+// <0=> Common 
+// <1=> Grouped 
+// <2=> Individual 
+// <3=> Waveform 
+
+#ifndef PWM_DEFAULT_CONFIG_LOAD_MODE
+#define PWM_DEFAULT_CONFIG_LOAD_MODE 0
+#endif
+
+// <o> PWM_DEFAULT_CONFIG_STEP_MODE  - Step mode
+ 
+// <0=> Auto 
+// <1=> Triggered 
+
+#ifndef PWM_DEFAULT_CONFIG_STEP_MODE
+#define PWM_DEFAULT_CONFIG_STEP_MODE 0
+#endif
+
+// <o> PWM_DEFAULT_CONFIG_IRQ_PRIORITY  - Interrupt priority
+ 
+
+// <i> Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
+// <0=> 0 (highest) 
+// <1=> 1 
+// <2=> 2 
+// <3=> 3 
+// <4=> 4 
+// <5=> 5 
+// <6=> 6 
+// <7=> 7 
+
+#ifndef PWM_DEFAULT_CONFIG_IRQ_PRIORITY
+#define PWM_DEFAULT_CONFIG_IRQ_PRIORITY 6
+#endif
+
+// <q> PWM0_ENABLED  - Enable PWM0 instance
+ 
+
+#ifndef PWM0_ENABLED
+#define PWM0_ENABLED 0
+#endif
+
+// <q> PWM1_ENABLED  - Enable PWM1 instance
+ 
+
+#ifndef PWM1_ENABLED
+#define PWM1_ENABLED 0
+#endif
+
+// <q> PWM2_ENABLED  - Enable PWM2 instance
+ 
+
+#ifndef PWM2_ENABLED
+#define PWM2_ENABLED 0
+#endif
+
+// <e> PWM_NRF52_ANOMALY_109_WORKAROUND_ENABLED - Enables nRF52 Anomaly 109 workaround for PWM.
+
+// <i> The workaround uses interrupts to wake up the CPU and ensure
+// <i> it is active when PWM is about to start a DMA transfer. For
+// <i> initial transfer, done when a playback is started via PPI,
+// <i> a specific EGU instance is used to generate the interrupt.
+// <i> During the playback, the PWM interrupt triggered on SEQEND
+// <i> event of a preceding sequence is used to protect the transfer
+// <i> done for the next sequence to be played.
+//==========================================================
+#ifndef PWM_NRF52_ANOMALY_109_WORKAROUND_ENABLED
+#define PWM_NRF52_ANOMALY_109_WORKAROUND_ENABLED 0
+#endif
+// <o> PWM_NRF52_ANOMALY_109_EGU_INSTANCE  - EGU instance used by the nRF52 Anomaly 109 workaround for PWM.
+ 
+// <0=> EGU0 
+// <1=> EGU1 
+// <2=> EGU2 
+// <3=> EGU3 
+// <4=> EGU4 
+// <5=> EGU5 
+
+#ifndef PWM_NRF52_ANOMALY_109_EGU_INSTANCE
+#define PWM_NRF52_ANOMALY_109_EGU_INSTANCE 5
+#endif
+
+// </e>
+
+// </e>
+
+// <e> QDEC_ENABLED - nrf_drv_qdec - QDEC peripheral driver - legacy layer
+//==========================================================
+#ifndef QDEC_ENABLED
+#define QDEC_ENABLED 0
+#endif
+// <o> QDEC_CONFIG_REPORTPER  - Report period
+ 
+// <0=> 10 Samples 
+// <1=> 40 Samples 
+// <2=> 80 Samples 
+// <3=> 120 Samples 
+// <4=> 160 Samples 
+// <5=> 200 Samples 
+// <6=> 240 Samples 
+// <7=> 280 Samples 
+
+#ifndef QDEC_CONFIG_REPORTPER
+#define QDEC_CONFIG_REPORTPER 0
+#endif
+
+// <o> QDEC_CONFIG_SAMPLEPER  - Sample period
+ 
+// <0=> 128 us 
+// <1=> 256 us 
+// <2=> 512 us 
+// <3=> 1024 us 
+// <4=> 2048 us 
+// <5=> 4096 us 
+// <6=> 8192 us 
+// <7=> 16384 us 
+
+#ifndef QDEC_CONFIG_SAMPLEPER
+#define QDEC_CONFIG_SAMPLEPER 7
+#endif
+
+// <o> QDEC_CONFIG_PIO_A - A pin  <0-31> 
+
+
+#ifndef QDEC_CONFIG_PIO_A
+#define QDEC_CONFIG_PIO_A 31
+#endif
+
+// <o> QDEC_CONFIG_PIO_B - B pin  <0-31> 
+
+
+#ifndef QDEC_CONFIG_PIO_B
+#define QDEC_CONFIG_PIO_B 31
+#endif
+
+// <o> QDEC_CONFIG_PIO_LED - LED pin  <0-31> 
+
+
+#ifndef QDEC_CONFIG_PIO_LED
+#define QDEC_CONFIG_PIO_LED 31
+#endif
+
+// <o> QDEC_CONFIG_LEDPRE - LED pre 
+#ifndef QDEC_CONFIG_LEDPRE
+#define QDEC_CONFIG_LEDPRE 511
+#endif
+
+// <o> QDEC_CONFIG_LEDPOL  - LED polarity
+ 
+// <0=> Active low 
+// <1=> Active high 
+
+#ifndef QDEC_CONFIG_LEDPOL
+#define QDEC_CONFIG_LEDPOL 1
+#endif
+
+// <q> QDEC_CONFIG_DBFEN  - Debouncing enable
+ 
+
+#ifndef QDEC_CONFIG_DBFEN
+#define QDEC_CONFIG_DBFEN 0
+#endif
+
+// <q> QDEC_CONFIG_SAMPLE_INTEN  - Sample ready interrupt enable
+ 
+
+#ifndef QDEC_CONFIG_SAMPLE_INTEN
+#define QDEC_CONFIG_SAMPLE_INTEN 0
+#endif
+
+// <o> QDEC_CONFIG_IRQ_PRIORITY  - Interrupt priority
+ 
+
+// <i> Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
+// <0=> 0 (highest) 
+// <1=> 1 
+// <2=> 2 
+// <3=> 3 
+// <4=> 4 
+// <5=> 5 
+// <6=> 6 
+// <7=> 7 
+
+#ifndef QDEC_CONFIG_IRQ_PRIORITY
+#define QDEC_CONFIG_IRQ_PRIORITY 6
+#endif
+
+// </e>
+
+// <e> QSPI_ENABLED - nrf_drv_qspi - QSPI peripheral driver - legacy layer
+//==========================================================
+#ifndef QSPI_ENABLED
+#define QSPI_ENABLED 0
+#endif
+// <o> QSPI_CONFIG_SCK_DELAY - tSHSL, tWHSL and tSHWL in number of 16 MHz periods (62.5 ns).  <0-255> 
+
+
+#ifndef QSPI_CONFIG_SCK_DELAY
+#define QSPI_CONFIG_SCK_DELAY 1
+#endif
+
+// <o> QSPI_CONFIG_XIP_OFFSET - Address offset in the external memory for Execute in Place operation. 
+#ifndef QSPI_CONFIG_XIP_OFFSET
+#define QSPI_CONFIG_XIP_OFFSET 0
+#endif
+
+// <o> QSPI_CONFIG_READOC  - Number of data lines and opcode used for reading.
+ 
+// <0=> FastRead 
+// <1=> Read2O 
+// <2=> Read2IO 
+// <3=> Read4O 
+// <4=> Read4IO 
+
+#ifndef QSPI_CONFIG_READOC
+#define QSPI_CONFIG_READOC 0
+#endif
+
+// <o> QSPI_CONFIG_WRITEOC  - Number of data lines and opcode used for writing.
+ 
+// <0=> PP 
+// <1=> PP2O 
+// <2=> PP4O 
+// <3=> PP4IO 
+
+#ifndef QSPI_CONFIG_WRITEOC
+#define QSPI_CONFIG_WRITEOC 0
+#endif
+
+// <o> QSPI_CONFIG_ADDRMODE  - Addressing mode.
+ 
+// <0=> 24bit 
+// <1=> 32bit 
+
+#ifndef QSPI_CONFIG_ADDRMODE
+#define QSPI_CONFIG_ADDRMODE 0
+#endif
+
+// <o> QSPI_CONFIG_MODE  - SPI mode.
+ 
+// <0=> Mode 0 
+// <1=> Mode 1 
+
+#ifndef QSPI_CONFIG_MODE
+#define QSPI_CONFIG_MODE 0
+#endif
+
+// <o> QSPI_CONFIG_FREQUENCY  - Frequency divider.
+ 
+// <0=> 32MHz/1 
+// <1=> 32MHz/2 
+// <2=> 32MHz/3 
+// <3=> 32MHz/4 
+// <4=> 32MHz/5 
+// <5=> 32MHz/6 
+// <6=> 32MHz/7 
+// <7=> 32MHz/8 
+// <8=> 32MHz/9 
+// <9=> 32MHz/10 
+// <10=> 32MHz/11 
+// <11=> 32MHz/12 
+// <12=> 32MHz/13 
+// <13=> 32MHz/14 
+// <14=> 32MHz/15 
+// <15=> 32MHz/16 
+
+#ifndef QSPI_CONFIG_FREQUENCY
+#define QSPI_CONFIG_FREQUENCY 15
+#endif
+
+// <s> QSPI_PIN_SCK - SCK pin value.
+#ifndef QSPI_PIN_SCK
+#define QSPI_PIN_SCK NRF_QSPI_PIN_NOT_CONNECTED
+#endif
+
+// <s> QSPI_PIN_CSN - CSN pin value.
+#ifndef QSPI_PIN_CSN
+#define QSPI_PIN_CSN NRF_QSPI_PIN_NOT_CONNECTED
+#endif
+
+// <s> QSPI_PIN_IO0 - IO0 pin value.
+#ifndef QSPI_PIN_IO0
+#define QSPI_PIN_IO0 NRF_QSPI_PIN_NOT_CONNECTED
+#endif
+
+// <s> QSPI_PIN_IO1 - IO1 pin value.
+#ifndef QSPI_PIN_IO1
+#define QSPI_PIN_IO1 NRF_QSPI_PIN_NOT_CONNECTED
+#endif
+
+// <s> QSPI_PIN_IO2 - IO2 pin value.
+#ifndef QSPI_PIN_IO2
+#define QSPI_PIN_IO2 NRF_QSPI_PIN_NOT_CONNECTED
+#endif
+
+// <s> QSPI_PIN_IO3 - IO3 pin value.
+#ifndef QSPI_PIN_IO3
+#define QSPI_PIN_IO3 NRF_QSPI_PIN_NOT_CONNECTED
+#endif
+
+// <o> QSPI_CONFIG_IRQ_PRIORITY  - Interrupt priority
+ 
+
+// <i> Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
+// <0=> 0 (highest) 
+// <1=> 1 
+// <2=> 2 
+// <3=> 3 
+// <4=> 4 
+// <5=> 5 
+// <6=> 6 
+// <7=> 7 
+
+#ifndef QSPI_CONFIG_IRQ_PRIORITY
+#define QSPI_CONFIG_IRQ_PRIORITY 6
+#endif
+
+// </e>
+
+// <e> RNG_ENABLED - nrf_drv_rng - RNG peripheral driver - legacy layer
+//==========================================================
+#ifndef RNG_ENABLED
+#define RNG_ENABLED 0
+#endif
+// <q> RNG_CONFIG_ERROR_CORRECTION  - Error correction
+ 
+
+#ifndef RNG_CONFIG_ERROR_CORRECTION
+#define RNG_CONFIG_ERROR_CORRECTION 1
+#endif
+
+// <o> RNG_CONFIG_POOL_SIZE - Pool size 
+#ifndef RNG_CONFIG_POOL_SIZE
+#define RNG_CONFIG_POOL_SIZE 64
+#endif
+
+// <o> RNG_CONFIG_IRQ_PRIORITY  - Interrupt priority
+ 
+
+// <i> Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
+// <0=> 0 (highest) 
+// <1=> 1 
+// <2=> 2 
+// <3=> 3 
+// <4=> 4 
+// <5=> 5 
+// <6=> 6 
+// <7=> 7 
+
+#ifndef RNG_CONFIG_IRQ_PRIORITY
+#define RNG_CONFIG_IRQ_PRIORITY 6
+#endif
+
+// </e>
+
+// <e> RTC_ENABLED - nrf_drv_rtc - RTC peripheral driver - legacy layer
+//==========================================================
+#ifndef RTC_ENABLED
+#define RTC_ENABLED 0
+#endif
+// <o> RTC_DEFAULT_CONFIG_FREQUENCY - Frequency  <16-32768> 
+
+
+#ifndef RTC_DEFAULT_CONFIG_FREQUENCY
+#define RTC_DEFAULT_CONFIG_FREQUENCY 32768
+#endif
+
+// <q> RTC_DEFAULT_CONFIG_RELIABLE  - Ensures safe compare event triggering
+ 
+
+#ifndef RTC_DEFAULT_CONFIG_RELIABLE
+#define RTC_DEFAULT_CONFIG_RELIABLE 0
+#endif
+
+// <o> RTC_DEFAULT_CONFIG_IRQ_PRIORITY  - Interrupt priority
+ 
+
+// <i> Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
+// <0=> 0 (highest) 
+// <1=> 1 
+// <2=> 2 
+// <3=> 3 
+// <4=> 4 
+// <5=> 5 
+// <6=> 6 
+// <7=> 7 
+
+#ifndef RTC_DEFAULT_CONFIG_IRQ_PRIORITY
+#define RTC_DEFAULT_CONFIG_IRQ_PRIORITY 6
+#endif
+
+// <q> RTC0_ENABLED  - Enable RTC0 instance
+ 
+
+#ifndef RTC0_ENABLED
+#define RTC0_ENABLED 0
+#endif
+
+// <q> RTC1_ENABLED  - Enable RTC1 instance
+ 
+
+#ifndef RTC1_ENABLED
+#define RTC1_ENABLED 0
+#endif
+
+// <q> RTC2_ENABLED  - Enable RTC2 instance
+ 
+
+#ifndef RTC2_ENABLED
+#define RTC2_ENABLED 0
+#endif
+
+// <o> NRF_MAXIMUM_LATENCY_US - Maximum possible time[us] in highest priority interrupt 
+#ifndef NRF_MAXIMUM_LATENCY_US
+#define NRF_MAXIMUM_LATENCY_US 2000
+#endif
+
+// </e>
+
+// <e> SAADC_ENABLED - nrf_drv_saadc - SAADC peripheral driver - legacy layer
+//==========================================================
+#ifndef SAADC_ENABLED
+#define SAADC_ENABLED 0
+#endif
+// <o> SAADC_CONFIG_RESOLUTION  - Resolution
+ 
+// <0=> 8 bit 
+// <1=> 10 bit 
+// <2=> 12 bit 
+// <3=> 14 bit 
+
+#ifndef SAADC_CONFIG_RESOLUTION
+#define SAADC_CONFIG_RESOLUTION 1
+#endif
+
+// <o> SAADC_CONFIG_OVERSAMPLE  - Sample period
+ 
+// <0=> Disabled 
+// <1=> 2x 
+// <2=> 4x 
+// <3=> 8x 
+// <4=> 16x 
+// <5=> 32x 
+// <6=> 64x 
+// <7=> 128x 
+// <8=> 256x 
+
+#ifndef SAADC_CONFIG_OVERSAMPLE
+#define SAADC_CONFIG_OVERSAMPLE 0
+#endif
+
+// <q> SAADC_CONFIG_LP_MODE  - Enabling low power mode
+ 
+
+#ifndef SAADC_CONFIG_LP_MODE
+#define SAADC_CONFIG_LP_MODE 0
+#endif
+
+// <o> SAADC_CONFIG_IRQ_PRIORITY  - Interrupt priority
+ 
+
+// <i> Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
+// <0=> 0 (highest) 
+// <1=> 1 
+// <2=> 2 
+// <3=> 3 
+// <4=> 4 
+// <5=> 5 
+// <6=> 6 
+// <7=> 7 
+
+#ifndef SAADC_CONFIG_IRQ_PRIORITY
+#define SAADC_CONFIG_IRQ_PRIORITY 6
+#endif
+
+// </e>
+
+// <e> SPIS_ENABLED - nrf_drv_spis - SPIS peripheral driver - legacy layer
+//==========================================================
+#ifndef SPIS_ENABLED
+#define SPIS_ENABLED 0
+#endif
+// <o> SPIS_DEFAULT_CONFIG_IRQ_PRIORITY  - Interrupt priority
+ 
+
+// <i> Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
+// <0=> 0 (highest) 
+// <1=> 1 
+// <2=> 2 
+// <3=> 3 
+// <4=> 4 
+// <5=> 5 
+// <6=> 6 
+// <7=> 7 
+
+#ifndef SPIS_DEFAULT_CONFIG_IRQ_PRIORITY
+#define SPIS_DEFAULT_CONFIG_IRQ_PRIORITY 6
+#endif
+
+// <o> SPIS_DEFAULT_MODE  - Mode
+ 
+// <0=> MODE_0 
+// <1=> MODE_1 
+// <2=> MODE_2 
+// <3=> MODE_3 
+
+#ifndef SPIS_DEFAULT_MODE
+#define SPIS_DEFAULT_MODE 0
+#endif
+
+// <o> SPIS_DEFAULT_BIT_ORDER  - SPIS default bit order
+ 
+// <0=> MSB first 
+// <1=> LSB first 
+
+#ifndef SPIS_DEFAULT_BIT_ORDER
+#define SPIS_DEFAULT_BIT_ORDER 0
+#endif
+
+// <o> SPIS_DEFAULT_DEF - SPIS default DEF character  <0-255> 
+
+
+#ifndef SPIS_DEFAULT_DEF
+#define SPIS_DEFAULT_DEF 255
+#endif
+
+// <o> SPIS_DEFAULT_ORC - SPIS default ORC character  <0-255> 
+
+
+#ifndef SPIS_DEFAULT_ORC
+#define SPIS_DEFAULT_ORC 255
+#endif
+
+// <q> SPIS0_ENABLED  - Enable SPIS0 instance
+ 
+
+#ifndef SPIS0_ENABLED
+#define SPIS0_ENABLED 0
+#endif
+
+// <q> SPIS1_ENABLED  - Enable SPIS1 instance
+ 
+
+#ifndef SPIS1_ENABLED
+#define SPIS1_ENABLED 0
+#endif
+
+// <q> SPIS2_ENABLED  - Enable SPIS2 instance
+ 
+
+#ifndef SPIS2_ENABLED
+#define SPIS2_ENABLED 0
+#endif
+
+// <q> SPIS_NRF52_ANOMALY_109_WORKAROUND_ENABLED  - Enables nRF52 Anomaly 109 workaround for SPIS.
+ 
+
+// <i> The workaround uses a GPIOTE channel to generate interrupts
+// <i> on falling edges detected on the CSN line. This will make
+// <i> the CPU active for the moment when SPIS starts DMA transfers,
+// <i> and this way the transfers will be protected.
+// <i> This workaround uses GPIOTE driver, so this driver must be
+// <i> enabled as well.
+
+#ifndef SPIS_NRF52_ANOMALY_109_WORKAROUND_ENABLED
+#define SPIS_NRF52_ANOMALY_109_WORKAROUND_ENABLED 0
+#endif
+
+// </e>
+
+// <e> SPI_ENABLED - nrf_drv_spi - SPI/SPIM peripheral driver - legacy layer
+//==========================================================
+#ifndef SPI_ENABLED
+#define SPI_ENABLED 0
+#endif
+// <o> SPI_DEFAULT_CONFIG_IRQ_PRIORITY  - Interrupt priority
+ 
+
+// <i> Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
+// <0=> 0 (highest) 
+// <1=> 1 
+// <2=> 2 
+// <3=> 3 
+// <4=> 4 
+// <5=> 5 
+// <6=> 6 
+// <7=> 7 
+
+#ifndef SPI_DEFAULT_CONFIG_IRQ_PRIORITY
+#define SPI_DEFAULT_CONFIG_IRQ_PRIORITY 6
+#endif
+
+// <o> NRF_SPI_DRV_MISO_PULLUP_CFG  - MISO PIN pull-up configuration.
+ 
+// <0=> NRF_GPIO_PIN_NOPULL 
+// <1=> NRF_GPIO_PIN_PULLDOWN 
+// <3=> NRF_GPIO_PIN_PULLUP 
+
+#ifndef NRF_SPI_DRV_MISO_PULLUP_CFG
+#define NRF_SPI_DRV_MISO_PULLUP_CFG 1
+#endif
+
+// <e> SPI0_ENABLED - Enable SPI0 instance
+//==========================================================
+#ifndef SPI0_ENABLED
+#define SPI0_ENABLED 0
+#endif
+// <q> SPI0_USE_EASY_DMA  - Use EasyDMA
+ 
+
+#ifndef SPI0_USE_EASY_DMA
+#define SPI0_USE_EASY_DMA 1
+#endif
+
+// </e>
+
+// <e> SPI1_ENABLED - Enable SPI1 instance
+//==========================================================
+#ifndef SPI1_ENABLED
+#define SPI1_ENABLED 0
+#endif
+// <q> SPI1_USE_EASY_DMA  - Use EasyDMA
+ 
+
+#ifndef SPI1_USE_EASY_DMA
+#define SPI1_USE_EASY_DMA 1
+#endif
+
+// </e>
+
+// <e> SPI2_ENABLED - Enable SPI2 instance
+//==========================================================
+#ifndef SPI2_ENABLED
+#define SPI2_ENABLED 0
+#endif
+// <q> SPI2_USE_EASY_DMA  - Use EasyDMA
+ 
+
+#ifndef SPI2_USE_EASY_DMA
+#define SPI2_USE_EASY_DMA 1
+#endif
+
+// </e>
+
+// <q> SPIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED  - Enables nRF52 anomaly 109 workaround for SPIM.
+ 
+
+// <i> The workaround uses interrupts to wake up the CPU by catching
+// <i> a start event of zero-length transmission to start the clock. This 
+// <i> ensures that the DMA transfer will be executed without issues and
+// <i> that the proper transfer will be started. See more in the Errata 
+// <i> document or Anomaly 109 Addendum located at 
+// <i> https://infocenter.nordicsemi.com/
+
+#ifndef SPIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED
+#define SPIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED 0
+#endif
+
+// </e>
+
+// <e> TIMER_ENABLED - nrf_drv_timer - TIMER periperal driver - legacy layer
+//==========================================================
+#ifndef TIMER_ENABLED
+#define TIMER_ENABLED 0
+#endif
+// <o> TIMER_DEFAULT_CONFIG_FREQUENCY  - Timer frequency if in Timer mode
+ 
+// <0=> 16 MHz 
+// <1=> 8 MHz 
+// <2=> 4 MHz 
+// <3=> 2 MHz 
+// <4=> 1 MHz 
+// <5=> 500 kHz 
+// <6=> 250 kHz 
+// <7=> 125 kHz 
+// <8=> 62.5 kHz 
+// <9=> 31.25 kHz 
+
+#ifndef TIMER_DEFAULT_CONFIG_FREQUENCY
+#define TIMER_DEFAULT_CONFIG_FREQUENCY 0
+#endif
+
+// <o> TIMER_DEFAULT_CONFIG_MODE  - Timer mode or operation
+ 
+// <0=> Timer 
+// <1=> Counter 
+
+#ifndef TIMER_DEFAULT_CONFIG_MODE
+#define TIMER_DEFAULT_CONFIG_MODE 0
+#endif
+
+// <o> TIMER_DEFAULT_CONFIG_BIT_WIDTH  - Timer counter bit width
+ 
+// <0=> 16 bit 
+// <1=> 8 bit 
+// <2=> 24 bit 
+// <3=> 32 bit 
+
+#ifndef TIMER_DEFAULT_CONFIG_BIT_WIDTH
+#define TIMER_DEFAULT_CONFIG_BIT_WIDTH 0
+#endif
+
+// <o> TIMER_DEFAULT_CONFIG_IRQ_PRIORITY  - Interrupt priority
+ 
+
+// <i> Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
+// <0=> 0 (highest) 
+// <1=> 1 
+// <2=> 2 
+// <3=> 3 
+// <4=> 4 
+// <5=> 5 
+// <6=> 6 
+// <7=> 7 
+
+#ifndef TIMER_DEFAULT_CONFIG_IRQ_PRIORITY
+#define TIMER_DEFAULT_CONFIG_IRQ_PRIORITY 6
+#endif
+
+// <q> TIMER0_ENABLED  - Enable TIMER0 instance
+ 
+
+#ifndef TIMER0_ENABLED
+#define TIMER0_ENABLED 0
+#endif
+
+// <q> TIMER1_ENABLED  - Enable TIMER1 instance
+ 
+
+#ifndef TIMER1_ENABLED
+#define TIMER1_ENABLED 0
+#endif
+
+// <q> TIMER2_ENABLED  - Enable TIMER2 instance
+ 
+
+#ifndef TIMER2_ENABLED
+#define TIMER2_ENABLED 0
+#endif
+
+// <q> TIMER3_ENABLED  - Enable TIMER3 instance
+ 
+
+#ifndef TIMER3_ENABLED
+#define TIMER3_ENABLED 0
+#endif
+
+// <q> TIMER4_ENABLED  - Enable TIMER4 instance
+ 
+
+#ifndef TIMER4_ENABLED
+#define TIMER4_ENABLED 0
+#endif
+
+// </e>
+
+// <e> TWIS_ENABLED - nrf_drv_twis - TWIS peripheral driver - legacy layer
+//==========================================================
+#ifndef TWIS_ENABLED
+#define TWIS_ENABLED 0
+#endif
+// <q> TWIS0_ENABLED  - Enable TWIS0 instance
+ 
+
+#ifndef TWIS0_ENABLED
+#define TWIS0_ENABLED 0
+#endif
+
+// <q> TWIS1_ENABLED  - Enable TWIS1 instance
+ 
+
+#ifndef TWIS1_ENABLED
+#define TWIS1_ENABLED 0
+#endif
+
+// <q> TWIS_ASSUME_INIT_AFTER_RESET_ONLY  - Assume that any instance would be initialized only once
+ 
+
+// <i> Optimization flag. Registers used by TWIS are shared by other peripherals. Normally, during initialization driver tries to clear all registers to known state before doing the initialization itself. This gives initialization safe procedure, no matter when it would be called. If you activate TWIS only once and do never uninitialize it - set this flag to 1 what gives more optimal code.
+
+#ifndef TWIS_ASSUME_INIT_AFTER_RESET_ONLY
+#define TWIS_ASSUME_INIT_AFTER_RESET_ONLY 0
+#endif
+
+// <q> TWIS_NO_SYNC_MODE  - Remove support for synchronous mode
+ 
+
+// <i> Synchronous mode would be used in specific situations. And it uses some additional code and data memory to safely process state machine by polling it in status functions. If this functionality is not required it may be disabled to free some resources.
+
+#ifndef TWIS_NO_SYNC_MODE
+#define TWIS_NO_SYNC_MODE 0
+#endif
+
+// <o> TWIS_DEFAULT_CONFIG_ADDR0 - Address0 
+#ifndef TWIS_DEFAULT_CONFIG_ADDR0
+#define TWIS_DEFAULT_CONFIG_ADDR0 0
+#endif
+
+// <o> TWIS_DEFAULT_CONFIG_ADDR1 - Address1 
+#ifndef TWIS_DEFAULT_CONFIG_ADDR1
+#define TWIS_DEFAULT_CONFIG_ADDR1 0
+#endif
+
+// <o> TWIS_DEFAULT_CONFIG_SCL_PULL  - SCL pin pull configuration
+ 
+// <0=> Disabled 
+// <1=> Pull down 
+// <3=> Pull up 
+
+#ifndef TWIS_DEFAULT_CONFIG_SCL_PULL
+#define TWIS_DEFAULT_CONFIG_SCL_PULL 0
+#endif
+
+// <o> TWIS_DEFAULT_CONFIG_SDA_PULL  - SDA pin pull configuration
+ 
+// <0=> Disabled 
+// <1=> Pull down 
+// <3=> Pull up 
+
+#ifndef TWIS_DEFAULT_CONFIG_SDA_PULL
+#define TWIS_DEFAULT_CONFIG_SDA_PULL 0
+#endif
+
+// <o> TWIS_DEFAULT_CONFIG_IRQ_PRIORITY  - Interrupt priority
+ 
+
+// <i> Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
+// <0=> 0 (highest) 
+// <1=> 1 
+// <2=> 2 
+// <3=> 3 
+// <4=> 4 
+// <5=> 5 
+// <6=> 6 
+// <7=> 7 
+
+#ifndef TWIS_DEFAULT_CONFIG_IRQ_PRIORITY
+#define TWIS_DEFAULT_CONFIG_IRQ_PRIORITY 6
+#endif
+
+// </e>
+
+// <e> TWI_ENABLED - nrf_drv_twi - TWI/TWIM peripheral driver - legacy layer
+//==========================================================
+#ifndef TWI_ENABLED
+#define TWI_ENABLED 0
+#endif
+// <o> TWI_DEFAULT_CONFIG_FREQUENCY  - Frequency
+ 
+// <26738688=> 100k 
+// <67108864=> 250k 
+// <104857600=> 400k 
+
+#ifndef TWI_DEFAULT_CONFIG_FREQUENCY
+#define TWI_DEFAULT_CONFIG_FREQUENCY 26738688
+#endif
+
+// <q> TWI_DEFAULT_CONFIG_CLR_BUS_INIT  - Enables bus clearing procedure during init
+ 
+
+#ifndef TWI_DEFAULT_CONFIG_CLR_BUS_INIT
+#define TWI_DEFAULT_CONFIG_CLR_BUS_INIT 0
+#endif
+
+// <q> TWI_DEFAULT_CONFIG_HOLD_BUS_UNINIT  - Enables bus holding after uninit
+ 
+
+#ifndef TWI_DEFAULT_CONFIG_HOLD_BUS_UNINIT
+#define TWI_DEFAULT_CONFIG_HOLD_BUS_UNINIT 0
+#endif
+
+// <o> TWI_DEFAULT_CONFIG_IRQ_PRIORITY  - Interrupt priority
+ 
+
+// <i> Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
+// <0=> 0 (highest) 
+// <1=> 1 
+// <2=> 2 
+// <3=> 3 
+// <4=> 4 
+// <5=> 5 
+// <6=> 6 
+// <7=> 7 
+
+#ifndef TWI_DEFAULT_CONFIG_IRQ_PRIORITY
+#define TWI_DEFAULT_CONFIG_IRQ_PRIORITY 6
+#endif
+
+// <e> TWI0_ENABLED - Enable TWI0 instance
+//==========================================================
+#ifndef TWI0_ENABLED
+#define TWI0_ENABLED 0
+#endif
+// <q> TWI0_USE_EASY_DMA  - Use EasyDMA (if present)
+ 
+
+#ifndef TWI0_USE_EASY_DMA
+#define TWI0_USE_EASY_DMA 0
+#endif
+
+// </e>
+
+// <e> TWI1_ENABLED - Enable TWI1 instance
+//==========================================================
+#ifndef TWI1_ENABLED
+#define TWI1_ENABLED 0
+#endif
+// <q> TWI1_USE_EASY_DMA  - Use EasyDMA (if present)
+ 
+
+#ifndef TWI1_USE_EASY_DMA
+#define TWI1_USE_EASY_DMA 0
+#endif
+
+// </e>
+
+// <q> TWIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED  - Enables nRF52 anomaly 109 workaround for TWIM.
+ 
+
+// <i> The workaround uses interrupts to wake up the CPU by catching
+// <i> the start event of zero-frequency transmission, clear the 
+// <i> peripheral, set desired frequency, start the peripheral, and
+// <i> the proper transmission. See more in the Errata document or
+// <i> Anomaly 109 Addendum located at https://infocenter.nordicsemi.com/
+
+#ifndef TWIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED
+#define TWIM_NRF52_ANOMALY_109_WORKAROUND_ENABLED 0
+#endif
+
+// </e>
+
+// <e> UART_ENABLED - nrf_drv_uart - UART/UARTE peripheral driver - legacy layer
+//==========================================================
+#ifndef UART_ENABLED
+#define UART_ENABLED 1
+#endif
+// <o> UART_DEFAULT_CONFIG_HWFC  - Hardware Flow Control
+ 
+// <0=> Disabled 
+// <1=> Enabled 
+
+#ifndef UART_DEFAULT_CONFIG_HWFC
+#define UART_DEFAULT_CONFIG_HWFC 0
+#endif
+
+// <o> UART_DEFAULT_CONFIG_PARITY  - Parity
+ 
+// <0=> Excluded 
+// <14=> Included 
+
+#ifndef UART_DEFAULT_CONFIG_PARITY
+#define UART_DEFAULT_CONFIG_PARITY 0
+#endif
+
+// <o> UART_DEFAULT_CONFIG_BAUDRATE  - Default Baudrate
+ 
+// <323584=> 1200 baud 
+// <643072=> 2400 baud 
+// <1290240=> 4800 baud 
+// <2576384=> 9600 baud 
+// <3862528=> 14400 baud 
+// <5152768=> 19200 baud 
+// <7716864=> 28800 baud 
+// <10289152=> 38400 baud 
+// <15400960=> 57600 baud 
+// <20615168=> 76800 baud 
+// <30801920=> 115200 baud 
+// <61865984=> 230400 baud 
+// <67108864=> 250000 baud 
+// <121634816=> 460800 baud 
+// <251658240=> 921600 baud 
+// <268435456=> 1000000 baud 
+
+#ifndef UART_DEFAULT_CONFIG_BAUDRATE
+#define UART_DEFAULT_CONFIG_BAUDRATE 30801920
+#endif
+
+// <o> UART_DEFAULT_CONFIG_IRQ_PRIORITY  - Interrupt priority
+ 
+
+// <i> Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
+// <0=> 0 (highest) 
+// <1=> 1 
+// <2=> 2 
+// <3=> 3 
+// <4=> 4 
+// <5=> 5 
+// <6=> 6 
+// <7=> 7 
+
+#ifndef UART_DEFAULT_CONFIG_IRQ_PRIORITY
+#define UART_DEFAULT_CONFIG_IRQ_PRIORITY 6
+#endif
+
+// <q> UART_EASY_DMA_SUPPORT  - Driver supporting EasyDMA
+ 
+
+#ifndef UART_EASY_DMA_SUPPORT
+#define UART_EASY_DMA_SUPPORT 1
+#endif
+
+// <q> UART_LEGACY_SUPPORT  - Driver supporting Legacy mode
+ 
+
+#ifndef UART_LEGACY_SUPPORT
+#define UART_LEGACY_SUPPORT 1
+#endif
+
+// <e> UART0_ENABLED - Enable UART0 instance
+//==========================================================
+#ifndef UART0_ENABLED
+#define UART0_ENABLED 1
+#endif
+// <q> UART0_CONFIG_USE_EASY_DMA  - Default setting for using EasyDMA
+ 
+
+#ifndef UART0_CONFIG_USE_EASY_DMA
+#define UART0_CONFIG_USE_EASY_DMA 1
+#endif
+
+// </e>
+
+// </e>
+
+// <e> USBD_ENABLED - nrf_drv_usbd - Software Component
+//==========================================================
+#ifndef USBD_ENABLED
+#define USBD_ENABLED 0
+#endif
+// <o> USBD_CONFIG_IRQ_PRIORITY  - Interrupt priority
+ 
+
+// <i> Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
+// <0=> 0 (highest) 
+// <1=> 1 
+// <2=> 2 
+// <3=> 3 
+// <4=> 4 
+// <5=> 5 
+// <6=> 6 
+// <7=> 7 
+
+#ifndef USBD_CONFIG_IRQ_PRIORITY
+#define USBD_CONFIG_IRQ_PRIORITY 6
+#endif
+
+// <o> USBD_CONFIG_DMASCHEDULER_MODE  - USBD SMA scheduler working scheme
+ 
+// <0=> Prioritized access 
+// <1=> Round Robin 
+
+#ifndef USBD_CONFIG_DMASCHEDULER_MODE
+#define USBD_CONFIG_DMASCHEDULER_MODE 0
+#endif
+
+// <q> USBD_CONFIG_DMASCHEDULER_ISO_BOOST  - Give priority to isochronous transfers
+ 
+
+// <i> This option gives priority to isochronous transfers.
+// <i> Enabling it assures that isochronous transfers are always processed,
+// <i> even if multiple other transfers are pending.
+// <i> Isochronous endpoints are prioritized before the usbd_dma_scheduler_algorithm
+// <i> function is called, so the option is independent of the algorithm chosen.
+
+#ifndef USBD_CONFIG_DMASCHEDULER_ISO_BOOST
+#define USBD_CONFIG_DMASCHEDULER_ISO_BOOST 1
+#endif
+
+// <q> USBD_CONFIG_ISO_IN_ZLP  - Respond to an IN token on ISO IN endpoint with ZLP when no data is ready
+ 
+
+// <i> If set, ISO IN endpoint will respond to an IN token with ZLP when no data is ready to be sent.
+// <i> Else, there will be no response.
+// <i> NOTE: This option does not work on Engineering A chip.
+
+#ifndef USBD_CONFIG_ISO_IN_ZLP
+#define USBD_CONFIG_ISO_IN_ZLP 0
+#endif
+
+// </e>
+
+// <e> WDT_ENABLED - nrf_drv_wdt - WDT peripheral driver - legacy layer
+//==========================================================
+#ifndef WDT_ENABLED
+#define WDT_ENABLED 0
+#endif
+// <o> WDT_CONFIG_BEHAVIOUR  - WDT behavior in CPU SLEEP or HALT mode
+ 
+// <1=> Run in SLEEP, Pause in HALT 
+// <8=> Pause in SLEEP, Run in HALT 
+// <9=> Run in SLEEP and HALT 
+// <0=> Pause in SLEEP and HALT 
+
+#ifndef WDT_CONFIG_BEHAVIOUR
+#define WDT_CONFIG_BEHAVIOUR 1
+#endif
+
+// <o> WDT_CONFIG_RELOAD_VALUE - Reload value  <15-4294967295> 
+
+
+#ifndef WDT_CONFIG_RELOAD_VALUE
+#define WDT_CONFIG_RELOAD_VALUE 2000
+#endif
+
+// <o> WDT_CONFIG_IRQ_PRIORITY  - Interrupt priority
+ 
+
+// <i> Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
+// <0=> 0 (highest) 
+// <1=> 1 
+// <2=> 2 
+// <3=> 3 
+// <4=> 4 
+// <5=> 5 
+// <6=> 6 
+// <7=> 7 
+
+#ifndef WDT_CONFIG_IRQ_PRIORITY
+#define WDT_CONFIG_IRQ_PRIORITY 6
+#endif
+
+// </e>
+
+// <h> nrfx_qspi - QSPI peripheral driver
+
+//==========================================================
+// </h> 
+//==========================================================
+
+// <h> nrfx_usbd - USBD peripheral driver
+
+//==========================================================
+// </h> 
+//==========================================================
+
+// </h> 
+//==========================================================
+
+// <h> nRF_Drivers_External 
+
+//==========================================================
+// <q> NRF_TWI_SENSOR_ENABLED  - nrf_twi_sensor - nRF TWI Sensor module
+ 
+
+#ifndef NRF_TWI_SENSOR_ENABLED
+#define NRF_TWI_SENSOR_ENABLED 0
+#endif
+
+// </h> 
+//==========================================================
+
+// <h> nRF_Libraries 
+
+//==========================================================
+// <q> APP_FIFO_ENABLED  - app_fifo - Software FIFO implementation
+ 
+
+#ifndef APP_FIFO_ENABLED
+#define APP_FIFO_ENABLED 1
+#endif
+
+// <q> APP_GPIOTE_ENABLED  - app_gpiote - GPIOTE events dispatcher
+ 
+
+#ifndef APP_GPIOTE_ENABLED
+#define APP_GPIOTE_ENABLED 0
+#endif
+
+// <q> APP_PWM_ENABLED  - app_pwm - PWM functionality
+ 
+
+#ifndef APP_PWM_ENABLED
+#define APP_PWM_ENABLED 0
+#endif
+
+// <e> APP_SCHEDULER_ENABLED - app_scheduler - Events scheduler
+//==========================================================
+#ifndef APP_SCHEDULER_ENABLED
+#define APP_SCHEDULER_ENABLED 1
+#endif
+// <q> APP_SCHEDULER_WITH_PAUSE  - Enabling pause feature
+ 
+
+#ifndef APP_SCHEDULER_WITH_PAUSE
+#define APP_SCHEDULER_WITH_PAUSE 0
+#endif
+
+// <q> APP_SCHEDULER_WITH_PROFILER  - Enabling scheduler profiling
+ 
+
+#ifndef APP_SCHEDULER_WITH_PROFILER
+#define APP_SCHEDULER_WITH_PROFILER 0
+#endif
+
+// </e>
+
+// <e> APP_SDCARD_ENABLED - app_sdcard - SD/MMC card support using SPI
+//==========================================================
+#ifndef APP_SDCARD_ENABLED
+#define APP_SDCARD_ENABLED 0
+#endif
+// <o> APP_SDCARD_SPI_INSTANCE  - SPI instance used
+ 
+// <0=> 0 
+// <1=> 1 
+// <2=> 2 
+
+#ifndef APP_SDCARD_SPI_INSTANCE
+#define APP_SDCARD_SPI_INSTANCE 0
+#endif
+
+// <o> APP_SDCARD_FREQ_INIT  - SPI frequency
+ 
+// <33554432=> 125 kHz 
+// <67108864=> 250 kHz 
+// <134217728=> 500 kHz 
+// <268435456=> 1 MHz 
+// <536870912=> 2 MHz 
+// <1073741824=> 4 MHz 
+// <2147483648=> 8 MHz 
+
+#ifndef APP_SDCARD_FREQ_INIT
+#define APP_SDCARD_FREQ_INIT 67108864
+#endif
+
+// <o> APP_SDCARD_FREQ_DATA  - SPI frequency
+ 
+// <33554432=> 125 kHz 
+// <67108864=> 250 kHz 
+// <134217728=> 500 kHz 
+// <268435456=> 1 MHz 
+// <536870912=> 2 MHz 
+// <1073741824=> 4 MHz 
+// <2147483648=> 8 MHz 
+
+#ifndef APP_SDCARD_FREQ_DATA
+#define APP_SDCARD_FREQ_DATA 1073741824
+#endif
+
+// </e>
+
+// <e> APP_TIMER_ENABLED - app_timer - Application timer functionality
+//==========================================================
+#ifndef APP_TIMER_ENABLED
+#define APP_TIMER_ENABLED 1
+#endif
+// <o> APP_TIMER_CONFIG_RTC_FREQUENCY  - Configure RTC prescaler.
+ 
+// <0=> 32768 Hz 
+// <1=> 16384 Hz 
+// <3=> 8192 Hz 
+// <7=> 4096 Hz 
+// <15=> 2048 Hz 
+// <31=> 1024 Hz 
+
+#ifndef APP_TIMER_CONFIG_RTC_FREQUENCY
+#define APP_TIMER_CONFIG_RTC_FREQUENCY 1
+#endif
+
+// <o> APP_TIMER_CONFIG_IRQ_PRIORITY  - Interrupt priority
+ 
+
+// <i> Priorities 0,2 (nRF51) and 0,1,4,5 (nRF52) are reserved for SoftDevice
+// <0=> 0 (highest) 
+// <1=> 1 
+// <2=> 2 
+// <3=> 3 
+// <4=> 4 
+// <5=> 5 
+// <6=> 6 
+// <7=> 7 
+
+#ifndef APP_TIMER_CONFIG_IRQ_PRIORITY
+#define APP_TIMER_CONFIG_IRQ_PRIORITY 6
+#endif
+
+// <o> APP_TIMER_CONFIG_OP_QUEUE_SIZE - Capacity of timer requests queue. 
+// <i> Size of the queue depends on how many timers are used
+// <i> in the system, how often timers are started and overall
+// <i> system latency. If queue size is too small app_timer calls
+// <i> will fail.
+
+#ifndef APP_TIMER_CONFIG_OP_QUEUE_SIZE
+#define APP_TIMER_CONFIG_OP_QUEUE_SIZE 10
+#endif
+
+// <q> APP_TIMER_CONFIG_USE_SCHEDULER  - Enable scheduling app_timer events to app_scheduler
+ 
+
+#ifndef APP_TIMER_CONFIG_USE_SCHEDULER
+#define APP_TIMER_CONFIG_USE_SCHEDULER 0
+#endif
+
+// <q> APP_TIMER_KEEPS_RTC_ACTIVE  - Enable RTC always on
+ 
+
+// <i> If option is enabled RTC is kept running even if there is no active timers.
+// <i> This option can be used when app_timer is used for timestamping.
+
+#ifndef APP_TIMER_KEEPS_RTC_ACTIVE
+#define APP_TIMER_KEEPS_RTC_ACTIVE 0
+#endif
+
+// <o> APP_TIMER_SAFE_WINDOW_MS - Maximum possible latency (in milliseconds) of handling app_timer event. 
+// <i> Maximum possible timeout that can be set is reduced by safe window.
+// <i> Example: RTC frequency 16384 Hz, maximum possible timeout 1024 seconds - APP_TIMER_SAFE_WINDOW_MS.
+// <i> Since RTC is not stopped when processor is halted in debugging session, this value
+// <i> must cover it if debugging is needed. It is possible to halt processor for APP_TIMER_SAFE_WINDOW_MS
+// <i> without corrupting app_timer behavior.
+
+#ifndef APP_TIMER_SAFE_WINDOW_MS
+#define APP_TIMER_SAFE_WINDOW_MS 300000
+#endif
+
+// <h> App Timer Legacy configuration - Legacy configuration.
+
+//==========================================================
+// <q> APP_TIMER_WITH_PROFILER  - Enable app_timer profiling
+ 
+
+#ifndef APP_TIMER_WITH_PROFILER
+#define APP_TIMER_WITH_PROFILER 0
+#endif
+
+// <q> APP_TIMER_CONFIG_SWI_NUMBER  - Configure SWI instance used.
+ 
+
+#ifndef APP_TIMER_CONFIG_SWI_NUMBER
+#define APP_TIMER_CONFIG_SWI_NUMBER 0
+#endif
+
+// </h> 
+//==========================================================
+
+// </e>
+
+// <e> APP_UART_ENABLED - app_uart - UART driver
+//==========================================================
+#ifndef APP_UART_ENABLED
+#define APP_UART_ENABLED 1
+#endif
+// <o> APP_UART_DRIVER_INSTANCE  - UART instance used
+ 
+// <0=> 0 
+
+#ifndef APP_UART_DRIVER_INSTANCE
+#define APP_UART_DRIVER_INSTANCE 0
+#endif
+
+// </e>
+
+// <q> APP_USBD_AUDIO_ENABLED  - app_usbd_audio - USB AUDIO class
+ 
+
+#ifndef APP_USBD_AUDIO_ENABLED
+#define APP_USBD_AUDIO_ENABLED 0
+#endif
+
+// <e> APP_USBD_ENABLED - app_usbd - USB Device library
+//==========================================================
+#ifndef APP_USBD_ENABLED
+#define APP_USBD_ENABLED 0
+#endif
+// <o> APP_USBD_VID - Vendor ID.  <0x0000-0xFFFF> 
+
+
+// <i> Note: This value is not editable in Configuration Wizard.
+// <i> Vendor ID ordered from USB IF: http://www.usb.org/developers/vendor/
+
+#ifndef APP_USBD_VID
+#define APP_USBD_VID 0
+#endif
+
+// <o> APP_USBD_PID - Product ID.  <0x0000-0xFFFF> 
+
+
+// <i> Note: This value is not editable in Configuration Wizard.
+// <i> Selected Product ID
+
+#ifndef APP_USBD_PID
+#define APP_USBD_PID 0
+#endif
+
+// <o> APP_USBD_DEVICE_VER_MAJOR - Major device version  <0-99> 
+
+
+// <i> Major device version, will be converted automatically to BCD notation. Use just decimal values.
+
+#ifndef APP_USBD_DEVICE_VER_MAJOR
+#define APP_USBD_DEVICE_VER_MAJOR 1
+#endif
+
+// <o> APP_USBD_DEVICE_VER_MINOR - Minor device version  <0-9> 
+
+
+// <i> Minor device version, will be converted automatically to BCD notation. Use just decimal values.
+
+#ifndef APP_USBD_DEVICE_VER_MINOR
+#define APP_USBD_DEVICE_VER_MINOR 0
+#endif
+
+// <o> APP_USBD_DEVICE_VER_SUB - Sub-minor device version  <0-9> 
+
+
+// <i> Sub-minor device version, will be converted automatically to BCD notation. Use just decimal values.
+
+#ifndef APP_USBD_DEVICE_VER_SUB
+#define APP_USBD_DEVICE_VER_SUB 0
+#endif
+
+// <q> APP_USBD_CONFIG_SELF_POWERED  - Self-powered device, as opposed to bus-powered.
+ 
+
+#ifndef APP_USBD_CONFIG_SELF_POWERED
+#define APP_USBD_CONFIG_SELF_POWERED 1
+#endif
+
+// <o> APP_USBD_CONFIG_MAX_POWER - MaxPower field in configuration descriptor in milliamps.  <0-500> 
+
+
+#ifndef APP_USBD_CONFIG_MAX_POWER
+#define APP_USBD_CONFIG_MAX_POWER 100
+#endif
+
+// <q> APP_USBD_CONFIG_POWER_EVENTS_PROCESS  - Process power events.
+ 
+
+// <i> Enable processing power events in USB event handler.
+
+#ifndef APP_USBD_CONFIG_POWER_EVENTS_PROCESS
+#define APP_USBD_CONFIG_POWER_EVENTS_PROCESS 1
+#endif
+
+// <e> APP_USBD_CONFIG_EVENT_QUEUE_ENABLE - Enable event queue.
+
+// <i> This is the default configuration when all the events are placed into internal queue.
+// <i> Disable it when an external queue is used like app_scheduler or if you wish to process all events inside interrupts.
+// <i> Processing all events from the interrupt level adds requirement not to call any functions that modifies the USBD library state from the context higher than USB interrupt context.
+// <i> Functions that modify USBD state are functions for sleep, wakeup, start, stop, enable, and disable.
+//==========================================================
+#ifndef APP_USBD_CONFIG_EVENT_QUEUE_ENABLE
+#define APP_USBD_CONFIG_EVENT_QUEUE_ENABLE 1
+#endif
+// <o> APP_USBD_CONFIG_EVENT_QUEUE_SIZE - The size of the event queue.  <16-64> 
+
+
+// <i> The size of the queue for the events that would be processed in the main loop.
+
+#ifndef APP_USBD_CONFIG_EVENT_QUEUE_SIZE
+#define APP_USBD_CONFIG_EVENT_QUEUE_SIZE 32
+#endif
+
+// <o> APP_USBD_CONFIG_SOF_HANDLING_MODE  - Change SOF events handling mode.
+ 
+
+// <i> Normal queue   - SOF events are pushed normally into the event queue.
+// <i> Compress queue - SOF events are counted and binded with other events or executed when the queue is empty.
+// <i>                  This prevents the queue from filling up with SOF events.
+// <i> Interrupt      - SOF events are processed in interrupt.
+// <0=> Normal queue 
+// <1=> Compress queue 
+// <2=> Interrupt 
+
+#ifndef APP_USBD_CONFIG_SOF_HANDLING_MODE
+#define APP_USBD_CONFIG_SOF_HANDLING_MODE 1
+#endif
+
+// </e>
+
+// <q> APP_USBD_CONFIG_SOF_TIMESTAMP_PROVIDE  - Provide a function that generates timestamps for logs based on the current SOF.
+ 
+
+// <i> The function app_usbd_sof_timestamp_get is implemented if the logger is enabled. 
+// <i> Use it when initializing the logger. 
+// <i> SOF processing is always enabled when this configuration parameter is active. 
+// <i> Note: This option is configured outside of APP_USBD_CONFIG_LOG_ENABLED. 
+// <i> This means that it works even if the logging in this very module is disabled. 
+
+#ifndef APP_USBD_CONFIG_SOF_TIMESTAMP_PROVIDE
+#define APP_USBD_CONFIG_SOF_TIMESTAMP_PROVIDE 0
+#endif
+
+// <o> APP_USBD_CONFIG_DESC_STRING_SIZE - Maximum size of the NULL-terminated string of the string descriptor.  <31-254> 
+
+
+// <i> 31 characters can be stored in the internal USB buffer used for transfers.
+// <i> Any value higher than 31 creates an additional buffer just for descriptor strings.
+
+#ifndef APP_USBD_CONFIG_DESC_STRING_SIZE
+#define APP_USBD_CONFIG_DESC_STRING_SIZE 31
+#endif
+
+// <q> APP_USBD_CONFIG_DESC_STRING_UTF_ENABLED  - Enable UTF8 conversion.
+ 
+
+// <i> Enable UTF8-encoded characters. In normal processing, only ASCII characters are available.
+
+#ifndef APP_USBD_CONFIG_DESC_STRING_UTF_ENABLED
+#define APP_USBD_CONFIG_DESC_STRING_UTF_ENABLED 0
+#endif
+
+// <s> APP_USBD_STRINGS_LANGIDS - Supported languages identifiers.
+
+// <i> Note: This value is not editable in Configuration Wizard.
+// <i> Comma-separated list of supported languages.
+#ifndef APP_USBD_STRINGS_LANGIDS
+#define APP_USBD_STRINGS_LANGIDS APP_USBD_LANG_AND_SUBLANG(APP_USBD_LANG_ENGLISH, APP_USBD_SUBLANG_ENGLISH_US)
+#endif
+
+// <e> APP_USBD_STRING_ID_MANUFACTURER - Define manufacturer string ID.
+
+// <i> Setting ID to 0 disables the string.
+//==========================================================
+#ifndef APP_USBD_STRING_ID_MANUFACTURER
+#define APP_USBD_STRING_ID_MANUFACTURER 1
+#endif
+// <q> APP_USBD_STRINGS_MANUFACTURER_EXTERN  - Define whether @ref APP_USBD_STRINGS_MANUFACTURER is created by macro or declared as a global variable.
+ 
+
+#ifndef APP_USBD_STRINGS_MANUFACTURER_EXTERN
+#define APP_USBD_STRINGS_MANUFACTURER_EXTERN 0
+#endif
+
+// <s> APP_USBD_STRINGS_MANUFACTURER - String descriptor for the manufacturer name.
+
+// <i> Note: This value is not editable in Configuration Wizard.
+// <i> Comma-separated list of manufacturer names for each defined language.
+// <i> Use @ref APP_USBD_STRING_DESC macro to create string descriptor from a NULL-terminated string.
+// <i> Use @ref APP_USBD_STRING_RAW8_DESC macro to create string descriptor from comma-separated uint8_t values.
+// <i> Use @ref APP_USBD_STRING_RAW16_DESC macro to create string descriptor from comma-separated uint16_t values.
+// <i> Alternatively, configure the macro to point to any internal variable pointer that already contains the descriptor.
+// <i> Setting string to NULL disables that string.
+// <i> The order of manufacturer names must be the same like in @ref APP_USBD_STRINGS_LANGIDS.
+#ifndef APP_USBD_STRINGS_MANUFACTURER
+#define APP_USBD_STRINGS_MANUFACTURER APP_USBD_STRING_DESC("Nordic Semiconductor")
+#endif
+
+// </e>
+
+// <e> APP_USBD_STRING_ID_PRODUCT - Define product string ID.
+
+// <i> Setting ID to 0 disables the string.
+//==========================================================
+#ifndef APP_USBD_STRING_ID_PRODUCT
+#define APP_USBD_STRING_ID_PRODUCT 2
+#endif
+// <q> APP_USBD_STRINGS_PRODUCT_EXTERN  - Define whether @ref APP_USBD_STRINGS_PRODUCT is created by macro or declared as a global variable.
+ 
+
+#ifndef APP_USBD_STRINGS_PRODUCT_EXTERN
+#define APP_USBD_STRINGS_PRODUCT_EXTERN 0
+#endif
+
+// <s> APP_USBD_STRINGS_PRODUCT - String descriptor for the product name.
+
+// <i> Note: This value is not editable in Configuration Wizard.
+// <i> List of product names that is defined the same way like in @ref APP_USBD_STRINGS_MANUFACTURER.
+#ifndef APP_USBD_STRINGS_PRODUCT
+#define APP_USBD_STRINGS_PRODUCT APP_USBD_STRING_DESC("nRF52 USB Product")
+#endif
+
+// </e>
+
+// <e> APP_USBD_STRING_ID_SERIAL - Define serial number string ID.
+
+// <i> Setting ID to 0 disables the string.
+//==========================================================
+#ifndef APP_USBD_STRING_ID_SERIAL
+#define APP_USBD_STRING_ID_SERIAL 3
+#endif
+// <q> APP_USBD_STRING_SERIAL_EXTERN  - Define whether @ref APP_USBD_STRING_SERIAL is created by macro or declared as a global variable.
+ 
+
+#ifndef APP_USBD_STRING_SERIAL_EXTERN
+#define APP_USBD_STRING_SERIAL_EXTERN 0
+#endif
+
+// <s> APP_USBD_STRING_SERIAL - String descriptor for the serial number.
+
+// <i> Note: This value is not editable in Configuration Wizard.
+// <i> Serial number that is defined the same way like in @ref APP_USBD_STRINGS_MANUFACTURER.
+#ifndef APP_USBD_STRING_SERIAL
+#define APP_USBD_STRING_SERIAL APP_USBD_STRING_DESC("000000000000")
+#endif
+
+// </e>
+
+// <e> APP_USBD_STRING_ID_CONFIGURATION - Define configuration string ID.
+
+// <i> Setting ID to 0 disables the string.
+//==========================================================
+#ifndef APP_USBD_STRING_ID_CONFIGURATION
+#define APP_USBD_STRING_ID_CONFIGURATION 4
+#endif
+// <q> APP_USBD_STRING_CONFIGURATION_EXTERN  - Define whether @ref APP_USBD_STRINGS_CONFIGURATION is created by macro or declared as global variable.
+ 
+
+#ifndef APP_USBD_STRING_CONFIGURATION_EXTERN
+#define APP_USBD_STRING_CONFIGURATION_EXTERN 0
+#endif
+
+// <s> APP_USBD_STRINGS_CONFIGURATION - String descriptor for the device configuration.
+
+// <i> Note: This value is not editable in Configuration Wizard.
+// <i> Configuration string that is defined the same way like in @ref APP_USBD_STRINGS_MANUFACTURER.
+#ifndef APP_USBD_STRINGS_CONFIGURATION
+#define APP_USBD_STRINGS_CONFIGURATION APP_USBD_STRING_DESC("Default configuration")
+#endif
+
+// </e>
+
+// <s> APP_USBD_STRINGS_USER - Default values for user strings.
+
+// <i> Note: This value is not editable in Configuration Wizard.
+// <i> This value stores all application specific user strings with the default initialization.
+// <i> The setup is done by X-macros.
+// <i> Expected macro parameters:
+// <i> @code
+// <i> X(mnemonic, [=str_idx], ...)
+// <i> @endcode
+// <i> - @c mnemonic: Mnemonic of the string descriptor that would be added to
+// <i>                @ref app_usbd_string_desc_idx_t enumerator.
+// <i> - @c str_idx : String index value, can be set or left empty.
+// <i>                For example, WinUSB driver requires descriptor to be present on 0xEE index.
+// <i>                Then use X(USBD_STRING_WINUSB, =0xEE, (APP_USBD_STRING_DESC(...)))
+// <i> - @c ...     : List of string descriptors for each defined language.
+#ifndef APP_USBD_STRINGS_USER
+#define APP_USBD_STRINGS_USER X(APP_USER_1, , APP_USBD_STRING_DESC("User 1"))
+#endif
+
+// </e>
+
+// <e> APP_USBD_HID_ENABLED - app_usbd_hid - USB HID class
+//==========================================================
+#ifndef APP_USBD_HID_ENABLED
+#define APP_USBD_HID_ENABLED 0
+#endif
+// <o> APP_USBD_HID_DEFAULT_IDLE_RATE - Default idle rate for HID class.   <0-255> 
+
+
+// <i> 0 means indefinite duration, any other value is multiplied by 4 milliseconds. Refer to Chapter 7.2.4 of HID 1.11 Specification.
+
+#ifndef APP_USBD_HID_DEFAULT_IDLE_RATE
+#define APP_USBD_HID_DEFAULT_IDLE_RATE 0
+#endif
+
+// <o> APP_USBD_HID_REPORT_IDLE_TABLE_SIZE - Size of idle rate table.   <1-255> 
+
+
+// <i> Must be higher than the highest report ID used.
+
+#ifndef APP_USBD_HID_REPORT_IDLE_TABLE_SIZE
+#define APP_USBD_HID_REPORT_IDLE_TABLE_SIZE 4
+#endif
+
+// </e>
+
+// <q> APP_USBD_HID_GENERIC_ENABLED  - app_usbd_hid_generic - USB HID generic
+ 
+
+#ifndef APP_USBD_HID_GENERIC_ENABLED
+#define APP_USBD_HID_GENERIC_ENABLED 0
+#endif
+
+// <q> APP_USBD_HID_KBD_ENABLED  - app_usbd_hid_kbd - USB HID keyboard
+ 
+
+#ifndef APP_USBD_HID_KBD_ENABLED
+#define APP_USBD_HID_KBD_ENABLED 0
+#endif
+
+// <q> APP_USBD_HID_MOUSE_ENABLED  - app_usbd_hid_mouse - USB HID mouse
+ 
+
+#ifndef APP_USBD_HID_MOUSE_ENABLED
+#define APP_USBD_HID_MOUSE_ENABLED 0
+#endif
+
+// <q> APP_USBD_MSC_ENABLED  - app_usbd_msc - USB MSC class
+ 
+
+#ifndef APP_USBD_MSC_ENABLED
+#define APP_USBD_MSC_ENABLED 0
+#endif
+
+// <q> CRC16_ENABLED  - crc16 - CRC16 calculation routines
+ 
+
+#ifndef CRC16_ENABLED
+#define CRC16_ENABLED 0
+#endif
+
+// <q> CRC32_ENABLED  - crc32 - CRC32 calculation routines
+ 
+
+#ifndef CRC32_ENABLED
+#define CRC32_ENABLED 0
+#endif
+
+// <q> ECC_ENABLED  - ecc - Elliptic Curve Cryptography Library
+ 
+
+#ifndef ECC_ENABLED
+#define ECC_ENABLED 0
+#endif
+
+// <e> FDS_ENABLED - fds - Flash data storage module
+//==========================================================
+#ifndef FDS_ENABLED
+#define FDS_ENABLED 0
+#endif
+// <h> Pages - Virtual page settings
+
+// <i> Configure the number of virtual pages to use and their size.
+//==========================================================
+// <o> FDS_VIRTUAL_PAGES - Number of virtual flash pages to use. 
+// <i> One of the virtual pages is reserved by the system for garbage collection.
+// <i> Therefore, the minimum is two virtual pages: one page to store data and one page to be used by the system for garbage collection.
+// <i> The total amount of flash memory that is used by FDS amounts to @ref FDS_VIRTUAL_PAGES * @ref FDS_VIRTUAL_PAGE_SIZE * 4 bytes.
+
+#ifndef FDS_VIRTUAL_PAGES
+#define FDS_VIRTUAL_PAGES 3
+#endif
+
+// <o> FDS_VIRTUAL_PAGE_SIZE  - The size of a virtual flash page.
+ 
+
+// <i> Expressed in number of 4-byte words.
+// <i> By default, a virtual page is the same size as a physical page.
+// <i> The size of a virtual page must be a multiple of the size of a physical page.
+// <1024=> 1024 
+// <2048=> 2048 
+
+#ifndef FDS_VIRTUAL_PAGE_SIZE
+#define FDS_VIRTUAL_PAGE_SIZE 1024
+#endif
+
+// <o> FDS_VIRTUAL_PAGES_RESERVED - The number of virtual flash pages that are used by other modules. 
+// <i> FDS module stores its data in the last pages of the flash memory.
+// <i> By setting this value, you can move flash end address used by the FDS.
+// <i> As a result the reserved space can be used by other modules.
+
+#ifndef FDS_VIRTUAL_PAGES_RESERVED
+#define FDS_VIRTUAL_PAGES_RESERVED 0
+#endif
+
+// </h> 
+//==========================================================
+
+// <h> Backend - Backend configuration
+
+// <i> Configure which nrf_fstorage backend is used by FDS to write to flash.
+//==========================================================
+// <o> FDS_BACKEND  - FDS flash backend.
+ 
+
+// <i> NRF_FSTORAGE_SD uses the nrf_fstorage_sd backend implementation using the SoftDevice API. Use this if you have a SoftDevice present.
+// <i> NRF_FSTORAGE_NVMC uses the nrf_fstorage_nvmc implementation. Use this setting if you don't use the SoftDevice.
+// <1=> NRF_FSTORAGE_NVMC 
+// <2=> NRF_FSTORAGE_SD 
+
+#ifndef FDS_BACKEND
+#define FDS_BACKEND 2
+#endif
+
+// </h> 
+//==========================================================
+
+// <h> Queue - Queue settings
+
+//==========================================================
+// <o> FDS_OP_QUEUE_SIZE - Size of the internal queue. 
+// <i> Increase this value if you frequently get synchronous FDS_ERR_NO_SPACE_IN_QUEUES errors.
+
+#ifndef FDS_OP_QUEUE_SIZE
+#define FDS_OP_QUEUE_SIZE 4
+#endif
+
+// </h> 
+//==========================================================
+
+// <h> CRC - CRC functionality
+
+//==========================================================
+// <e> FDS_CRC_CHECK_ON_READ - Enable CRC checks.
+
+// <i> Save a record's CRC when it is written to flash and check it when the record is opened.
+// <i> Records with an incorrect CRC can still be 'seen' by the user using FDS functions, but they cannot be opened.
+// <i> Additionally, they will not be garbage collected until they are deleted.
+//==========================================================
+#ifndef FDS_CRC_CHECK_ON_READ
+#define FDS_CRC_CHECK_ON_READ 0
+#endif
+// <o> FDS_CRC_CHECK_ON_WRITE  - Perform a CRC check on newly written records.
+ 
+
+// <i> Perform a CRC check on newly written records.
+// <i> This setting can be used to make sure that the record data was not altered while being written to flash.
+// <1=> Enabled 
+// <0=> Disabled 
+
+#ifndef FDS_CRC_CHECK_ON_WRITE
+#define FDS_CRC_CHECK_ON_WRITE 0
+#endif
+
+// </e>
+
+// </h> 
+//==========================================================
+
+// <h> Users - Number of users
+
+//==========================================================
+// <o> FDS_MAX_USERS - Maximum number of callbacks that can be registered. 
+#ifndef FDS_MAX_USERS
+#define FDS_MAX_USERS 4
+#endif
+
+// </h> 
+//==========================================================
+
+// </e>
+
+// <q> HARDFAULT_HANDLER_ENABLED  - hardfault_default - HardFault default handler for debugging and release
+ 
+
+#ifndef HARDFAULT_HANDLER_ENABLED
+#define HARDFAULT_HANDLER_ENABLED 0
+#endif
+
+// <e> HCI_MEM_POOL_ENABLED - hci_mem_pool - memory pool implementation used by HCI
+//==========================================================
+#ifndef HCI_MEM_POOL_ENABLED
+#define HCI_MEM_POOL_ENABLED 0
+#endif
+// <o> HCI_TX_BUF_SIZE - TX buffer size in bytes. 
+#ifndef HCI_TX_BUF_SIZE
+#define HCI_TX_BUF_SIZE 600
+#endif
+
+// <o> HCI_RX_BUF_SIZE - RX buffer size in bytes. 
+#ifndef HCI_RX_BUF_SIZE
+#define HCI_RX_BUF_SIZE 600
+#endif
+
+// <o> HCI_RX_BUF_QUEUE_SIZE - RX buffer queue size. 
+#ifndef HCI_RX_BUF_QUEUE_SIZE
+#define HCI_RX_BUF_QUEUE_SIZE 4
+#endif
+
+// </e>
+
+// <e> HCI_SLIP_ENABLED - hci_slip - SLIP protocol implementation used by HCI
+//==========================================================
+#ifndef HCI_SLIP_ENABLED
+#define HCI_SLIP_ENABLED 0
+#endif
+// <o> HCI_UART_BAUDRATE  - Default Baudrate
+ 
+// <323584=> 1200 baud 
+// <643072=> 2400 baud 
+// <1290240=> 4800 baud 
+// <2576384=> 9600 baud 
+// <3862528=> 14400 baud 
+// <5152768=> 19200 baud 
+// <7716864=> 28800 baud 
+// <10289152=> 38400 baud 
+// <15400960=> 57600 baud 
+// <20615168=> 76800 baud 
+// <30801920=> 115200 baud 
+// <61865984=> 230400 baud 
+// <67108864=> 250000 baud 
+// <121634816=> 460800 baud 
+// <251658240=> 921600 baud 
+// <268435456=> 1000000 baud 
+
+#ifndef HCI_UART_BAUDRATE
+#define HCI_UART_BAUDRATE 30801920
+#endif
+
+// <o> HCI_UART_FLOW_CONTROL  - Hardware Flow Control
+ 
+// <0=> Disabled 
+// <1=> Enabled 
+
+#ifndef HCI_UART_FLOW_CONTROL
+#define HCI_UART_FLOW_CONTROL 0
+#endif
+
+// <o> HCI_UART_RX_PIN - UART RX pin 
+#ifndef HCI_UART_RX_PIN
+#define HCI_UART_RX_PIN 8
+#endif
+
+// <o> HCI_UART_TX_PIN - UART TX pin 
+#ifndef HCI_UART_TX_PIN
+#define HCI_UART_TX_PIN 6
+#endif
+
+// <o> HCI_UART_RTS_PIN - UART RTS pin 
+#ifndef HCI_UART_RTS_PIN
+#define HCI_UART_RTS_PIN 5
+#endif
+
+// <o> HCI_UART_CTS_PIN - UART CTS pin 
+#ifndef HCI_UART_CTS_PIN
+#define HCI_UART_CTS_PIN 7
+#endif
+
+// </e>
+
+// <e> HCI_TRANSPORT_ENABLED - hci_transport - HCI transport
+//==========================================================
+#ifndef HCI_TRANSPORT_ENABLED
+#define HCI_TRANSPORT_ENABLED 0
+#endif
+// <o> HCI_MAX_PACKET_SIZE_IN_BITS - Maximum size of a single application packet in bits. 
+#ifndef HCI_MAX_PACKET_SIZE_IN_BITS
+#define HCI_MAX_PACKET_SIZE_IN_BITS 8000
+#endif
+
+// </e>
+
+// <q> LED_SOFTBLINK_ENABLED  - led_softblink - led_softblink module
+ 
+
+#ifndef LED_SOFTBLINK_ENABLED
+#define LED_SOFTBLINK_ENABLED 0
+#endif
+
+// <q> LOW_POWER_PWM_ENABLED  - low_power_pwm - low_power_pwm module
+ 
+
+#ifndef LOW_POWER_PWM_ENABLED
+#define LOW_POWER_PWM_ENABLED 0
+#endif
+
+// <e> MEM_MANAGER_ENABLED - mem_manager - Dynamic memory allocator
+//==========================================================
+#ifndef MEM_MANAGER_ENABLED
+#define MEM_MANAGER_ENABLED 0
+#endif
+// <o> MEMORY_MANAGER_SMALL_BLOCK_COUNT - Size of each memory blocks identified as 'small' block.  <0-255> 
+
+
+#ifndef MEMORY_MANAGER_SMALL_BLOCK_COUNT
+#define MEMORY_MANAGER_SMALL_BLOCK_COUNT 1
+#endif
+
+// <o> MEMORY_MANAGER_SMALL_BLOCK_SIZE -  Size of each memory blocks identified as 'small' block. 
+// <i>  Size of each memory blocks identified as 'small' block. Memory block are recommended to be word-sized.
+
+#ifndef MEMORY_MANAGER_SMALL_BLOCK_SIZE
+#define MEMORY_MANAGER_SMALL_BLOCK_SIZE 32
+#endif
+
+// <o> MEMORY_MANAGER_MEDIUM_BLOCK_COUNT - Size of each memory blocks identified as 'medium' block.  <0-255> 
+
+
+#ifndef MEMORY_MANAGER_MEDIUM_BLOCK_COUNT
+#define MEMORY_MANAGER_MEDIUM_BLOCK_COUNT 0
+#endif
+
+// <o> MEMORY_MANAGER_MEDIUM_BLOCK_SIZE -  Size of each memory blocks identified as 'medium' block. 
+// <i>  Size of each memory blocks identified as 'medium' block. Memory block are recommended to be word-sized.
+
+#ifndef MEMORY_MANAGER_MEDIUM_BLOCK_SIZE
+#define MEMORY_MANAGER_MEDIUM_BLOCK_SIZE 256
+#endif
+
+// <o> MEMORY_MANAGER_LARGE_BLOCK_COUNT - Size of each memory blocks identified as 'large' block.  <0-255> 
+
+
+#ifndef MEMORY_MANAGER_LARGE_BLOCK_COUNT
+#define MEMORY_MANAGER_LARGE_BLOCK_COUNT 0
+#endif
+
+// <o> MEMORY_MANAGER_LARGE_BLOCK_SIZE -  Size of each memory blocks identified as 'large' block. 
+// <i>  Size of each memory blocks identified as 'large' block. Memory block are recommended to be word-sized.
+
+#ifndef MEMORY_MANAGER_LARGE_BLOCK_SIZE
+#define MEMORY_MANAGER_LARGE_BLOCK_SIZE 256
+#endif
+
+// <o> MEMORY_MANAGER_XLARGE_BLOCK_COUNT - Size of each memory blocks identified as 'extra large' block.  <0-255> 
+
+
+#ifndef MEMORY_MANAGER_XLARGE_BLOCK_COUNT
+#define MEMORY_MANAGER_XLARGE_BLOCK_COUNT 0
+#endif
+
+// <o> MEMORY_MANAGER_XLARGE_BLOCK_SIZE -  Size of each memory blocks identified as 'extra large' block. 
+// <i>  Size of each memory blocks identified as 'extra large' block. Memory block are recommended to be word-sized.
+
+#ifndef MEMORY_MANAGER_XLARGE_BLOCK_SIZE
+#define MEMORY_MANAGER_XLARGE_BLOCK_SIZE 1320
+#endif
+
+// <o> MEMORY_MANAGER_XXLARGE_BLOCK_COUNT - Size of each memory blocks identified as 'extra extra large' block.  <0-255> 
+
+
+#ifndef MEMORY_MANAGER_XXLARGE_BLOCK_COUNT
+#define MEMORY_MANAGER_XXLARGE_BLOCK_COUNT 0
+#endif
+
+// <o> MEMORY_MANAGER_XXLARGE_BLOCK_SIZE -  Size of each memory blocks identified as 'extra extra large' block. 
+// <i>  Size of each memory blocks identified as 'extra extra large' block. Memory block are recommended to be word-sized.
+
+#ifndef MEMORY_MANAGER_XXLARGE_BLOCK_SIZE
+#define MEMORY_MANAGER_XXLARGE_BLOCK_SIZE 3444
+#endif
+
+// <o> MEMORY_MANAGER_XSMALL_BLOCK_COUNT - Size of each memory blocks identified as 'extra small' block.  <0-255> 
+
+
+#ifndef MEMORY_MANAGER_XSMALL_BLOCK_COUNT
+#define MEMORY_MANAGER_XSMALL_BLOCK_COUNT 0
+#endif
+
+// <o> MEMORY_MANAGER_XSMALL_BLOCK_SIZE -  Size of each memory blocks identified as 'extra small' block. 
+// <i>  Size of each memory blocks identified as 'extra large' block. Memory block are recommended to be word-sized.
+
+#ifndef MEMORY_MANAGER_XSMALL_BLOCK_SIZE
+#define MEMORY_MANAGER_XSMALL_BLOCK_SIZE 64
+#endif
+
+// <o> MEMORY_MANAGER_XXSMALL_BLOCK_COUNT - Size of each memory blocks identified as 'extra extra small' block.  <0-255> 
+
+
+#ifndef MEMORY_MANAGER_XXSMALL_BLOCK_COUNT
+#define MEMORY_MANAGER_XXSMALL_BLOCK_COUNT 0
+#endif
+
+// <o> MEMORY_MANAGER_XXSMALL_BLOCK_SIZE -  Size of each memory blocks identified as 'extra extra small' block. 
+// <i>  Size of each memory blocks identified as 'extra extra small' block. Memory block are recommended to be word-sized.
+
+#ifndef MEMORY_MANAGER_XXSMALL_BLOCK_SIZE
+#define MEMORY_MANAGER_XXSMALL_BLOCK_SIZE 32
+#endif
+
+// <e> MEM_MANAGER_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef MEM_MANAGER_CONFIG_LOG_ENABLED
+#define MEM_MANAGER_CONFIG_LOG_ENABLED 0
+#endif
+// <o> MEM_MANAGER_CONFIG_LOG_LEVEL  - Default Severity level
+ 
+// <0=> Off 
+// <1=> Error 
+// <2=> Warning 
+// <3=> Info 
+// <4=> Debug 
+
+#ifndef MEM_MANAGER_CONFIG_LOG_LEVEL
+#define MEM_MANAGER_CONFIG_LOG_LEVEL 3
+#endif
+
+// <o> MEM_MANAGER_CONFIG_INFO_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef MEM_MANAGER_CONFIG_INFO_COLOR
+#define MEM_MANAGER_CONFIG_INFO_COLOR 0
+#endif
+
+// <o> MEM_MANAGER_CONFIG_DEBUG_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef MEM_MANAGER_CONFIG_DEBUG_COLOR
+#define MEM_MANAGER_CONFIG_DEBUG_COLOR 0
+#endif
+
+// </e>
+
+// <q> MEM_MANAGER_DISABLE_API_PARAM_CHECK  - Disable API parameter checks in the module.
+ 
+
+#ifndef MEM_MANAGER_DISABLE_API_PARAM_CHECK
+#define MEM_MANAGER_DISABLE_API_PARAM_CHECK 0
+#endif
+
+// </e>
+
+// <e> NRF_BALLOC_ENABLED - nrf_balloc - Block allocator module
+//==========================================================
+#ifndef NRF_BALLOC_ENABLED
+#define NRF_BALLOC_ENABLED 1
+#endif
+// <e> NRF_BALLOC_CONFIG_DEBUG_ENABLED - Enables debug mode in the module.
+//==========================================================
+#ifndef NRF_BALLOC_CONFIG_DEBUG_ENABLED
+#define NRF_BALLOC_CONFIG_DEBUG_ENABLED 0
+#endif
+// <o> NRF_BALLOC_CONFIG_HEAD_GUARD_WORDS - Number of words used as head guard.  <0-255> 
+
+
+#ifndef NRF_BALLOC_CONFIG_HEAD_GUARD_WORDS
+#define NRF_BALLOC_CONFIG_HEAD_GUARD_WORDS 1
+#endif
+
+// <o> NRF_BALLOC_CONFIG_TAIL_GUARD_WORDS - Number of words used as tail guard.  <0-255> 
+
+
+#ifndef NRF_BALLOC_CONFIG_TAIL_GUARD_WORDS
+#define NRF_BALLOC_CONFIG_TAIL_GUARD_WORDS 1
+#endif
+
+// <q> NRF_BALLOC_CONFIG_BASIC_CHECKS_ENABLED  - Enables basic checks in this module.
+ 
+
+#ifndef NRF_BALLOC_CONFIG_BASIC_CHECKS_ENABLED
+#define NRF_BALLOC_CONFIG_BASIC_CHECKS_ENABLED 0
+#endif
+
+// <q> NRF_BALLOC_CONFIG_DOUBLE_FREE_CHECK_ENABLED  - Enables double memory free check in this module.
+ 
+
+#ifndef NRF_BALLOC_CONFIG_DOUBLE_FREE_CHECK_ENABLED
+#define NRF_BALLOC_CONFIG_DOUBLE_FREE_CHECK_ENABLED 0
+#endif
+
+// <q> NRF_BALLOC_CONFIG_DATA_TRASHING_CHECK_ENABLED  - Enables free memory corruption check in this module.
+ 
+
+#ifndef NRF_BALLOC_CONFIG_DATA_TRASHING_CHECK_ENABLED
+#define NRF_BALLOC_CONFIG_DATA_TRASHING_CHECK_ENABLED 0
+#endif
+
+// <q> NRF_BALLOC_CLI_CMDS  - Enable CLI commands specific to the module
+ 
+
+#ifndef NRF_BALLOC_CLI_CMDS
+#define NRF_BALLOC_CLI_CMDS 0
+#endif
+
+// </e>
+
+// </e>
+
+// <e> NRF_CSENSE_ENABLED - nrf_csense - Capacitive sensor module
+//==========================================================
+#ifndef NRF_CSENSE_ENABLED
+#define NRF_CSENSE_ENABLED 0
+#endif
+// <o> NRF_CSENSE_PAD_HYSTERESIS - Minimum value of change required to determine that a pad was touched. 
+#ifndef NRF_CSENSE_PAD_HYSTERESIS
+#define NRF_CSENSE_PAD_HYSTERESIS 15
+#endif
+
+// <o> NRF_CSENSE_PAD_DEVIATION - Minimum value measured on a pad required to take it into account while calculating the step. 
+#ifndef NRF_CSENSE_PAD_DEVIATION
+#define NRF_CSENSE_PAD_DEVIATION 70
+#endif
+
+// <o> NRF_CSENSE_MIN_PAD_VALUE - Minimum normalized value on a pad required to take its value into account. 
+#ifndef NRF_CSENSE_MIN_PAD_VALUE
+#define NRF_CSENSE_MIN_PAD_VALUE 20
+#endif
+
+// <o> NRF_CSENSE_MAX_PADS_NUMBER - Maximum number of pads used for one instance. 
+#ifndef NRF_CSENSE_MAX_PADS_NUMBER
+#define NRF_CSENSE_MAX_PADS_NUMBER 20
+#endif
+
+// <o> NRF_CSENSE_MAX_VALUE - Maximum normalized value obtained from measurement. 
+#ifndef NRF_CSENSE_MAX_VALUE
+#define NRF_CSENSE_MAX_VALUE 1000
+#endif
+
+// <o> NRF_CSENSE_OUTPUT_PIN - Output pin used by the low-level module. 
+// <i> This is used when capacitive sensor does not use COMP.
+
+#ifndef NRF_CSENSE_OUTPUT_PIN
+#define NRF_CSENSE_OUTPUT_PIN 26
+#endif
+
+// </e>
+
+// <e> NRF_DRV_CSENSE_ENABLED - nrf_drv_csense - Capacitive sensor low-level module
+//==========================================================
+#ifndef NRF_DRV_CSENSE_ENABLED
+#define NRF_DRV_CSENSE_ENABLED 0
+#endif
+// <e> USE_COMP - Use the comparator to implement the capacitive sensor driver.
+
+// <i> Due to Anomaly 84, COMP I_SOURCE is not functional. It has too high a varation.
+//==========================================================
+#ifndef USE_COMP
+#define USE_COMP 0
+#endif
+// <o> TIMER0_FOR_CSENSE - First TIMER instance used by the driver (not used on nRF51). 
+#ifndef TIMER0_FOR_CSENSE
+#define TIMER0_FOR_CSENSE 1
+#endif
+
+// <o> TIMER1_FOR_CSENSE - Second TIMER instance used by the driver (not used on nRF51). 
+#ifndef TIMER1_FOR_CSENSE
+#define TIMER1_FOR_CSENSE 2
+#endif
+
+// <o> MEASUREMENT_PERIOD - Single measurement period. 
+// <i> Time of a single measurement can be calculated as
+// <i> T = (1/2)*MEASUREMENT_PERIOD*(1/f_OSC) where f_OSC = I_SOURCE / (2C*(VUP-VDOWN) ).
+// <i> I_SOURCE, VUP, and VDOWN are values used to initialize COMP and C is the capacitance of the used pad.
+
+#ifndef MEASUREMENT_PERIOD
+#define MEASUREMENT_PERIOD 20
+#endif
+
+// </e>
+
+// </e>
+
+// <e> NRF_FSTORAGE_ENABLED - nrf_fstorage - Flash abstraction library
+//==========================================================
+#ifndef NRF_FSTORAGE_ENABLED
+#define NRF_FSTORAGE_ENABLED 0
+#endif
+// <h> nrf_fstorage - Common settings
+
+// <i> Common settings to all fstorage implementations
+//==========================================================
+// <q> NRF_FSTORAGE_PARAM_CHECK_DISABLED  - Disable user input validation
+ 
+
+// <i> If selected, use ASSERT to validate user input.
+// <i> This effectively removes user input validation in production code.
+// <i> Recommended setting: OFF, only enable this setting if size is a major concern.
+
+#ifndef NRF_FSTORAGE_PARAM_CHECK_DISABLED
+#define NRF_FSTORAGE_PARAM_CHECK_DISABLED 0
+#endif
+
+// </h> 
+//==========================================================
+
+// <h> nrf_fstorage_sd - Implementation using the SoftDevice
+
+// <i> Configuration options for the fstorage implementation using the SoftDevice
+//==========================================================
+// <o> NRF_FSTORAGE_SD_QUEUE_SIZE - Size of the internal queue of operations 
+// <i> Increase this value if API calls frequently return the error @ref NRF_ERROR_NO_MEM.
+
+#ifndef NRF_FSTORAGE_SD_QUEUE_SIZE
+#define NRF_FSTORAGE_SD_QUEUE_SIZE 4
+#endif
+
+// <o> NRF_FSTORAGE_SD_MAX_RETRIES - Maximum number of attempts at executing an operation when the SoftDevice is busy 
+// <i> Increase this value if events frequently return the @ref NRF_ERROR_TIMEOUT error.
+// <i> The SoftDevice might fail to schedule flash access due to high BLE activity.
+
+#ifndef NRF_FSTORAGE_SD_MAX_RETRIES
+#define NRF_FSTORAGE_SD_MAX_RETRIES 8
+#endif
+
+// <o> NRF_FSTORAGE_SD_MAX_WRITE_SIZE - Maximum number of bytes to be written to flash in a single operation 
+// <i> This value must be a multiple of four.
+// <i> Lowering this value can increase the chances of the SoftDevice being able to execute flash operations in between radio activity.
+// <i> This value is bound by the maximum number of bytes that can be written to flash in a single call to @ref sd_flash_write.
+// <i> That is 1024 bytes for nRF51 ICs and 4096 bytes for nRF52 ICs.
+
+#ifndef NRF_FSTORAGE_SD_MAX_WRITE_SIZE
+#define NRF_FSTORAGE_SD_MAX_WRITE_SIZE 4096
+#endif
+
+// </h> 
+//==========================================================
+
+// </e>
+
+// <q> NRF_GFX_ENABLED  - nrf_gfx - GFX module
+ 
+
+#ifndef NRF_GFX_ENABLED
+#define NRF_GFX_ENABLED 0
+#endif
+
+// <q> NRF_MEMOBJ_ENABLED  - nrf_memobj - Linked memory allocator module
+ 
+
+#ifndef NRF_MEMOBJ_ENABLED
+#define NRF_MEMOBJ_ENABLED 1
+#endif
+
+// <e> NRF_PWR_MGMT_ENABLED - nrf_pwr_mgmt - Power management module
+//==========================================================
+#ifndef NRF_PWR_MGMT_ENABLED
+#define NRF_PWR_MGMT_ENABLED 1
+#endif
+// <e> NRF_PWR_MGMT_CONFIG_DEBUG_PIN_ENABLED - Enables pin debug in the module.
+
+// <i> Selected pin will be set when CPU is in sleep mode.
+//==========================================================
+#ifndef NRF_PWR_MGMT_CONFIG_DEBUG_PIN_ENABLED
+#define NRF_PWR_MGMT_CONFIG_DEBUG_PIN_ENABLED 0
+#endif
+// <o> NRF_PWR_MGMT_SLEEP_DEBUG_PIN  - Pin number
+ 
+// <0=> 0 (P0.0) 
+// <1=> 1 (P0.1) 
+// <2=> 2 (P0.2) 
+// <3=> 3 (P0.3) 
+// <4=> 4 (P0.4) 
+// <5=> 5 (P0.5) 
+// <6=> 6 (P0.6) 
+// <7=> 7 (P0.7) 
+// <8=> 8 (P0.8) 
+// <9=> 9 (P0.9) 
+// <10=> 10 (P0.10) 
+// <11=> 11 (P0.11) 
+// <12=> 12 (P0.12) 
+// <13=> 13 (P0.13) 
+// <14=> 14 (P0.14) 
+// <15=> 15 (P0.15) 
+// <16=> 16 (P0.16) 
+// <17=> 17 (P0.17) 
+// <18=> 18 (P0.18) 
+// <19=> 19 (P0.19) 
+// <20=> 20 (P0.20) 
+// <21=> 21 (P0.21) 
+// <22=> 22 (P0.22) 
+// <23=> 23 (P0.23) 
+// <24=> 24 (P0.24) 
+// <25=> 25 (P0.25) 
+// <26=> 26 (P0.26) 
+// <27=> 27 (P0.27) 
+// <28=> 28 (P0.28) 
+// <29=> 29 (P0.29) 
+// <30=> 30 (P0.30) 
+// <31=> 31 (P0.31) 
+// <4294967295=> Not connected 
+
+#ifndef NRF_PWR_MGMT_SLEEP_DEBUG_PIN
+#define NRF_PWR_MGMT_SLEEP_DEBUG_PIN 31
+#endif
+
+// </e>
+
+// <q> NRF_PWR_MGMT_CONFIG_CPU_USAGE_MONITOR_ENABLED  - Enables CPU usage monitor.
+ 
+
+// <i> Module will trace percentage of CPU usage in one second intervals.
+
+#ifndef NRF_PWR_MGMT_CONFIG_CPU_USAGE_MONITOR_ENABLED
+#define NRF_PWR_MGMT_CONFIG_CPU_USAGE_MONITOR_ENABLED 0
+#endif
+
+// <e> NRF_PWR_MGMT_CONFIG_STANDBY_TIMEOUT_ENABLED - Enable standby timeout.
+//==========================================================
+#ifndef NRF_PWR_MGMT_CONFIG_STANDBY_TIMEOUT_ENABLED
+#define NRF_PWR_MGMT_CONFIG_STANDBY_TIMEOUT_ENABLED 0
+#endif
+// <o> NRF_PWR_MGMT_CONFIG_STANDBY_TIMEOUT_S - Standby timeout (in seconds). 
+// <i> Shutdown procedure will begin no earlier than after this number of seconds.
+
+#ifndef NRF_PWR_MGMT_CONFIG_STANDBY_TIMEOUT_S
+#define NRF_PWR_MGMT_CONFIG_STANDBY_TIMEOUT_S 3
+#endif
+
+// </e>
+
+// <q> NRF_PWR_MGMT_CONFIG_FPU_SUPPORT_ENABLED  - Enables FPU event cleaning.
+ 
+
+#ifndef NRF_PWR_MGMT_CONFIG_FPU_SUPPORT_ENABLED
+#define NRF_PWR_MGMT_CONFIG_FPU_SUPPORT_ENABLED 1
+#endif
+
+// <q> NRF_PWR_MGMT_CONFIG_AUTO_SHUTDOWN_RETRY  - Blocked shutdown procedure will be retried every second.
+ 
+
+#ifndef NRF_PWR_MGMT_CONFIG_AUTO_SHUTDOWN_RETRY
+#define NRF_PWR_MGMT_CONFIG_AUTO_SHUTDOWN_RETRY 0
+#endif
+
+// <q> NRF_PWR_MGMT_CONFIG_USE_SCHEDULER  - Module will use @ref app_scheduler.
+ 
+
+#ifndef NRF_PWR_MGMT_CONFIG_USE_SCHEDULER
+#define NRF_PWR_MGMT_CONFIG_USE_SCHEDULER 0
+#endif
+
+// <o> NRF_PWR_MGMT_CONFIG_HANDLER_PRIORITY_COUNT - The number of priorities for module handlers. 
+// <i> The number of stages of the shutdown process.
+
+#ifndef NRF_PWR_MGMT_CONFIG_HANDLER_PRIORITY_COUNT
+#define NRF_PWR_MGMT_CONFIG_HANDLER_PRIORITY_COUNT 3
+#endif
+
+// </e>
+
+// <e> NRF_QUEUE_ENABLED - nrf_queue - Queue module
+//==========================================================
+#ifndef NRF_QUEUE_ENABLED
+#define NRF_QUEUE_ENABLED 0
+#endif
+// <q> NRF_QUEUE_CLI_CMDS  - Enable CLI commands specific to the module
+ 
+
+#ifndef NRF_QUEUE_CLI_CMDS
+#define NRF_QUEUE_CLI_CMDS 0
+#endif
+
+// </e>
+
+// <q> NRF_SECTION_ITER_ENABLED  - nrf_section_iter - Section iterator
+ 
+
+#ifndef NRF_SECTION_ITER_ENABLED
+#define NRF_SECTION_ITER_ENABLED 1
+#endif
+
+// <q> NRF_SORTLIST_ENABLED  - nrf_sortlist - Sorted list
+ 
+
+#ifndef NRF_SORTLIST_ENABLED
+#define NRF_SORTLIST_ENABLED 1
+#endif
+
+// <q> NRF_SPI_MNGR_ENABLED  - nrf_spi_mngr - SPI transaction manager
+ 
+
+#ifndef NRF_SPI_MNGR_ENABLED
+#define NRF_SPI_MNGR_ENABLED 0
+#endif
+
+// <q> NRF_STRERROR_ENABLED  - nrf_strerror - Library for converting error code to string.
+ 
+
+#ifndef NRF_STRERROR_ENABLED
+#define NRF_STRERROR_ENABLED 1
+#endif
+
+// <q> NRF_TWI_MNGR_ENABLED  - nrf_twi_mngr - TWI transaction manager
+ 
+
+#ifndef NRF_TWI_MNGR_ENABLED
+#define NRF_TWI_MNGR_ENABLED 0
+#endif
+
+// <q> RETARGET_ENABLED  - retarget - Retargeting stdio functions
+ 
+
+#ifndef RETARGET_ENABLED
+#define RETARGET_ENABLED 1
+#endif
+
+// <q> SLIP_ENABLED  - slip - SLIP encoding and decoding
+ 
+
+#ifndef SLIP_ENABLED
+#define SLIP_ENABLED 0
+#endif
+
+// <e> TASK_MANAGER_ENABLED - task_manager - Task manager.
+//==========================================================
+#ifndef TASK_MANAGER_ENABLED
+#define TASK_MANAGER_ENABLED 0
+#endif
+// <q> TASK_MANAGER_CLI_CMDS  - Enable CLI commands specific to the module
+ 
+
+#ifndef TASK_MANAGER_CLI_CMDS
+#define TASK_MANAGER_CLI_CMDS 0
+#endif
+
+// <o> TASK_MANAGER_CONFIG_MAX_TASKS - Maximum number of tasks which can be created 
+#ifndef TASK_MANAGER_CONFIG_MAX_TASKS
+#define TASK_MANAGER_CONFIG_MAX_TASKS 2
+#endif
+
+// <o> TASK_MANAGER_CONFIG_STACK_SIZE - Stack size for every task (power of 2) 
+#ifndef TASK_MANAGER_CONFIG_STACK_SIZE
+#define TASK_MANAGER_CONFIG_STACK_SIZE 1024
+#endif
+
+// <q> TASK_MANAGER_CONFIG_STACK_PROFILER_ENABLED  - Enable stack profiling.
+ 
+
+#ifndef TASK_MANAGER_CONFIG_STACK_PROFILER_ENABLED
+#define TASK_MANAGER_CONFIG_STACK_PROFILER_ENABLED 1
+#endif
+
+// <o> TASK_MANAGER_CONFIG_STACK_GUARD  - Configures stack guard.
+ 
+// <0=> Disabled 
+// <4=> 32 bytes 
+// <5=> 64 bytes 
+// <6=> 128 bytes 
+// <7=> 256 bytes 
+// <8=> 512 bytes 
+
+#ifndef TASK_MANAGER_CONFIG_STACK_GUARD
+#define TASK_MANAGER_CONFIG_STACK_GUARD 7
+#endif
+
+// </e>
+
+// <h> app_button - buttons handling module
+
+//==========================================================
+// <q> BUTTON_ENABLED  - Enables Button module
+ 
+
+#ifndef BUTTON_ENABLED
+#define BUTTON_ENABLED 1
+#endif
+
+// <q> BUTTON_HIGH_ACCURACY_ENABLED  - Enables GPIOTE high accuracy for buttons
+ 
+
+#ifndef BUTTON_HIGH_ACCURACY_ENABLED
+#define BUTTON_HIGH_ACCURACY_ENABLED 0
+#endif
+
+// </h> 
+//==========================================================
+
+// <h> app_usbd_cdc_acm - USB CDC ACM class
+
+//==========================================================
+// <q> APP_USBD_CDC_ACM_ENABLED  - Enabling USBD CDC ACM Class library
+ 
+
+#ifndef APP_USBD_CDC_ACM_ENABLED
+#define APP_USBD_CDC_ACM_ENABLED 0
+#endif
+
+// <q> APP_USBD_CDC_ACM_ZLP_ON_EPSIZE_WRITE  - Send ZLP on write with same size as endpoint
+ 
+
+// <i> If enabled, CDC ACM class will automatically send a zero length packet after transfer which has the same size as endpoint.
+// <i> This may limit throughput if a lot of binary data is sent, but in terminal mode operation it makes sure that the data is always displayed right after it is sent.
+
+#ifndef APP_USBD_CDC_ACM_ZLP_ON_EPSIZE_WRITE
+#define APP_USBD_CDC_ACM_ZLP_ON_EPSIZE_WRITE 1
+#endif
+
+// </h> 
+//==========================================================
+
+// <h> nrf_cli - Command line interface
+
+//==========================================================
+// <q> NRF_CLI_ENABLED  - Enable/disable the CLI module.
+ 
+
+#ifndef NRF_CLI_ENABLED
+#define NRF_CLI_ENABLED 0
+#endif
+
+// <o> NRF_CLI_ARGC_MAX - Maximum number of parameters passed to the command handler. 
+#ifndef NRF_CLI_ARGC_MAX
+#define NRF_CLI_ARGC_MAX 12
+#endif
+
+// <q> NRF_CLI_BUILD_IN_CMDS_ENABLED  - CLI built-in commands.
+ 
+
+#ifndef NRF_CLI_BUILD_IN_CMDS_ENABLED
+#define NRF_CLI_BUILD_IN_CMDS_ENABLED 1
+#endif
+
+// <o> NRF_CLI_CMD_BUFF_SIZE - Maximum buffer size for a single command. 
+#ifndef NRF_CLI_CMD_BUFF_SIZE
+#define NRF_CLI_CMD_BUFF_SIZE 128
+#endif
+
+// <q> NRF_CLI_ECHO_STATUS  - CLI echo status. If set, echo is ON.
+ 
+
+#ifndef NRF_CLI_ECHO_STATUS
+#define NRF_CLI_ECHO_STATUS 1
+#endif
+
+// <q> NRF_CLI_WILDCARD_ENABLED  - Enable wildcard functionality for CLI commands.
+ 
+
+#ifndef NRF_CLI_WILDCARD_ENABLED
+#define NRF_CLI_WILDCARD_ENABLED 0
+#endif
+
+// <q> NRF_CLI_METAKEYS_ENABLED  - Enable additional control keys for CLI commands like ctrl+a, ctrl+e, ctrl+w, ctrl+u
+ 
+
+#ifndef NRF_CLI_METAKEYS_ENABLED
+#define NRF_CLI_METAKEYS_ENABLED 0
+#endif
+
+// <o> NRF_CLI_PRINTF_BUFF_SIZE - Maximum print buffer size. 
+#ifndef NRF_CLI_PRINTF_BUFF_SIZE
+#define NRF_CLI_PRINTF_BUFF_SIZE 23
+#endif
+
+// <e> NRF_CLI_HISTORY_ENABLED - Enable CLI history mode.
+//==========================================================
+#ifndef NRF_CLI_HISTORY_ENABLED
+#define NRF_CLI_HISTORY_ENABLED 1
+#endif
+// <o> NRF_CLI_HISTORY_ELEMENT_SIZE - Size of one memory object reserved for CLI history. 
+#ifndef NRF_CLI_HISTORY_ELEMENT_SIZE
+#define NRF_CLI_HISTORY_ELEMENT_SIZE 32
+#endif
+
+// <o> NRF_CLI_HISTORY_ELEMENT_COUNT - Number of history memory objects. 
+#ifndef NRF_CLI_HISTORY_ELEMENT_COUNT
+#define NRF_CLI_HISTORY_ELEMENT_COUNT 8
+#endif
+
+// </e>
+
+// <q> NRF_CLI_VT100_COLORS_ENABLED  - CLI VT100 colors.
+ 
+
+#ifndef NRF_CLI_VT100_COLORS_ENABLED
+#define NRF_CLI_VT100_COLORS_ENABLED 1
+#endif
+
+// <q> NRF_CLI_STATISTICS_ENABLED  - Enable CLI statistics.
+ 
+
+#ifndef NRF_CLI_STATISTICS_ENABLED
+#define NRF_CLI_STATISTICS_ENABLED 1
+#endif
+
+// <q> NRF_CLI_LOG_BACKEND  - Enable logger backend interface.
+ 
+
+#ifndef NRF_CLI_LOG_BACKEND
+#define NRF_CLI_LOG_BACKEND 1
+#endif
+
+// <q> NRF_CLI_USES_TASK_MANAGER_ENABLED  - Enable CLI to use task_manager
+ 
+
+#ifndef NRF_CLI_USES_TASK_MANAGER_ENABLED
+#define NRF_CLI_USES_TASK_MANAGER_ENABLED 0
+#endif
+
+// </h> 
+//==========================================================
+
+// <h> nrf_fprintf - fprintf function.
+
+//==========================================================
+// <q> NRF_FPRINTF_ENABLED  - Enable/disable fprintf module.
+ 
+
+#ifndef NRF_FPRINTF_ENABLED
+#define NRF_FPRINTF_ENABLED 1
+#endif
+
+// <q> NRF_FPRINTF_FLAG_AUTOMATIC_CR_ON_LF_ENABLED  - For each printed LF, function will add CR.
+ 
+
+#ifndef NRF_FPRINTF_FLAG_AUTOMATIC_CR_ON_LF_ENABLED
+#define NRF_FPRINTF_FLAG_AUTOMATIC_CR_ON_LF_ENABLED 1
+#endif
+
+// <q> NRF_FPRINTF_DOUBLE_ENABLED  - Enable IEEE-754 double precision formatting.
+ 
+
+#ifndef NRF_FPRINTF_DOUBLE_ENABLED
+#define NRF_FPRINTF_DOUBLE_ENABLED 0
+#endif
+
+// </h> 
+//==========================================================
+
+// </h> 
+//==========================================================
+
+// <h> nRF_Log 
+
+//==========================================================
+// <e> NRF_LOG_BACKEND_RTT_ENABLED - nrf_log_backend_rtt - Log RTT backend
+//==========================================================
+#ifndef NRF_LOG_BACKEND_RTT_ENABLED
+#define NRF_LOG_BACKEND_RTT_ENABLED 1
+#endif
+// <o> NRF_LOG_BACKEND_RTT_TEMP_BUFFER_SIZE - Size of buffer for partially processed strings. 
+// <i> Size of the buffer is a trade-off between RAM usage and processing.
+// <i> if buffer is smaller then strings will often be fragmented.
+// <i> It is recommended to use size which will fit typical log and only the
+// <i> longer one will be fragmented.
+
+#ifndef NRF_LOG_BACKEND_RTT_TEMP_BUFFER_SIZE
+#define NRF_LOG_BACKEND_RTT_TEMP_BUFFER_SIZE 64
+#endif
+
+// <o> NRF_LOG_BACKEND_RTT_TX_RETRY_DELAY_MS - Period before retrying writing to RTT 
+#ifndef NRF_LOG_BACKEND_RTT_TX_RETRY_DELAY_MS
+#define NRF_LOG_BACKEND_RTT_TX_RETRY_DELAY_MS 1
+#endif
+
+// <o> NRF_LOG_BACKEND_RTT_TX_RETRY_CNT - Writing to RTT retries. 
+// <i> If RTT fails to accept any new data after retries
+// <i> module assumes that host is not active and on next
+// <i> request it will perform only one write attempt.
+// <i> On successful writing, module assumes that host is active
+// <i> and scheme with retry is applied again.
+
+#ifndef NRF_LOG_BACKEND_RTT_TX_RETRY_CNT
+#define NRF_LOG_BACKEND_RTT_TX_RETRY_CNT 3
+#endif
+
+// </e>
+
+// <e> NRF_LOG_ENABLED - nrf_log - Logger
+//==========================================================
+#ifndef NRF_LOG_ENABLED
+#define NRF_LOG_ENABLED 1
+#endif
+// <h> Log message pool - Configuration of log message pool
+
+//==========================================================
+// <o> NRF_LOG_MSGPOOL_ELEMENT_SIZE - Size of a single element in the pool of memory objects. 
+// <i> If a small value is set, then performance of logs processing
+// <i> is degraded because data is fragmented. Bigger value impacts
+// <i> RAM memory utilization. The size is set to fit a message with
+// <i> a timestamp and up to 2 arguments in a single memory object.
+
+#ifndef NRF_LOG_MSGPOOL_ELEMENT_SIZE
+#define NRF_LOG_MSGPOOL_ELEMENT_SIZE 20
+#endif
+
+// <o> NRF_LOG_MSGPOOL_ELEMENT_COUNT - Number of elements in the pool of memory objects 
+// <i> If a small value is set, then it may lead to a deadlock
+// <i> in certain cases if backend has high latency and holds
+// <i> multiple messages for long time. Bigger value impacts
+// <i> RAM memory usage.
+
+#ifndef NRF_LOG_MSGPOOL_ELEMENT_COUNT
+#define NRF_LOG_MSGPOOL_ELEMENT_COUNT 8
+#endif
+
+// </h> 
+//==========================================================
+
+// <q> NRF_LOG_ALLOW_OVERFLOW  - Configures behavior when circular buffer is full.
+ 
+
+// <i> If set then oldest logs are overwritten. Otherwise a 
+// <i> marker is injected informing about overflow.
+
+#ifndef NRF_LOG_ALLOW_OVERFLOW
+#define NRF_LOG_ALLOW_OVERFLOW 1
+#endif
+
+// <o> NRF_LOG_BUFSIZE  - Size of the buffer for storing logs (in bytes).
+ 
+
+// <i> Must be power of 2 and multiple of 4.
+// <i> If NRF_LOG_DEFERRED = 0 then buffer size can be reduced to minimum.
+// <128=> 128 
+// <256=> 256 
+// <512=> 512 
+// <1024=> 1024 
+// <2048=> 2048 
+// <4096=> 4096 
+// <8192=> 8192 
+// <16384=> 16384 
+
+#ifndef NRF_LOG_BUFSIZE
+#define NRF_LOG_BUFSIZE 1024
+#endif
+
+// <q> NRF_LOG_CLI_CMDS  - Enable CLI commands for the module.
+ 
+
+#ifndef NRF_LOG_CLI_CMDS
+#define NRF_LOG_CLI_CMDS 0
+#endif
+
+// <o> NRF_LOG_DEFAULT_LEVEL  - Default Severity level
+ 
+// <0=> Off 
+// <1=> Error 
+// <2=> Warning 
+// <3=> Info 
+// <4=> Debug 
+
+#ifndef NRF_LOG_DEFAULT_LEVEL
+#define NRF_LOG_DEFAULT_LEVEL 3
+#endif
+
+// <q> NRF_LOG_DEFERRED  - Enable deffered logger.
+ 
+
+// <i> Log data is buffered and can be processed in idle.
+
+#ifndef NRF_LOG_DEFERRED
+#define NRF_LOG_DEFERRED 1
+#endif
+
+// <q> NRF_LOG_FILTERS_ENABLED  - Enable dynamic filtering of logs.
+ 
+
+#ifndef NRF_LOG_FILTERS_ENABLED
+#define NRF_LOG_FILTERS_ENABLED 0
+#endif
+
+// <q> NRF_LOG_NON_DEFFERED_CRITICAL_REGION_ENABLED  - Enable use of critical region for non deffered mode when flushing logs.
+ 
+
+// <i> When enabled NRF_LOG_FLUSH is called from critical section when non deffered mode is used.
+// <i> Log output will never be corrupted as access to the log backend is exclusive
+// <i> but system will spend significant amount of time in critical section
+
+#ifndef NRF_LOG_NON_DEFFERED_CRITICAL_REGION_ENABLED
+#define NRF_LOG_NON_DEFFERED_CRITICAL_REGION_ENABLED 0
+#endif
+
+// <o> NRF_LOG_STR_PUSH_BUFFER_SIZE  - Size of the buffer dedicated for strings stored using @ref NRF_LOG_PUSH.
+ 
+// <16=> 16 
+// <32=> 32 
+// <64=> 64 
+// <128=> 128 
+// <256=> 256 
+// <512=> 512 
+// <1024=> 1024 
+
+#ifndef NRF_LOG_STR_PUSH_BUFFER_SIZE
+#define NRF_LOG_STR_PUSH_BUFFER_SIZE 128
+#endif
+
+// <o> NRF_LOG_STR_PUSH_BUFFER_SIZE  - Size of the buffer dedicated for strings stored using @ref NRF_LOG_PUSH.
+ 
+// <16=> 16 
+// <32=> 32 
+// <64=> 64 
+// <128=> 128 
+// <256=> 256 
+// <512=> 512 
+// <1024=> 1024 
+
+#ifndef NRF_LOG_STR_PUSH_BUFFER_SIZE
+#define NRF_LOG_STR_PUSH_BUFFER_SIZE 128
+#endif
+
+// <e> NRF_LOG_USES_COLORS - If enabled then ANSI escape code for colors is prefixed to every string
+//==========================================================
+#ifndef NRF_LOG_USES_COLORS
+#define NRF_LOG_USES_COLORS 0
+#endif
+// <o> NRF_LOG_COLOR_DEFAULT  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef NRF_LOG_COLOR_DEFAULT
+#define NRF_LOG_COLOR_DEFAULT 0
+#endif
+
+// <o> NRF_LOG_ERROR_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef NRF_LOG_ERROR_COLOR
+#define NRF_LOG_ERROR_COLOR 2
+#endif
+
+// <o> NRF_LOG_WARNING_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef NRF_LOG_WARNING_COLOR
+#define NRF_LOG_WARNING_COLOR 4
+#endif
+
+// </e>
+
+// <e> NRF_LOG_USES_TIMESTAMP - Enable timestamping
+
+// <i> Function for getting the timestamp is provided by the user
+//==========================================================
+#ifndef NRF_LOG_USES_TIMESTAMP
+#define NRF_LOG_USES_TIMESTAMP 0
+#endif
+// <o> NRF_LOG_TIMESTAMP_DEFAULT_FREQUENCY - Default frequency of the timestamp (in Hz) or 0 to use app_timer frequency. 
+#ifndef NRF_LOG_TIMESTAMP_DEFAULT_FREQUENCY
+#define NRF_LOG_TIMESTAMP_DEFAULT_FREQUENCY 0
+#endif
+
+// </e>
+
+// <h> nrf_log module configuration 
+
+//==========================================================
+// <h> nrf_log in nRF_Core 
+
+//==========================================================
+// <e> NRF_MPU_LIB_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef NRF_MPU_LIB_CONFIG_LOG_ENABLED
+#define NRF_MPU_LIB_CONFIG_LOG_ENABLED 0
+#endif
+// <o> NRF_MPU_LIB_CONFIG_LOG_LEVEL  - Default Severity level
+ 
+// <0=> Off 
+// <1=> Error 
+// <2=> Warning 
+// <3=> Info 
+// <4=> Debug 
+
+#ifndef NRF_MPU_LIB_CONFIG_LOG_LEVEL
+#define NRF_MPU_LIB_CONFIG_LOG_LEVEL 3
+#endif
+
+// <o> NRF_MPU_LIB_CONFIG_INFO_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef NRF_MPU_LIB_CONFIG_INFO_COLOR
+#define NRF_MPU_LIB_CONFIG_INFO_COLOR 0
+#endif
+
+// <o> NRF_MPU_LIB_CONFIG_DEBUG_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef NRF_MPU_LIB_CONFIG_DEBUG_COLOR
+#define NRF_MPU_LIB_CONFIG_DEBUG_COLOR 0
+#endif
+
+// </e>
+
+// <e> NRF_STACK_GUARD_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef NRF_STACK_GUARD_CONFIG_LOG_ENABLED
+#define NRF_STACK_GUARD_CONFIG_LOG_ENABLED 0
+#endif
+// <o> NRF_STACK_GUARD_CONFIG_LOG_LEVEL  - Default Severity level
+ 
+// <0=> Off 
+// <1=> Error 
+// <2=> Warning 
+// <3=> Info 
+// <4=> Debug 
+
+#ifndef NRF_STACK_GUARD_CONFIG_LOG_LEVEL
+#define NRF_STACK_GUARD_CONFIG_LOG_LEVEL 3
+#endif
+
+// <o> NRF_STACK_GUARD_CONFIG_INFO_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef NRF_STACK_GUARD_CONFIG_INFO_COLOR
+#define NRF_STACK_GUARD_CONFIG_INFO_COLOR 0
+#endif
+
+// <o> NRF_STACK_GUARD_CONFIG_DEBUG_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef NRF_STACK_GUARD_CONFIG_DEBUG_COLOR
+#define NRF_STACK_GUARD_CONFIG_DEBUG_COLOR 0
+#endif
+
+// </e>
+
+// <e> TASK_MANAGER_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef TASK_MANAGER_CONFIG_LOG_ENABLED
+#define TASK_MANAGER_CONFIG_LOG_ENABLED 0
+#endif
+// <o> TASK_MANAGER_CONFIG_LOG_LEVEL  - Default Severity level
+ 
+// <0=> Off 
+// <1=> Error 
+// <2=> Warning 
+// <3=> Info 
+// <4=> Debug 
+
+#ifndef TASK_MANAGER_CONFIG_LOG_LEVEL
+#define TASK_MANAGER_CONFIG_LOG_LEVEL 3
+#endif
+
+// <o> TASK_MANAGER_CONFIG_INFO_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef TASK_MANAGER_CONFIG_INFO_COLOR
+#define TASK_MANAGER_CONFIG_INFO_COLOR 0
+#endif
+
+// <o> TASK_MANAGER_CONFIG_DEBUG_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef TASK_MANAGER_CONFIG_DEBUG_COLOR
+#define TASK_MANAGER_CONFIG_DEBUG_COLOR 0
+#endif
+
+// </e>
+
+// </h> 
+//==========================================================
+
+// <h> nrf_log in nRF_Drivers 
+
+//==========================================================
+// <e> CLOCK_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef CLOCK_CONFIG_LOG_ENABLED
+#define CLOCK_CONFIG_LOG_ENABLED 0
+#endif
+// <o> CLOCK_CONFIG_LOG_LEVEL  - Default Severity level
+ 
+// <0=> Off 
+// <1=> Error 
+// <2=> Warning 
+// <3=> Info 
+// <4=> Debug 
+
+#ifndef CLOCK_CONFIG_LOG_LEVEL
+#define CLOCK_CONFIG_LOG_LEVEL 3
+#endif
+
+// <o> CLOCK_CONFIG_INFO_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef CLOCK_CONFIG_INFO_COLOR
+#define CLOCK_CONFIG_INFO_COLOR 0
+#endif
+
+// <o> CLOCK_CONFIG_DEBUG_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef CLOCK_CONFIG_DEBUG_COLOR
+#define CLOCK_CONFIG_DEBUG_COLOR 0
+#endif
+
+// </e>
+
+// <e> COMP_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef COMP_CONFIG_LOG_ENABLED
+#define COMP_CONFIG_LOG_ENABLED 0
+#endif
+// <o> COMP_CONFIG_LOG_LEVEL  - Default Severity level
+ 
+// <0=> Off 
+// <1=> Error 
+// <2=> Warning 
+// <3=> Info 
+// <4=> Debug 
+
+#ifndef COMP_CONFIG_LOG_LEVEL
+#define COMP_CONFIG_LOG_LEVEL 3
+#endif
+
+// <o> COMP_CONFIG_INFO_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef COMP_CONFIG_INFO_COLOR
+#define COMP_CONFIG_INFO_COLOR 0
+#endif
+
+// <o> COMP_CONFIG_DEBUG_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef COMP_CONFIG_DEBUG_COLOR
+#define COMP_CONFIG_DEBUG_COLOR 0
+#endif
+
+// </e>
+
+// <e> GPIOTE_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef GPIOTE_CONFIG_LOG_ENABLED
+#define GPIOTE_CONFIG_LOG_ENABLED 0
+#endif
+// <o> GPIOTE_CONFIG_LOG_LEVEL  - Default Severity level
+ 
+// <0=> Off 
+// <1=> Error 
+// <2=> Warning 
+// <3=> Info 
+// <4=> Debug 
+
+#ifndef GPIOTE_CONFIG_LOG_LEVEL
+#define GPIOTE_CONFIG_LOG_LEVEL 3
+#endif
+
+// <o> GPIOTE_CONFIG_INFO_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef GPIOTE_CONFIG_INFO_COLOR
+#define GPIOTE_CONFIG_INFO_COLOR 0
+#endif
+
+// <o> GPIOTE_CONFIG_DEBUG_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef GPIOTE_CONFIG_DEBUG_COLOR
+#define GPIOTE_CONFIG_DEBUG_COLOR 0
+#endif
+
+// </e>
+
+// <e> LPCOMP_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef LPCOMP_CONFIG_LOG_ENABLED
+#define LPCOMP_CONFIG_LOG_ENABLED 0
+#endif
+// <o> LPCOMP_CONFIG_LOG_LEVEL  - Default Severity level
+ 
+// <0=> Off 
+// <1=> Error 
+// <2=> Warning 
+// <3=> Info 
+// <4=> Debug 
+
+#ifndef LPCOMP_CONFIG_LOG_LEVEL
+#define LPCOMP_CONFIG_LOG_LEVEL 3
+#endif
+
+// <o> LPCOMP_CONFIG_INFO_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef LPCOMP_CONFIG_INFO_COLOR
+#define LPCOMP_CONFIG_INFO_COLOR 0
+#endif
+
+// <o> LPCOMP_CONFIG_DEBUG_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef LPCOMP_CONFIG_DEBUG_COLOR
+#define LPCOMP_CONFIG_DEBUG_COLOR 0
+#endif
+
+// </e>
+
+// <e> MAX3421E_HOST_CONFIG_LOG_ENABLED - Enable logging in the module
+//==========================================================
+#ifndef MAX3421E_HOST_CONFIG_LOG_ENABLED
+#define MAX3421E_HOST_CONFIG_LOG_ENABLED 0
+#endif
+// <o> MAX3421E_HOST_CONFIG_LOG_LEVEL  - Default Severity level
+ 
+// <0=> Off 
+// <1=> Error 
+// <2=> Warning 
+// <3=> Info 
+// <4=> Debug 
+
+#ifndef MAX3421E_HOST_CONFIG_LOG_LEVEL
+#define MAX3421E_HOST_CONFIG_LOG_LEVEL 3
+#endif
+
+// <o> MAX3421E_HOST_CONFIG_INFO_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef MAX3421E_HOST_CONFIG_INFO_COLOR
+#define MAX3421E_HOST_CONFIG_INFO_COLOR 0
+#endif
+
+// <o> MAX3421E_HOST_CONFIG_DEBUG_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef MAX3421E_HOST_CONFIG_DEBUG_COLOR
+#define MAX3421E_HOST_CONFIG_DEBUG_COLOR 0
+#endif
+
+// </e>
+
+// <e> NRFX_USBD_CONFIG_LOG_ENABLED - Enable logging in the module
+//==========================================================
+#ifndef NRFX_USBD_CONFIG_LOG_ENABLED
+#define NRFX_USBD_CONFIG_LOG_ENABLED 0
+#endif
+// <o> NRFX_USBD_CONFIG_LOG_LEVEL  - Default Severity level
+ 
+// <0=> Off 
+// <1=> Error 
+// <2=> Warning 
+// <3=> Info 
+// <4=> Debug 
+
+#ifndef NRFX_USBD_CONFIG_LOG_LEVEL
+#define NRFX_USBD_CONFIG_LOG_LEVEL 3
+#endif
+
+// <o> NRFX_USBD_CONFIG_INFO_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef NRFX_USBD_CONFIG_INFO_COLOR
+#define NRFX_USBD_CONFIG_INFO_COLOR 0
+#endif
+
+// <o> NRFX_USBD_CONFIG_DEBUG_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef NRFX_USBD_CONFIG_DEBUG_COLOR
+#define NRFX_USBD_CONFIG_DEBUG_COLOR 0
+#endif
+
+// </e>
+
+// <e> PDM_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef PDM_CONFIG_LOG_ENABLED
+#define PDM_CONFIG_LOG_ENABLED 0
+#endif
+// <o> PDM_CONFIG_LOG_LEVEL  - Default Severity level
+ 
+// <0=> Off 
+// <1=> Error 
+// <2=> Warning 
+// <3=> Info 
+// <4=> Debug 
+
+#ifndef PDM_CONFIG_LOG_LEVEL
+#define PDM_CONFIG_LOG_LEVEL 3
+#endif
+
+// <o> PDM_CONFIG_INFO_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef PDM_CONFIG_INFO_COLOR
+#define PDM_CONFIG_INFO_COLOR 0
+#endif
+
+// <o> PDM_CONFIG_DEBUG_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef PDM_CONFIG_DEBUG_COLOR
+#define PDM_CONFIG_DEBUG_COLOR 0
+#endif
+
+// </e>
+
+// <e> PPI_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef PPI_CONFIG_LOG_ENABLED
+#define PPI_CONFIG_LOG_ENABLED 0
+#endif
+// <o> PPI_CONFIG_LOG_LEVEL  - Default Severity level
+ 
+// <0=> Off 
+// <1=> Error 
+// <2=> Warning 
+// <3=> Info 
+// <4=> Debug 
+
+#ifndef PPI_CONFIG_LOG_LEVEL
+#define PPI_CONFIG_LOG_LEVEL 3
+#endif
+
+// <o> PPI_CONFIG_INFO_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef PPI_CONFIG_INFO_COLOR
+#define PPI_CONFIG_INFO_COLOR 0
+#endif
+
+// <o> PPI_CONFIG_DEBUG_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef PPI_CONFIG_DEBUG_COLOR
+#define PPI_CONFIG_DEBUG_COLOR 0
+#endif
+
+// </e>
+
+// <e> PWM_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef PWM_CONFIG_LOG_ENABLED
+#define PWM_CONFIG_LOG_ENABLED 0
+#endif
+// <o> PWM_CONFIG_LOG_LEVEL  - Default Severity level
+ 
+// <0=> Off 
+// <1=> Error 
+// <2=> Warning 
+// <3=> Info 
+// <4=> Debug 
+
+#ifndef PWM_CONFIG_LOG_LEVEL
+#define PWM_CONFIG_LOG_LEVEL 3
+#endif
+
+// <o> PWM_CONFIG_INFO_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef PWM_CONFIG_INFO_COLOR
+#define PWM_CONFIG_INFO_COLOR 0
+#endif
+
+// <o> PWM_CONFIG_DEBUG_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef PWM_CONFIG_DEBUG_COLOR
+#define PWM_CONFIG_DEBUG_COLOR 0
+#endif
+
+// </e>
+
+// <e> QDEC_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef QDEC_CONFIG_LOG_ENABLED
+#define QDEC_CONFIG_LOG_ENABLED 0
+#endif
+// <o> QDEC_CONFIG_LOG_LEVEL  - Default Severity level
+ 
+// <0=> Off 
+// <1=> Error 
+// <2=> Warning 
+// <3=> Info 
+// <4=> Debug 
+
+#ifndef QDEC_CONFIG_LOG_LEVEL
+#define QDEC_CONFIG_LOG_LEVEL 3
+#endif
+
+// <o> QDEC_CONFIG_INFO_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef QDEC_CONFIG_INFO_COLOR
+#define QDEC_CONFIG_INFO_COLOR 0
+#endif
+
+// <o> QDEC_CONFIG_DEBUG_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef QDEC_CONFIG_DEBUG_COLOR
+#define QDEC_CONFIG_DEBUG_COLOR 0
+#endif
+
+// </e>
+
+// <e> RNG_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef RNG_CONFIG_LOG_ENABLED
+#define RNG_CONFIG_LOG_ENABLED 0
+#endif
+// <o> RNG_CONFIG_LOG_LEVEL  - Default Severity level
+ 
+// <0=> Off 
+// <1=> Error 
+// <2=> Warning 
+// <3=> Info 
+// <4=> Debug 
+
+#ifndef RNG_CONFIG_LOG_LEVEL
+#define RNG_CONFIG_LOG_LEVEL 3
+#endif
+
+// <o> RNG_CONFIG_INFO_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef RNG_CONFIG_INFO_COLOR
+#define RNG_CONFIG_INFO_COLOR 0
+#endif
+
+// <o> RNG_CONFIG_DEBUG_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef RNG_CONFIG_DEBUG_COLOR
+#define RNG_CONFIG_DEBUG_COLOR 0
+#endif
+
+// <q> RNG_CONFIG_RANDOM_NUMBER_LOG_ENABLED  - Enables logging of random numbers.
+ 
+
+#ifndef RNG_CONFIG_RANDOM_NUMBER_LOG_ENABLED
+#define RNG_CONFIG_RANDOM_NUMBER_LOG_ENABLED 0
+#endif
+
+// </e>
+
+// <e> RTC_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef RTC_CONFIG_LOG_ENABLED
+#define RTC_CONFIG_LOG_ENABLED 0
+#endif
+// <o> RTC_CONFIG_LOG_LEVEL  - Default Severity level
+ 
+// <0=> Off 
+// <1=> Error 
+// <2=> Warning 
+// <3=> Info 
+// <4=> Debug 
+
+#ifndef RTC_CONFIG_LOG_LEVEL
+#define RTC_CONFIG_LOG_LEVEL 3
+#endif
+
+// <o> RTC_CONFIG_INFO_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef RTC_CONFIG_INFO_COLOR
+#define RTC_CONFIG_INFO_COLOR 0
+#endif
+
+// <o> RTC_CONFIG_DEBUG_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef RTC_CONFIG_DEBUG_COLOR
+#define RTC_CONFIG_DEBUG_COLOR 0
+#endif
+
+// </e>
+
+// <e> SAADC_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef SAADC_CONFIG_LOG_ENABLED
+#define SAADC_CONFIG_LOG_ENABLED 0
+#endif
+// <o> SAADC_CONFIG_LOG_LEVEL  - Default Severity level
+ 
+// <0=> Off 
+// <1=> Error 
+// <2=> Warning 
+// <3=> Info 
+// <4=> Debug 
+
+#ifndef SAADC_CONFIG_LOG_LEVEL
+#define SAADC_CONFIG_LOG_LEVEL 3
+#endif
+
+// <o> SAADC_CONFIG_INFO_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef SAADC_CONFIG_INFO_COLOR
+#define SAADC_CONFIG_INFO_COLOR 0
+#endif
+
+// <o> SAADC_CONFIG_DEBUG_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef SAADC_CONFIG_DEBUG_COLOR
+#define SAADC_CONFIG_DEBUG_COLOR 0
+#endif
+
+// </e>
+
+// <e> SPIS_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef SPIS_CONFIG_LOG_ENABLED
+#define SPIS_CONFIG_LOG_ENABLED 0
+#endif
+// <o> SPIS_CONFIG_LOG_LEVEL  - Default Severity level
+ 
+// <0=> Off 
+// <1=> Error 
+// <2=> Warning 
+// <3=> Info 
+// <4=> Debug 
+
+#ifndef SPIS_CONFIG_LOG_LEVEL
+#define SPIS_CONFIG_LOG_LEVEL 3
+#endif
+
+// <o> SPIS_CONFIG_INFO_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef SPIS_CONFIG_INFO_COLOR
+#define SPIS_CONFIG_INFO_COLOR 0
+#endif
+
+// <o> SPIS_CONFIG_DEBUG_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef SPIS_CONFIG_DEBUG_COLOR
+#define SPIS_CONFIG_DEBUG_COLOR 0
+#endif
+
+// </e>
+
+// <e> SPI_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef SPI_CONFIG_LOG_ENABLED
+#define SPI_CONFIG_LOG_ENABLED 0
+#endif
+// <o> SPI_CONFIG_LOG_LEVEL  - Default Severity level
+ 
+// <0=> Off 
+// <1=> Error 
+// <2=> Warning 
+// <3=> Info 
+// <4=> Debug 
+
+#ifndef SPI_CONFIG_LOG_LEVEL
+#define SPI_CONFIG_LOG_LEVEL 3
+#endif
+
+// <o> SPI_CONFIG_INFO_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef SPI_CONFIG_INFO_COLOR
+#define SPI_CONFIG_INFO_COLOR 0
+#endif
+
+// <o> SPI_CONFIG_DEBUG_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef SPI_CONFIG_DEBUG_COLOR
+#define SPI_CONFIG_DEBUG_COLOR 0
+#endif
+
+// </e>
+
+// <e> TIMER_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef TIMER_CONFIG_LOG_ENABLED
+#define TIMER_CONFIG_LOG_ENABLED 0
+#endif
+// <o> TIMER_CONFIG_LOG_LEVEL  - Default Severity level
+ 
+// <0=> Off 
+// <1=> Error 
+// <2=> Warning 
+// <3=> Info 
+// <4=> Debug 
+
+#ifndef TIMER_CONFIG_LOG_LEVEL
+#define TIMER_CONFIG_LOG_LEVEL 3
+#endif
+
+// <o> TIMER_CONFIG_INFO_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef TIMER_CONFIG_INFO_COLOR
+#define TIMER_CONFIG_INFO_COLOR 0
+#endif
+
+// <o> TIMER_CONFIG_DEBUG_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef TIMER_CONFIG_DEBUG_COLOR
+#define TIMER_CONFIG_DEBUG_COLOR 0
+#endif
+
+// </e>
+
+// <e> TWIS_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef TWIS_CONFIG_LOG_ENABLED
+#define TWIS_CONFIG_LOG_ENABLED 0
+#endif
+// <o> TWIS_CONFIG_LOG_LEVEL  - Default Severity level
+ 
+// <0=> Off 
+// <1=> Error 
+// <2=> Warning 
+// <3=> Info 
+// <4=> Debug 
+
+#ifndef TWIS_CONFIG_LOG_LEVEL
+#define TWIS_CONFIG_LOG_LEVEL 3
+#endif
+
+// <o> TWIS_CONFIG_INFO_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef TWIS_CONFIG_INFO_COLOR
+#define TWIS_CONFIG_INFO_COLOR 0
+#endif
+
+// <o> TWIS_CONFIG_DEBUG_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef TWIS_CONFIG_DEBUG_COLOR
+#define TWIS_CONFIG_DEBUG_COLOR 0
+#endif
+
+// </e>
+
+// <e> TWI_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef TWI_CONFIG_LOG_ENABLED
+#define TWI_CONFIG_LOG_ENABLED 0
+#endif
+// <o> TWI_CONFIG_LOG_LEVEL  - Default Severity level
+ 
+// <0=> Off 
+// <1=> Error 
+// <2=> Warning 
+// <3=> Info 
+// <4=> Debug 
+
+#ifndef TWI_CONFIG_LOG_LEVEL
+#define TWI_CONFIG_LOG_LEVEL 3
+#endif
+
+// <o> TWI_CONFIG_INFO_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef TWI_CONFIG_INFO_COLOR
+#define TWI_CONFIG_INFO_COLOR 0
+#endif
+
+// <o> TWI_CONFIG_DEBUG_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef TWI_CONFIG_DEBUG_COLOR
+#define TWI_CONFIG_DEBUG_COLOR 0
+#endif
+
+// </e>
+
+// <e> UART_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef UART_CONFIG_LOG_ENABLED
+#define UART_CONFIG_LOG_ENABLED 0
+#endif
+// <o> UART_CONFIG_LOG_LEVEL  - Default Severity level
+ 
+// <0=> Off 
+// <1=> Error 
+// <2=> Warning 
+// <3=> Info 
+// <4=> Debug 
+
+#ifndef UART_CONFIG_LOG_LEVEL
+#define UART_CONFIG_LOG_LEVEL 3
+#endif
+
+// <o> UART_CONFIG_INFO_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef UART_CONFIG_INFO_COLOR
+#define UART_CONFIG_INFO_COLOR 0
+#endif
+
+// <o> UART_CONFIG_DEBUG_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef UART_CONFIG_DEBUG_COLOR
+#define UART_CONFIG_DEBUG_COLOR 0
+#endif
+
+// </e>
+
+// <e> USBD_CONFIG_LOG_ENABLED - Enable logging in the module
+//==========================================================
+#ifndef USBD_CONFIG_LOG_ENABLED
+#define USBD_CONFIG_LOG_ENABLED 0
+#endif
+// <o> USBD_CONFIG_LOG_LEVEL  - Default Severity level
+ 
+// <0=> Off 
+// <1=> Error 
+// <2=> Warning 
+// <3=> Info 
+// <4=> Debug 
+
+#ifndef USBD_CONFIG_LOG_LEVEL
+#define USBD_CONFIG_LOG_LEVEL 3
+#endif
+
+// <o> USBD_CONFIG_INFO_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef USBD_CONFIG_INFO_COLOR
+#define USBD_CONFIG_INFO_COLOR 0
+#endif
+
+// <o> USBD_CONFIG_DEBUG_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef USBD_CONFIG_DEBUG_COLOR
+#define USBD_CONFIG_DEBUG_COLOR 0
+#endif
+
+// </e>
+
+// <e> WDT_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef WDT_CONFIG_LOG_ENABLED
+#define WDT_CONFIG_LOG_ENABLED 0
+#endif
+// <o> WDT_CONFIG_LOG_LEVEL  - Default Severity level
+ 
+// <0=> Off 
+// <1=> Error 
+// <2=> Warning 
+// <3=> Info 
+// <4=> Debug 
+
+#ifndef WDT_CONFIG_LOG_LEVEL
+#define WDT_CONFIG_LOG_LEVEL 3
+#endif
+
+// <o> WDT_CONFIG_INFO_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef WDT_CONFIG_INFO_COLOR
+#define WDT_CONFIG_INFO_COLOR 0
+#endif
+
+// <o> WDT_CONFIG_DEBUG_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef WDT_CONFIG_DEBUG_COLOR
+#define WDT_CONFIG_DEBUG_COLOR 0
+#endif
+
+// </e>
+
+// </h> 
+//==========================================================
+
+// <h> nrf_log in nRF_Libraries 
+
+//==========================================================
+// <e> APP_BUTTON_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef APP_BUTTON_CONFIG_LOG_ENABLED
+#define APP_BUTTON_CONFIG_LOG_ENABLED 0
+#endif
+// <o> APP_BUTTON_CONFIG_LOG_LEVEL  - Default Severity level
+ 
+// <0=> Off 
+// <1=> Error 
+// <2=> Warning 
+// <3=> Info 
+// <4=> Debug 
+
+#ifndef APP_BUTTON_CONFIG_LOG_LEVEL
+#define APP_BUTTON_CONFIG_LOG_LEVEL 3
+#endif
+
+// <o> APP_BUTTON_CONFIG_INITIAL_LOG_LEVEL  - Initial severity level if dynamic filtering is enabled.
+ 
+
+// <i> If module generates a lot of logs, initial log level can
+// <i> be decreased to prevent flooding. Severity level can be
+// <i> increased on instance basis.
+// <0=> Off 
+// <1=> Error 
+// <2=> Warning 
+// <3=> Info 
+// <4=> Debug 
+
+#ifndef APP_BUTTON_CONFIG_INITIAL_LOG_LEVEL
+#define APP_BUTTON_CONFIG_INITIAL_LOG_LEVEL 3
+#endif
+
+// <o> APP_BUTTON_CONFIG_INFO_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef APP_BUTTON_CONFIG_INFO_COLOR
+#define APP_BUTTON_CONFIG_INFO_COLOR 0
+#endif
+
+// <o> APP_BUTTON_CONFIG_DEBUG_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef APP_BUTTON_CONFIG_DEBUG_COLOR
+#define APP_BUTTON_CONFIG_DEBUG_COLOR 0
+#endif
+
+// </e>
+
+// <e> APP_TIMER_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef APP_TIMER_CONFIG_LOG_ENABLED
+#define APP_TIMER_CONFIG_LOG_ENABLED 0
+#endif
+// <o> APP_TIMER_CONFIG_LOG_LEVEL  - Default Severity level
+ 
+// <0=> Off 
+// <1=> Error 
+// <2=> Warning 
+// <3=> Info 
+// <4=> Debug 
+
+#ifndef APP_TIMER_CONFIG_LOG_LEVEL
+#define APP_TIMER_CONFIG_LOG_LEVEL 3
+#endif
+
+// <o> APP_TIMER_CONFIG_INITIAL_LOG_LEVEL  - Initial severity level if dynamic filtering is enabled.
+ 
+
+// <i> If module generates a lot of logs, initial log level can
+// <i> be decreased to prevent flooding. Severity level can be
+// <i> increased on instance basis.
+// <0=> Off 
+// <1=> Error 
+// <2=> Warning 
+// <3=> Info 
+// <4=> Debug 
+
+#ifndef APP_TIMER_CONFIG_INITIAL_LOG_LEVEL
+#define APP_TIMER_CONFIG_INITIAL_LOG_LEVEL 3
+#endif
+
+// <o> APP_TIMER_CONFIG_INFO_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef APP_TIMER_CONFIG_INFO_COLOR
+#define APP_TIMER_CONFIG_INFO_COLOR 0
+#endif
+
+// <o> APP_TIMER_CONFIG_DEBUG_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef APP_TIMER_CONFIG_DEBUG_COLOR
+#define APP_TIMER_CONFIG_DEBUG_COLOR 0
+#endif
+
+// </e>
+
+// <e> APP_USBD_CDC_ACM_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef APP_USBD_CDC_ACM_CONFIG_LOG_ENABLED
+#define APP_USBD_CDC_ACM_CONFIG_LOG_ENABLED 0
+#endif
+// <o> APP_USBD_CDC_ACM_CONFIG_LOG_LEVEL  - Default Severity level
+ 
+// <0=> Off 
+// <1=> Error 
+// <2=> Warning 
+// <3=> Info 
+// <4=> Debug 
+
+#ifndef APP_USBD_CDC_ACM_CONFIG_LOG_LEVEL
+#define APP_USBD_CDC_ACM_CONFIG_LOG_LEVEL 3
+#endif
+
+// <o> APP_USBD_CDC_ACM_CONFIG_INFO_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef APP_USBD_CDC_ACM_CONFIG_INFO_COLOR
+#define APP_USBD_CDC_ACM_CONFIG_INFO_COLOR 0
+#endif
+
+// <o> APP_USBD_CDC_ACM_CONFIG_DEBUG_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef APP_USBD_CDC_ACM_CONFIG_DEBUG_COLOR
+#define APP_USBD_CDC_ACM_CONFIG_DEBUG_COLOR 0
+#endif
+
+// </e>
+
+// <e> APP_USBD_CONFIG_LOG_ENABLED - Enable logging in the module.
+//==========================================================
+#ifndef APP_USBD_CONFIG_LOG_ENABLED
+#define APP_USBD_CONFIG_LOG_ENABLED 0
+#endif
+// <o> APP_USBD_CONFIG_LOG_LEVEL  - Default Severity level
+ 
+// <0=> Off 
+// <1=> Error 
+// <2=> Warning 
+// <3=> Info 
+// <4=> Debug 
+
+#ifndef APP_USBD_CONFIG_LOG_LEVEL
+#define APP_USBD_CONFIG_LOG_LEVEL 3
+#endif
+
+// <o> APP_USBD_CONFIG_INFO_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef APP_USBD_CONFIG_INFO_COLOR
+#define APP_USBD_CONFIG_INFO_COLOR 0
+#endif
+
+// <o> APP_USBD_CONFIG_DEBUG_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef APP_USBD_CONFIG_DEBUG_COLOR
+#define APP_USBD_CONFIG_DEBUG_COLOR 0
+#endif
+
+// </e>
+
+// <e> APP_USBD_DUMMY_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef APP_USBD_DUMMY_CONFIG_LOG_ENABLED
+#define APP_USBD_DUMMY_CONFIG_LOG_ENABLED 0
+#endif
+// <o> APP_USBD_DUMMY_CONFIG_LOG_LEVEL  - Default Severity level
+ 
+// <0=> Off 
+// <1=> Error 
+// <2=> Warning 
+// <3=> Info 
+// <4=> Debug 
+
+#ifndef APP_USBD_DUMMY_CONFIG_LOG_LEVEL
+#define APP_USBD_DUMMY_CONFIG_LOG_LEVEL 3
+#endif
+
+// <o> APP_USBD_DUMMY_CONFIG_INFO_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef APP_USBD_DUMMY_CONFIG_INFO_COLOR
+#define APP_USBD_DUMMY_CONFIG_INFO_COLOR 0
+#endif
+
+// <o> APP_USBD_DUMMY_CONFIG_DEBUG_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef APP_USBD_DUMMY_CONFIG_DEBUG_COLOR
+#define APP_USBD_DUMMY_CONFIG_DEBUG_COLOR 0
+#endif
+
+// </e>
+
+// <e> APP_USBD_MSC_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef APP_USBD_MSC_CONFIG_LOG_ENABLED
+#define APP_USBD_MSC_CONFIG_LOG_ENABLED 0
+#endif
+// <o> APP_USBD_MSC_CONFIG_LOG_LEVEL  - Default Severity level
+ 
+// <0=> Off 
+// <1=> Error 
+// <2=> Warning 
+// <3=> Info 
+// <4=> Debug 
+
+#ifndef APP_USBD_MSC_CONFIG_LOG_LEVEL
+#define APP_USBD_MSC_CONFIG_LOG_LEVEL 3
+#endif
+
+// <o> APP_USBD_MSC_CONFIG_INFO_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef APP_USBD_MSC_CONFIG_INFO_COLOR
+#define APP_USBD_MSC_CONFIG_INFO_COLOR 0
+#endif
+
+// <o> APP_USBD_MSC_CONFIG_DEBUG_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef APP_USBD_MSC_CONFIG_DEBUG_COLOR
+#define APP_USBD_MSC_CONFIG_DEBUG_COLOR 0
+#endif
+
+// </e>
+
+// <e> APP_USBD_NRF_DFU_TRIGGER_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef APP_USBD_NRF_DFU_TRIGGER_CONFIG_LOG_ENABLED
+#define APP_USBD_NRF_DFU_TRIGGER_CONFIG_LOG_ENABLED 0
+#endif
+// <o> APP_USBD_NRF_DFU_TRIGGER_CONFIG_LOG_LEVEL  - Default Severity level
+ 
+// <0=> Off 
+// <1=> Error 
+// <2=> Warning 
+// <3=> Info 
+// <4=> Debug 
+
+#ifndef APP_USBD_NRF_DFU_TRIGGER_CONFIG_LOG_LEVEL
+#define APP_USBD_NRF_DFU_TRIGGER_CONFIG_LOG_LEVEL 3
+#endif
+
+// <o> APP_USBD_NRF_DFU_TRIGGER_CONFIG_INFO_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef APP_USBD_NRF_DFU_TRIGGER_CONFIG_INFO_COLOR
+#define APP_USBD_NRF_DFU_TRIGGER_CONFIG_INFO_COLOR 0
+#endif
+
+// <o> APP_USBD_NRF_DFU_TRIGGER_CONFIG_DEBUG_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef APP_USBD_NRF_DFU_TRIGGER_CONFIG_DEBUG_COLOR
+#define APP_USBD_NRF_DFU_TRIGGER_CONFIG_DEBUG_COLOR 0
+#endif
+
+// </e>
+
+// <e> NRF_ATFIFO_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef NRF_ATFIFO_CONFIG_LOG_ENABLED
+#define NRF_ATFIFO_CONFIG_LOG_ENABLED 0
+#endif
+// <o> NRF_ATFIFO_CONFIG_LOG_LEVEL  - Default Severity level
+ 
+// <0=> Off 
+// <1=> Error 
+// <2=> Warning 
+// <3=> Info 
+// <4=> Debug 
+
+#ifndef NRF_ATFIFO_CONFIG_LOG_LEVEL
+#define NRF_ATFIFO_CONFIG_LOG_LEVEL 3
+#endif
+
+// <o> NRF_ATFIFO_CONFIG_LOG_INIT_FILTER_LEVEL  - Initial severity level if dynamic filtering is enabled
+ 
+// <0=> Off 
+// <1=> Error 
+// <2=> Warning 
+// <3=> Info 
+// <4=> Debug 
+
+#ifndef NRF_ATFIFO_CONFIG_LOG_INIT_FILTER_LEVEL
+#define NRF_ATFIFO_CONFIG_LOG_INIT_FILTER_LEVEL 3
+#endif
+
+// <o> NRF_ATFIFO_CONFIG_INFO_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef NRF_ATFIFO_CONFIG_INFO_COLOR
+#define NRF_ATFIFO_CONFIG_INFO_COLOR 0
+#endif
+
+// <o> NRF_ATFIFO_CONFIG_DEBUG_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef NRF_ATFIFO_CONFIG_DEBUG_COLOR
+#define NRF_ATFIFO_CONFIG_DEBUG_COLOR 0
+#endif
+
+// </e>
+
+// <e> NRF_BALLOC_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef NRF_BALLOC_CONFIG_LOG_ENABLED
+#define NRF_BALLOC_CONFIG_LOG_ENABLED 0
+#endif
+// <o> NRF_BALLOC_CONFIG_LOG_LEVEL  - Default Severity level
+ 
+// <0=> Off 
+// <1=> Error 
+// <2=> Warning 
+// <3=> Info 
+// <4=> Debug 
+
+#ifndef NRF_BALLOC_CONFIG_LOG_LEVEL
+#define NRF_BALLOC_CONFIG_LOG_LEVEL 3
+#endif
+
+// <o> NRF_BALLOC_CONFIG_INITIAL_LOG_LEVEL  - Initial severity level if dynamic filtering is enabled.
+ 
+
+// <i> If module generates a lot of logs, initial log level can
+// <i> be decreased to prevent flooding. Severity level can be
+// <i> increased on instance basis.
+// <0=> Off 
+// <1=> Error 
+// <2=> Warning 
+// <3=> Info 
+// <4=> Debug 
+
+#ifndef NRF_BALLOC_CONFIG_INITIAL_LOG_LEVEL
+#define NRF_BALLOC_CONFIG_INITIAL_LOG_LEVEL 3
+#endif
+
+// <o> NRF_BALLOC_CONFIG_INFO_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef NRF_BALLOC_CONFIG_INFO_COLOR
+#define NRF_BALLOC_CONFIG_INFO_COLOR 0
+#endif
+
+// <o> NRF_BALLOC_CONFIG_DEBUG_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef NRF_BALLOC_CONFIG_DEBUG_COLOR
+#define NRF_BALLOC_CONFIG_DEBUG_COLOR 0
+#endif
+
+// </e>
+
+// <e> NRF_BLOCK_DEV_EMPTY_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef NRF_BLOCK_DEV_EMPTY_CONFIG_LOG_ENABLED
+#define NRF_BLOCK_DEV_EMPTY_CONFIG_LOG_ENABLED 0
+#endif
+// <o> NRF_BLOCK_DEV_EMPTY_CONFIG_LOG_LEVEL  - Default Severity level
+ 
+// <0=> Off 
+// <1=> Error 
+// <2=> Warning 
+// <3=> Info 
+// <4=> Debug 
+
+#ifndef NRF_BLOCK_DEV_EMPTY_CONFIG_LOG_LEVEL
+#define NRF_BLOCK_DEV_EMPTY_CONFIG_LOG_LEVEL 3
+#endif
+
+// <o> NRF_BLOCK_DEV_EMPTY_CONFIG_LOG_INIT_FILTER_LEVEL  - Initial severity level if dynamic filtering is enabled
+ 
+// <0=> Off 
+// <1=> Error 
+// <2=> Warning 
+// <3=> Info 
+// <4=> Debug 
+
+#ifndef NRF_BLOCK_DEV_EMPTY_CONFIG_LOG_INIT_FILTER_LEVEL
+#define NRF_BLOCK_DEV_EMPTY_CONFIG_LOG_INIT_FILTER_LEVEL 3
+#endif
+
+// <o> NRF_BLOCK_DEV_EMPTY_CONFIG_INFO_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef NRF_BLOCK_DEV_EMPTY_CONFIG_INFO_COLOR
+#define NRF_BLOCK_DEV_EMPTY_CONFIG_INFO_COLOR 0
+#endif
+
+// <o> NRF_BLOCK_DEV_EMPTY_CONFIG_DEBUG_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef NRF_BLOCK_DEV_EMPTY_CONFIG_DEBUG_COLOR
+#define NRF_BLOCK_DEV_EMPTY_CONFIG_DEBUG_COLOR 0
+#endif
+
+// </e>
+
+// <e> NRF_BLOCK_DEV_QSPI_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef NRF_BLOCK_DEV_QSPI_CONFIG_LOG_ENABLED
+#define NRF_BLOCK_DEV_QSPI_CONFIG_LOG_ENABLED 0
+#endif
+// <o> NRF_BLOCK_DEV_QSPI_CONFIG_LOG_LEVEL  - Default Severity level
+ 
+// <0=> Off 
+// <1=> Error 
+// <2=> Warning 
+// <3=> Info 
+// <4=> Debug 
+
+#ifndef NRF_BLOCK_DEV_QSPI_CONFIG_LOG_LEVEL
+#define NRF_BLOCK_DEV_QSPI_CONFIG_LOG_LEVEL 3
+#endif
+
+// <o> NRF_BLOCK_DEV_QSPI_CONFIG_LOG_INIT_FILTER_LEVEL  - Initial severity level if dynamic filtering is enabled
+ 
+// <0=> Off 
+// <1=> Error 
+// <2=> Warning 
+// <3=> Info 
+// <4=> Debug 
+
+#ifndef NRF_BLOCK_DEV_QSPI_CONFIG_LOG_INIT_FILTER_LEVEL
+#define NRF_BLOCK_DEV_QSPI_CONFIG_LOG_INIT_FILTER_LEVEL 3
+#endif
+
+// <o> NRF_BLOCK_DEV_QSPI_CONFIG_INFO_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef NRF_BLOCK_DEV_QSPI_CONFIG_INFO_COLOR
+#define NRF_BLOCK_DEV_QSPI_CONFIG_INFO_COLOR 0
+#endif
+
+// <o> NRF_BLOCK_DEV_QSPI_CONFIG_DEBUG_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef NRF_BLOCK_DEV_QSPI_CONFIG_DEBUG_COLOR
+#define NRF_BLOCK_DEV_QSPI_CONFIG_DEBUG_COLOR 0
+#endif
+
+// </e>
+
+// <e> NRF_BLOCK_DEV_RAM_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef NRF_BLOCK_DEV_RAM_CONFIG_LOG_ENABLED
+#define NRF_BLOCK_DEV_RAM_CONFIG_LOG_ENABLED 0
+#endif
+// <o> NRF_BLOCK_DEV_RAM_CONFIG_LOG_LEVEL  - Default Severity level
+ 
+// <0=> Off 
+// <1=> Error 
+// <2=> Warning 
+// <3=> Info 
+// <4=> Debug 
+
+#ifndef NRF_BLOCK_DEV_RAM_CONFIG_LOG_LEVEL
+#define NRF_BLOCK_DEV_RAM_CONFIG_LOG_LEVEL 3
+#endif
+
+// <o> NRF_BLOCK_DEV_RAM_CONFIG_LOG_INIT_FILTER_LEVEL  - Initial severity level if dynamic filtering is enabled
+ 
+// <0=> Off 
+// <1=> Error 
+// <2=> Warning 
+// <3=> Info 
+// <4=> Debug 
+
+#ifndef NRF_BLOCK_DEV_RAM_CONFIG_LOG_INIT_FILTER_LEVEL
+#define NRF_BLOCK_DEV_RAM_CONFIG_LOG_INIT_FILTER_LEVEL 3
+#endif
+
+// <o> NRF_BLOCK_DEV_RAM_CONFIG_INFO_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef NRF_BLOCK_DEV_RAM_CONFIG_INFO_COLOR
+#define NRF_BLOCK_DEV_RAM_CONFIG_INFO_COLOR 0
+#endif
+
+// <o> NRF_BLOCK_DEV_RAM_CONFIG_DEBUG_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef NRF_BLOCK_DEV_RAM_CONFIG_DEBUG_COLOR
+#define NRF_BLOCK_DEV_RAM_CONFIG_DEBUG_COLOR 0
+#endif
+
+// </e>
+
+// <e> NRF_CLI_BLE_UART_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef NRF_CLI_BLE_UART_CONFIG_LOG_ENABLED
+#define NRF_CLI_BLE_UART_CONFIG_LOG_ENABLED 0
+#endif
+// <o> NRF_CLI_BLE_UART_CONFIG_LOG_LEVEL  - Default Severity level
+ 
+// <0=> Off 
+// <1=> Error 
+// <2=> Warning 
+// <3=> Info 
+// <4=> Debug 
+
+#ifndef NRF_CLI_BLE_UART_CONFIG_LOG_LEVEL
+#define NRF_CLI_BLE_UART_CONFIG_LOG_LEVEL 3
+#endif
+
+// <o> NRF_CLI_BLE_UART_CONFIG_INFO_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef NRF_CLI_BLE_UART_CONFIG_INFO_COLOR
+#define NRF_CLI_BLE_UART_CONFIG_INFO_COLOR 0
+#endif
+
+// <o> NRF_CLI_BLE_UART_CONFIG_DEBUG_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef NRF_CLI_BLE_UART_CONFIG_DEBUG_COLOR
+#define NRF_CLI_BLE_UART_CONFIG_DEBUG_COLOR 0
+#endif
+
+// </e>
+
+// <e> NRF_CLI_LIBUARTE_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef NRF_CLI_LIBUARTE_CONFIG_LOG_ENABLED
+#define NRF_CLI_LIBUARTE_CONFIG_LOG_ENABLED 0
+#endif
+// <o> NRF_CLI_LIBUARTE_CONFIG_LOG_LEVEL  - Default Severity level
+ 
+// <0=> Off 
+// <1=> Error 
+// <2=> Warning 
+// <3=> Info 
+// <4=> Debug 
+
+#ifndef NRF_CLI_LIBUARTE_CONFIG_LOG_LEVEL
+#define NRF_CLI_LIBUARTE_CONFIG_LOG_LEVEL 3
+#endif
+
+// <o> NRF_CLI_LIBUARTE_CONFIG_INFO_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef NRF_CLI_LIBUARTE_CONFIG_INFO_COLOR
+#define NRF_CLI_LIBUARTE_CONFIG_INFO_COLOR 0
+#endif
+
+// <o> NRF_CLI_LIBUARTE_CONFIG_DEBUG_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef NRF_CLI_LIBUARTE_CONFIG_DEBUG_COLOR
+#define NRF_CLI_LIBUARTE_CONFIG_DEBUG_COLOR 0
+#endif
+
+// </e>
+
+// <e> NRF_CLI_UART_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef NRF_CLI_UART_CONFIG_LOG_ENABLED
+#define NRF_CLI_UART_CONFIG_LOG_ENABLED 0
+#endif
+// <o> NRF_CLI_UART_CONFIG_LOG_LEVEL  - Default Severity level
+ 
+// <0=> Off 
+// <1=> Error 
+// <2=> Warning 
+// <3=> Info 
+// <4=> Debug 
+
+#ifndef NRF_CLI_UART_CONFIG_LOG_LEVEL
+#define NRF_CLI_UART_CONFIG_LOG_LEVEL 3
+#endif
+
+// <o> NRF_CLI_UART_CONFIG_INFO_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef NRF_CLI_UART_CONFIG_INFO_COLOR
+#define NRF_CLI_UART_CONFIG_INFO_COLOR 0
+#endif
+
+// <o> NRF_CLI_UART_CONFIG_DEBUG_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef NRF_CLI_UART_CONFIG_DEBUG_COLOR
+#define NRF_CLI_UART_CONFIG_DEBUG_COLOR 0
+#endif
+
+// </e>
+
+// <e> NRF_LIBUARTE_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef NRF_LIBUARTE_CONFIG_LOG_ENABLED
+#define NRF_LIBUARTE_CONFIG_LOG_ENABLED 0
+#endif
+// <o> NRF_LIBUARTE_CONFIG_LOG_LEVEL  - Default Severity level
+ 
+// <0=> Off 
+// <1=> Error 
+// <2=> Warning 
+// <3=> Info 
+// <4=> Debug 
+
+#ifndef NRF_LIBUARTE_CONFIG_LOG_LEVEL
+#define NRF_LIBUARTE_CONFIG_LOG_LEVEL 3
+#endif
+
+// <o> NRF_LIBUARTE_CONFIG_INFO_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef NRF_LIBUARTE_CONFIG_INFO_COLOR
+#define NRF_LIBUARTE_CONFIG_INFO_COLOR 0
+#endif
+
+// <o> NRF_LIBUARTE_CONFIG_DEBUG_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef NRF_LIBUARTE_CONFIG_DEBUG_COLOR
+#define NRF_LIBUARTE_CONFIG_DEBUG_COLOR 0
+#endif
+
+// </e>
+
+// <e> NRF_MEMOBJ_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef NRF_MEMOBJ_CONFIG_LOG_ENABLED
+#define NRF_MEMOBJ_CONFIG_LOG_ENABLED 0
+#endif
+// <o> NRF_MEMOBJ_CONFIG_LOG_LEVEL  - Default Severity level
+ 
+// <0=> Off 
+// <1=> Error 
+// <2=> Warning 
+// <3=> Info 
+// <4=> Debug 
+
+#ifndef NRF_MEMOBJ_CONFIG_LOG_LEVEL
+#define NRF_MEMOBJ_CONFIG_LOG_LEVEL 3
+#endif
+
+// <o> NRF_MEMOBJ_CONFIG_INFO_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef NRF_MEMOBJ_CONFIG_INFO_COLOR
+#define NRF_MEMOBJ_CONFIG_INFO_COLOR 0
+#endif
+
+// <o> NRF_MEMOBJ_CONFIG_DEBUG_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef NRF_MEMOBJ_CONFIG_DEBUG_COLOR
+#define NRF_MEMOBJ_CONFIG_DEBUG_COLOR 0
+#endif
+
+// </e>
+
+// <e> NRF_PWR_MGMT_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef NRF_PWR_MGMT_CONFIG_LOG_ENABLED
+#define NRF_PWR_MGMT_CONFIG_LOG_ENABLED 0
+#endif
+// <o> NRF_PWR_MGMT_CONFIG_LOG_LEVEL  - Default Severity level
+ 
+// <0=> Off 
+// <1=> Error 
+// <2=> Warning 
+// <3=> Info 
+// <4=> Debug 
+
+#ifndef NRF_PWR_MGMT_CONFIG_LOG_LEVEL
+#define NRF_PWR_MGMT_CONFIG_LOG_LEVEL 3
+#endif
+
+// <o> NRF_PWR_MGMT_CONFIG_INFO_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef NRF_PWR_MGMT_CONFIG_INFO_COLOR
+#define NRF_PWR_MGMT_CONFIG_INFO_COLOR 0
+#endif
+
+// <o> NRF_PWR_MGMT_CONFIG_DEBUG_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef NRF_PWR_MGMT_CONFIG_DEBUG_COLOR
+#define NRF_PWR_MGMT_CONFIG_DEBUG_COLOR 0
+#endif
+
+// </e>
+
+// <e> NRF_QUEUE_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef NRF_QUEUE_CONFIG_LOG_ENABLED
+#define NRF_QUEUE_CONFIG_LOG_ENABLED 0
+#endif
+// <o> NRF_QUEUE_CONFIG_LOG_LEVEL  - Default Severity level
+ 
+// <0=> Off 
+// <1=> Error 
+// <2=> Warning 
+// <3=> Info 
+// <4=> Debug 
+
+#ifndef NRF_QUEUE_CONFIG_LOG_LEVEL
+#define NRF_QUEUE_CONFIG_LOG_LEVEL 3
+#endif
+
+// <o> NRF_QUEUE_CONFIG_LOG_INIT_FILTER_LEVEL  - Initial severity level if dynamic filtering is enabled
+ 
+// <0=> Off 
+// <1=> Error 
+// <2=> Warning 
+// <3=> Info 
+// <4=> Debug 
+
+#ifndef NRF_QUEUE_CONFIG_LOG_INIT_FILTER_LEVEL
+#define NRF_QUEUE_CONFIG_LOG_INIT_FILTER_LEVEL 3
+#endif
+
+// <o> NRF_QUEUE_CONFIG_INFO_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef NRF_QUEUE_CONFIG_INFO_COLOR
+#define NRF_QUEUE_CONFIG_INFO_COLOR 0
+#endif
+
+// <o> NRF_QUEUE_CONFIG_DEBUG_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef NRF_QUEUE_CONFIG_DEBUG_COLOR
+#define NRF_QUEUE_CONFIG_DEBUG_COLOR 0
+#endif
+
+// </e>
+
+// <e> NRF_SDH_ANT_LOG_ENABLED - Enable logging in SoftDevice handler (ANT) module.
+//==========================================================
+#ifndef NRF_SDH_ANT_LOG_ENABLED
+#define NRF_SDH_ANT_LOG_ENABLED 0
+#endif
+// <o> NRF_SDH_ANT_LOG_LEVEL  - Default Severity level
+ 
+// <0=> Off 
+// <1=> Error 
+// <2=> Warning 
+// <3=> Info 
+// <4=> Debug 
+
+#ifndef NRF_SDH_ANT_LOG_LEVEL
+#define NRF_SDH_ANT_LOG_LEVEL 3
+#endif
+
+// <o> NRF_SDH_ANT_INFO_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef NRF_SDH_ANT_INFO_COLOR
+#define NRF_SDH_ANT_INFO_COLOR 0
+#endif
+
+// <o> NRF_SDH_ANT_DEBUG_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef NRF_SDH_ANT_DEBUG_COLOR
+#define NRF_SDH_ANT_DEBUG_COLOR 0
+#endif
+
+// </e>
+
+// <e> NRF_SDH_BLE_LOG_ENABLED - Enable logging in SoftDevice handler (BLE) module.
+//==========================================================
+#ifndef NRF_SDH_BLE_LOG_ENABLED
+#define NRF_SDH_BLE_LOG_ENABLED 1
+#endif
+// <o> NRF_SDH_BLE_LOG_LEVEL  - Default Severity level
+ 
+// <0=> Off 
+// <1=> Error 
+// <2=> Warning 
+// <3=> Info 
+// <4=> Debug 
+
+#ifndef NRF_SDH_BLE_LOG_LEVEL
+#define NRF_SDH_BLE_LOG_LEVEL 3
+#endif
+
+// <o> NRF_SDH_BLE_INFO_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef NRF_SDH_BLE_INFO_COLOR
+#define NRF_SDH_BLE_INFO_COLOR 0
+#endif
+
+// <o> NRF_SDH_BLE_DEBUG_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef NRF_SDH_BLE_DEBUG_COLOR
+#define NRF_SDH_BLE_DEBUG_COLOR 0
+#endif
+
+// </e>
+
+// <e> NRF_SDH_LOG_ENABLED - Enable logging in SoftDevice handler module.
+//==========================================================
+#ifndef NRF_SDH_LOG_ENABLED
+#define NRF_SDH_LOG_ENABLED 1
+#endif
+// <o> NRF_SDH_LOG_LEVEL  - Default Severity level
+ 
+// <0=> Off 
+// <1=> Error 
+// <2=> Warning 
+// <3=> Info 
+// <4=> Debug 
+
+#ifndef NRF_SDH_LOG_LEVEL
+#define NRF_SDH_LOG_LEVEL 3
+#endif
+
+// <o> NRF_SDH_INFO_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef NRF_SDH_INFO_COLOR
+#define NRF_SDH_INFO_COLOR 0
+#endif
+
+// <o> NRF_SDH_DEBUG_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef NRF_SDH_DEBUG_COLOR
+#define NRF_SDH_DEBUG_COLOR 0
+#endif
+
+// </e>
+
+// <e> NRF_SDH_SOC_LOG_ENABLED - Enable logging in SoftDevice handler (SoC) module.
+//==========================================================
+#ifndef NRF_SDH_SOC_LOG_ENABLED
+#define NRF_SDH_SOC_LOG_ENABLED 1
+#endif
+// <o> NRF_SDH_SOC_LOG_LEVEL  - Default Severity level
+ 
+// <0=> Off 
+// <1=> Error 
+// <2=> Warning 
+// <3=> Info 
+// <4=> Debug 
+
+#ifndef NRF_SDH_SOC_LOG_LEVEL
+#define NRF_SDH_SOC_LOG_LEVEL 3
+#endif
+
+// <o> NRF_SDH_SOC_INFO_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef NRF_SDH_SOC_INFO_COLOR
+#define NRF_SDH_SOC_INFO_COLOR 0
+#endif
+
+// <o> NRF_SDH_SOC_DEBUG_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef NRF_SDH_SOC_DEBUG_COLOR
+#define NRF_SDH_SOC_DEBUG_COLOR 0
+#endif
+
+// </e>
+
+// <e> NRF_SORTLIST_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef NRF_SORTLIST_CONFIG_LOG_ENABLED
+#define NRF_SORTLIST_CONFIG_LOG_ENABLED 0
+#endif
+// <o> NRF_SORTLIST_CONFIG_LOG_LEVEL  - Default Severity level
+ 
+// <0=> Off 
+// <1=> Error 
+// <2=> Warning 
+// <3=> Info 
+// <4=> Debug 
+
+#ifndef NRF_SORTLIST_CONFIG_LOG_LEVEL
+#define NRF_SORTLIST_CONFIG_LOG_LEVEL 3
+#endif
+
+// <o> NRF_SORTLIST_CONFIG_INFO_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef NRF_SORTLIST_CONFIG_INFO_COLOR
+#define NRF_SORTLIST_CONFIG_INFO_COLOR 0
+#endif
+
+// <o> NRF_SORTLIST_CONFIG_DEBUG_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef NRF_SORTLIST_CONFIG_DEBUG_COLOR
+#define NRF_SORTLIST_CONFIG_DEBUG_COLOR 0
+#endif
+
+// </e>
+
+// <e> NRF_TWI_SENSOR_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef NRF_TWI_SENSOR_CONFIG_LOG_ENABLED
+#define NRF_TWI_SENSOR_CONFIG_LOG_ENABLED 0
+#endif
+// <o> NRF_TWI_SENSOR_CONFIG_LOG_LEVEL  - Default Severity level
+ 
+// <0=> Off 
+// <1=> Error 
+// <2=> Warning 
+// <3=> Info 
+// <4=> Debug 
+
+#ifndef NRF_TWI_SENSOR_CONFIG_LOG_LEVEL
+#define NRF_TWI_SENSOR_CONFIG_LOG_LEVEL 3
+#endif
+
+// <o> NRF_TWI_SENSOR_CONFIG_INFO_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef NRF_TWI_SENSOR_CONFIG_INFO_COLOR
+#define NRF_TWI_SENSOR_CONFIG_INFO_COLOR 0
+#endif
+
+// <o> NRF_TWI_SENSOR_CONFIG_DEBUG_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef NRF_TWI_SENSOR_CONFIG_DEBUG_COLOR
+#define NRF_TWI_SENSOR_CONFIG_DEBUG_COLOR 0
+#endif
+
+// </e>
+
+// <e> PM_LOG_ENABLED - Enable logging in Peer Manager and its submodules.
+//==========================================================
+#ifndef PM_LOG_ENABLED
+#define PM_LOG_ENABLED 1
+#endif
+// <o> PM_LOG_LEVEL  - Default Severity level
+ 
+// <0=> Off 
+// <1=> Error 
+// <2=> Warning 
+// <3=> Info 
+// <4=> Debug 
+
+#ifndef PM_LOG_LEVEL
+#define PM_LOG_LEVEL 3
+#endif
+
+// <o> PM_LOG_INFO_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef PM_LOG_INFO_COLOR
+#define PM_LOG_INFO_COLOR 0
+#endif
+
+// <o> PM_LOG_DEBUG_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef PM_LOG_DEBUG_COLOR
+#define PM_LOG_DEBUG_COLOR 0
+#endif
+
+// </e>
+
+// </h> 
+//==========================================================
+
+// <h> nrf_log in nRF_Serialization 
+
+//==========================================================
+// <e> SER_HAL_TRANSPORT_CONFIG_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef SER_HAL_TRANSPORT_CONFIG_LOG_ENABLED
+#define SER_HAL_TRANSPORT_CONFIG_LOG_ENABLED 0
+#endif
+// <o> SER_HAL_TRANSPORT_CONFIG_LOG_LEVEL  - Default Severity level
+ 
+// <0=> Off 
+// <1=> Error 
+// <2=> Warning 
+// <3=> Info 
+// <4=> Debug 
+
+#ifndef SER_HAL_TRANSPORT_CONFIG_LOG_LEVEL
+#define SER_HAL_TRANSPORT_CONFIG_LOG_LEVEL 3
+#endif
+
+// <o> SER_HAL_TRANSPORT_CONFIG_INFO_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef SER_HAL_TRANSPORT_CONFIG_INFO_COLOR
+#define SER_HAL_TRANSPORT_CONFIG_INFO_COLOR 0
+#endif
+
+// <o> SER_HAL_TRANSPORT_CONFIG_DEBUG_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef SER_HAL_TRANSPORT_CONFIG_DEBUG_COLOR
+#define SER_HAL_TRANSPORT_CONFIG_DEBUG_COLOR 0
+#endif
+
+// </e>
+
+// </h> 
+//==========================================================
+
+// </h> 
+//==========================================================
+
+// </e>
+
+// <q> NRF_LOG_STR_FORMATTER_TIMESTAMP_FORMAT_ENABLED  - nrf_log_str_formatter - Log string formatter
+ 
+
+#ifndef NRF_LOG_STR_FORMATTER_TIMESTAMP_FORMAT_ENABLED
+#define NRF_LOG_STR_FORMATTER_TIMESTAMP_FORMAT_ENABLED 1
+#endif
+
+// </h> 
+//==========================================================
+
+// <h> nRF_NFC 
+
+//==========================================================
+// <q> NFC_AC_REC_ENABLED  - nfc_ac_rec - NFC NDEF Alternative Carrier record encoder
+ 
+
+#ifndef NFC_AC_REC_ENABLED
+#define NFC_AC_REC_ENABLED 0
+#endif
+
+// <q> NFC_AC_REC_PARSER_ENABLED  - nfc_ac_rec_parser - Alternative Carrier record parser
+ 
+
+#ifndef NFC_AC_REC_PARSER_ENABLED
+#define NFC_AC_REC_PARSER_ENABLED 0
+#endif
+
+// <e> NFC_BLE_OOB_ADVDATA_ENABLED - nfc_ble_oob_advdata - AD data for OOB pairing encoder
+//==========================================================
+#ifndef NFC_BLE_OOB_ADVDATA_ENABLED
+#define NFC_BLE_OOB_ADVDATA_ENABLED 0
+#endif
+// <o> ADVANCED_ADVDATA_SUPPORT  - Non-mandatory AD types for BLE OOB pairing are encoded inside the NDEF message (e.g. service UUIDs)
+ 
+// <1=> Enabled 
+// <0=> Disabled 
+
+#ifndef ADVANCED_ADVDATA_SUPPORT
+#define ADVANCED_ADVDATA_SUPPORT 0
+#endif
+
+// </e>
+
+// <q> NFC_BLE_OOB_ADVDATA_PARSER_ENABLED  - nfc_ble_oob_advdata_parser - BLE OOB pairing AD data parser
+ 
+
+#ifndef NFC_BLE_OOB_ADVDATA_PARSER_ENABLED
+#define NFC_BLE_OOB_ADVDATA_PARSER_ENABLED 0
+#endif
+
+// <e> NFC_BLE_PAIR_LIB_ENABLED - nfc_ble_pair_lib - Library parameters
+//==========================================================
+#ifndef NFC_BLE_PAIR_LIB_ENABLED
+#define NFC_BLE_PAIR_LIB_ENABLED 0
+#endif
+// <e> NFC_BLE_PAIR_LIB_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef NFC_BLE_PAIR_LIB_LOG_ENABLED
+#define NFC_BLE_PAIR_LIB_LOG_ENABLED 0
+#endif
+// <o> NFC_BLE_PAIR_LIB_LOG_LEVEL  - Default Severity level
+ 
+// <0=> Off 
+// <1=> Error 
+// <2=> Warning 
+// <3=> Info 
+// <4=> Debug 
+
+#ifndef NFC_BLE_PAIR_LIB_LOG_LEVEL
+#define NFC_BLE_PAIR_LIB_LOG_LEVEL 3
+#endif
+
+// <o> NFC_BLE_PAIR_LIB_INFO_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef NFC_BLE_PAIR_LIB_INFO_COLOR
+#define NFC_BLE_PAIR_LIB_INFO_COLOR 0
+#endif
+
+// <o> NFC_BLE_PAIR_LIB_DEBUG_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef NFC_BLE_PAIR_LIB_DEBUG_COLOR
+#define NFC_BLE_PAIR_LIB_DEBUG_COLOR 0
+#endif
+
+// </e>
+
+// <h> NFC_BLE_PAIR_LIB_SECURITY_PARAMETERS - Common Peer Manager security parameters.
+
+//==========================================================
+// <e> BLE_NFC_SEC_PARAM_BOND - Enables device bonding.
+
+// <i> If bonding is enabled at least one of the BLE_NFC_SEC_PARAM_KDIST options must be enabled.
+//==========================================================
+#ifndef BLE_NFC_SEC_PARAM_BOND
+#define BLE_NFC_SEC_PARAM_BOND 1
+#endif
+// <q> BLE_NFC_SEC_PARAM_KDIST_OWN_ENC  - Enables Long Term Key and Master Identification distribution by device.
+ 
+
+#ifndef BLE_NFC_SEC_PARAM_KDIST_OWN_ENC
+#define BLE_NFC_SEC_PARAM_KDIST_OWN_ENC 1
+#endif
+
+// <q> BLE_NFC_SEC_PARAM_KDIST_OWN_ID  - Enables Identity Resolving Key and Identity Address Information distribution by device.
+ 
+
+#ifndef BLE_NFC_SEC_PARAM_KDIST_OWN_ID
+#define BLE_NFC_SEC_PARAM_KDIST_OWN_ID 1
+#endif
+
+// <q> BLE_NFC_SEC_PARAM_KDIST_PEER_ENC  - Enables Long Term Key and Master Identification distribution by peer.
+ 
+
+#ifndef BLE_NFC_SEC_PARAM_KDIST_PEER_ENC
+#define BLE_NFC_SEC_PARAM_KDIST_PEER_ENC 1
+#endif
+
+// <q> BLE_NFC_SEC_PARAM_KDIST_PEER_ID  - Enables Identity Resolving Key and Identity Address Information distribution by peer.
+ 
+
+#ifndef BLE_NFC_SEC_PARAM_KDIST_PEER_ID
+#define BLE_NFC_SEC_PARAM_KDIST_PEER_ID 1
+#endif
+
+// </e>
+
+// <o> BLE_NFC_SEC_PARAM_MIN_KEY_SIZE  - Minimal size of a security key.
+ 
+// <7=> 7 
+// <8=> 8 
+// <9=> 9 
+// <10=> 10 
+// <11=> 11 
+// <12=> 12 
+// <13=> 13 
+// <14=> 14 
+// <15=> 15 
+// <16=> 16 
+
+#ifndef BLE_NFC_SEC_PARAM_MIN_KEY_SIZE
+#define BLE_NFC_SEC_PARAM_MIN_KEY_SIZE 7
+#endif
+
+// <o> BLE_NFC_SEC_PARAM_MAX_KEY_SIZE  - Maximal size of a security key.
+ 
+// <7=> 7 
+// <8=> 8 
+// <9=> 9 
+// <10=> 10 
+// <11=> 11 
+// <12=> 12 
+// <13=> 13 
+// <14=> 14 
+// <15=> 15 
+// <16=> 16 
+
+#ifndef BLE_NFC_SEC_PARAM_MAX_KEY_SIZE
+#define BLE_NFC_SEC_PARAM_MAX_KEY_SIZE 16
+#endif
+
+// </h> 
+//==========================================================
+
+// </e>
+
+// <q> NFC_BLE_PAIR_MSG_ENABLED  - nfc_ble_pair_msg - NDEF message for OOB pairing encoder
+ 
+
+#ifndef NFC_BLE_PAIR_MSG_ENABLED
+#define NFC_BLE_PAIR_MSG_ENABLED 0
+#endif
+
+// <q> NFC_CH_COMMON_ENABLED  - nfc_ble_pair_common - OOB pairing common data
+ 
+
+#ifndef NFC_CH_COMMON_ENABLED
+#define NFC_CH_COMMON_ENABLED 0
+#endif
+
+// <q> NFC_EP_OOB_REC_ENABLED  - nfc_ep_oob_rec - EP record for BLE pairing encoder
+ 
+
+#ifndef NFC_EP_OOB_REC_ENABLED
+#define NFC_EP_OOB_REC_ENABLED 0
+#endif
+
+// <q> NFC_HS_REC_ENABLED  - nfc_hs_rec - Handover Select NDEF record encoder
+ 
+
+#ifndef NFC_HS_REC_ENABLED
+#define NFC_HS_REC_ENABLED 0
+#endif
+
+// <q> NFC_LE_OOB_REC_ENABLED  - nfc_le_oob_rec - LE record for BLE pairing encoder
+ 
+
+#ifndef NFC_LE_OOB_REC_ENABLED
+#define NFC_LE_OOB_REC_ENABLED 0
+#endif
+
+// <q> NFC_LE_OOB_REC_PARSER_ENABLED  - nfc_le_oob_rec_parser - LE record parser
+ 
+
+#ifndef NFC_LE_OOB_REC_PARSER_ENABLED
+#define NFC_LE_OOB_REC_PARSER_ENABLED 0
+#endif
+
+// <q> NFC_NDEF_LAUNCHAPP_MSG_ENABLED  - nfc_launchapp_msg - Encoding data for NDEF Application Launching message for NFC Tag
+ 
+
+#ifndef NFC_NDEF_LAUNCHAPP_MSG_ENABLED
+#define NFC_NDEF_LAUNCHAPP_MSG_ENABLED 0
+#endif
+
+// <q> NFC_NDEF_LAUNCHAPP_REC_ENABLED  - nfc_launchapp_rec - Encoding data for NDEF Application Launching record for NFC Tag
+ 
+
+#ifndef NFC_NDEF_LAUNCHAPP_REC_ENABLED
+#define NFC_NDEF_LAUNCHAPP_REC_ENABLED 0
+#endif
+
+// <e> NFC_NDEF_MSG_ENABLED - nfc_ndef_msg - NFC NDEF Message generator module
+//==========================================================
+#ifndef NFC_NDEF_MSG_ENABLED
+#define NFC_NDEF_MSG_ENABLED 0
+#endif
+// <o> NFC_NDEF_MSG_TAG_TYPE  - NFC Tag Type
+ 
+// <2=> Type 2 Tag 
+// <4=> Type 4 Tag 
+
+#ifndef NFC_NDEF_MSG_TAG_TYPE
+#define NFC_NDEF_MSG_TAG_TYPE 2
+#endif
+
+// </e>
+
+// <e> NFC_NDEF_MSG_PARSER_ENABLED - nfc_ndef_msg_parser - NFC NDEF message parser module
+//==========================================================
+#ifndef NFC_NDEF_MSG_PARSER_ENABLED
+#define NFC_NDEF_MSG_PARSER_ENABLED 0
+#endif
+// <e> NFC_NDEF_MSG_PARSER_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef NFC_NDEF_MSG_PARSER_LOG_ENABLED
+#define NFC_NDEF_MSG_PARSER_LOG_ENABLED 0
+#endif
+// <o> NFC_NDEF_MSG_PARSER_LOG_LEVEL  - Default Severity level
+ 
+// <0=> Off 
+// <1=> Error 
+// <2=> Warning 
+// <3=> Info 
+// <4=> Debug 
+
+#ifndef NFC_NDEF_MSG_PARSER_LOG_LEVEL
+#define NFC_NDEF_MSG_PARSER_LOG_LEVEL 3
+#endif
+
+// <o> NFC_NDEF_MSG_PARSER_INFO_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef NFC_NDEF_MSG_PARSER_INFO_COLOR
+#define NFC_NDEF_MSG_PARSER_INFO_COLOR 0
+#endif
+
+// </e>
+
+// </e>
+
+// <q> NFC_NDEF_RECORD_ENABLED  - nfc_ndef_record - NFC NDEF Record generator module
+ 
+
+#ifndef NFC_NDEF_RECORD_ENABLED
+#define NFC_NDEF_RECORD_ENABLED 0
+#endif
+
+// <e> NFC_NDEF_RECORD_PARSER_ENABLED - nfc_ndef_record_parser - NFC NDEF Record parser module
+//==========================================================
+#ifndef NFC_NDEF_RECORD_PARSER_ENABLED
+#define NFC_NDEF_RECORD_PARSER_ENABLED 0
+#endif
+// <e> NFC_NDEF_RECORD_PARSER_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef NFC_NDEF_RECORD_PARSER_LOG_ENABLED
+#define NFC_NDEF_RECORD_PARSER_LOG_ENABLED 0
+#endif
+// <o> NFC_NDEF_RECORD_PARSER_LOG_LEVEL  - Default Severity level
+ 
+// <0=> Off 
+// <1=> Error 
+// <2=> Warning 
+// <3=> Info 
+// <4=> Debug 
+
+#ifndef NFC_NDEF_RECORD_PARSER_LOG_LEVEL
+#define NFC_NDEF_RECORD_PARSER_LOG_LEVEL 3
+#endif
+
+// <o> NFC_NDEF_RECORD_PARSER_INFO_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef NFC_NDEF_RECORD_PARSER_INFO_COLOR
+#define NFC_NDEF_RECORD_PARSER_INFO_COLOR 0
+#endif
+
+// </e>
+
+// </e>
+
+// <q> NFC_NDEF_TEXT_RECORD_ENABLED  - nfc_text_rec - Encoding data for a text record for NFC Tag
+ 
+
+#ifndef NFC_NDEF_TEXT_RECORD_ENABLED
+#define NFC_NDEF_TEXT_RECORD_ENABLED 0
+#endif
+
+// <q> NFC_NDEF_URI_MSG_ENABLED  - nfc_uri_msg - Encoding data for NDEF message with URI record for NFC Tag
+ 
+
+#ifndef NFC_NDEF_URI_MSG_ENABLED
+#define NFC_NDEF_URI_MSG_ENABLED 0
+#endif
+
+// <q> NFC_NDEF_URI_REC_ENABLED  - nfc_uri_rec - Encoding data for a URI record for NFC Tag
+ 
+
+#ifndef NFC_NDEF_URI_REC_ENABLED
+#define NFC_NDEF_URI_REC_ENABLED 0
+#endif
+
+// <e> NFC_PLATFORM_ENABLED - nfc_platform - NFC platform module for Clock control.
+//==========================================================
+#ifndef NFC_PLATFORM_ENABLED
+#define NFC_PLATFORM_ENABLED 0
+#endif
+// <e> NFC_PLATFORM_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef NFC_PLATFORM_LOG_ENABLED
+#define NFC_PLATFORM_LOG_ENABLED 0
+#endif
+// <o> NFC_PLATFORM_LOG_LEVEL  - Default Severity level
+ 
+// <0=> Off 
+// <1=> Error 
+// <2=> Warning 
+// <3=> Info 
+// <4=> Debug 
+
+#ifndef NFC_PLATFORM_LOG_LEVEL
+#define NFC_PLATFORM_LOG_LEVEL 3
+#endif
+
+// <o> NFC_PLATFORM_INFO_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef NFC_PLATFORM_INFO_COLOR
+#define NFC_PLATFORM_INFO_COLOR 0
+#endif
+
+// <o> NFC_PLATFORM_DEBUG_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef NFC_PLATFORM_DEBUG_COLOR
+#define NFC_PLATFORM_DEBUG_COLOR 0
+#endif
+
+// </e>
+
+// </e>
+
+// <e> NFC_T2T_PARSER_ENABLED - nfc_type_2_tag_parser - Parser for decoding Type 2 Tag data
+//==========================================================
+#ifndef NFC_T2T_PARSER_ENABLED
+#define NFC_T2T_PARSER_ENABLED 0
+#endif
+// <e> NFC_T2T_PARSER_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef NFC_T2T_PARSER_LOG_ENABLED
+#define NFC_T2T_PARSER_LOG_ENABLED 0
+#endif
+// <o> NFC_T2T_PARSER_LOG_LEVEL  - Default Severity level
+ 
+// <0=> Off 
+// <1=> Error 
+// <2=> Warning 
+// <3=> Info 
+// <4=> Debug 
+
+#ifndef NFC_T2T_PARSER_LOG_LEVEL
+#define NFC_T2T_PARSER_LOG_LEVEL 3
+#endif
+
+// <o> NFC_T2T_PARSER_INFO_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef NFC_T2T_PARSER_INFO_COLOR
+#define NFC_T2T_PARSER_INFO_COLOR 0
+#endif
+
+// </e>
+
+// </e>
+
+// <e> NFC_T4T_APDU_ENABLED - nfc_t4t_apdu - APDU encoder/decoder for Type 4 Tag
+//==========================================================
+#ifndef NFC_T4T_APDU_ENABLED
+#define NFC_T4T_APDU_ENABLED 0
+#endif
+// <e> NFC_T4T_APDU_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef NFC_T4T_APDU_LOG_ENABLED
+#define NFC_T4T_APDU_LOG_ENABLED 0
+#endif
+// <o> NFC_T4T_APDU_LOG_LEVEL  - Default Severity level
+ 
+// <0=> Off 
+// <1=> Error 
+// <2=> Warning 
+// <3=> Info 
+// <4=> Debug 
+
+#ifndef NFC_T4T_APDU_LOG_LEVEL
+#define NFC_T4T_APDU_LOG_LEVEL 3
+#endif
+
+// <o> NFC_T4T_APDU_LOG_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef NFC_T4T_APDU_LOG_COLOR
+#define NFC_T4T_APDU_LOG_COLOR 0
+#endif
+
+// </e>
+
+// </e>
+
+// <e> NFC_T4T_CC_FILE_PARSER_ENABLED - nfc_t4t_cc_file - Capability Container file for Type 4 Tag
+//==========================================================
+#ifndef NFC_T4T_CC_FILE_PARSER_ENABLED
+#define NFC_T4T_CC_FILE_PARSER_ENABLED 0
+#endif
+// <e> NFC_T4T_CC_FILE_PARSER_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef NFC_T4T_CC_FILE_PARSER_LOG_ENABLED
+#define NFC_T4T_CC_FILE_PARSER_LOG_ENABLED 0
+#endif
+// <o> NFC_T4T_CC_FILE_PARSER_LOG_LEVEL  - Default Severity level
+ 
+// <0=> Off 
+// <1=> Error 
+// <2=> Warning 
+// <3=> Info 
+// <4=> Debug 
+
+#ifndef NFC_T4T_CC_FILE_PARSER_LOG_LEVEL
+#define NFC_T4T_CC_FILE_PARSER_LOG_LEVEL 3
+#endif
+
+// <o> NFC_T4T_CC_FILE_PARSER_INFO_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef NFC_T4T_CC_FILE_PARSER_INFO_COLOR
+#define NFC_T4T_CC_FILE_PARSER_INFO_COLOR 0
+#endif
+
+// </e>
+
+// </e>
+
+// <e> NFC_T4T_HL_DETECTION_PROCEDURES_ENABLED - nfc_t4t_hl_detection_procedures - NDEF Detection Procedure for Type 4 Tag
+//==========================================================
+#ifndef NFC_T4T_HL_DETECTION_PROCEDURES_ENABLED
+#define NFC_T4T_HL_DETECTION_PROCEDURES_ENABLED 0
+#endif
+// <e> NFC_T4T_HL_DETECTION_PROCEDURES_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef NFC_T4T_HL_DETECTION_PROCEDURES_LOG_ENABLED
+#define NFC_T4T_HL_DETECTION_PROCEDURES_LOG_ENABLED 0
+#endif
+// <o> NFC_T4T_HL_DETECTION_PROCEDURES_LOG_LEVEL  - Default Severity level
+ 
+// <0=> Off 
+// <1=> Error 
+// <2=> Warning 
+// <3=> Info 
+// <4=> Debug 
+
+#ifndef NFC_T4T_HL_DETECTION_PROCEDURES_LOG_LEVEL
+#define NFC_T4T_HL_DETECTION_PROCEDURES_LOG_LEVEL 3
+#endif
+
+// <o> NFC_T4T_HL_DETECTION_PROCEDURES_INFO_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef NFC_T4T_HL_DETECTION_PROCEDURES_INFO_COLOR
+#define NFC_T4T_HL_DETECTION_PROCEDURES_INFO_COLOR 0
+#endif
+
+// </e>
+
+// <o> APDU_BUFF_SIZE - Size (in bytes) of the buffer for APDU storage 
+#ifndef APDU_BUFF_SIZE
+#define APDU_BUFF_SIZE 250
+#endif
+
+// <o> CC_STORAGE_BUFF_SIZE - Size (in bytes) of the buffer for CC file storage 
+#ifndef CC_STORAGE_BUFF_SIZE
+#define CC_STORAGE_BUFF_SIZE 64
+#endif
+
+// </e>
+
+// <e> NFC_T4T_TLV_BLOCK_PARSER_ENABLED - nfc_t4t_tlv_block - TLV block for Type 4 Tag
+//==========================================================
+#ifndef NFC_T4T_TLV_BLOCK_PARSER_ENABLED
+#define NFC_T4T_TLV_BLOCK_PARSER_ENABLED 0
+#endif
+// <e> NFC_T4T_TLV_BLOCK_PARSER_LOG_ENABLED - Enables logging in the module.
+//==========================================================
+#ifndef NFC_T4T_TLV_BLOCK_PARSER_LOG_ENABLED
+#define NFC_T4T_TLV_BLOCK_PARSER_LOG_ENABLED 0
+#endif
+// <o> NFC_T4T_TLV_BLOCK_PARSER_LOG_LEVEL  - Default Severity level
+ 
+// <0=> Off 
+// <1=> Error 
+// <2=> Warning 
+// <3=> Info 
+// <4=> Debug 
+
+#ifndef NFC_T4T_TLV_BLOCK_PARSER_LOG_LEVEL
+#define NFC_T4T_TLV_BLOCK_PARSER_LOG_LEVEL 3
+#endif
+
+// <o> NFC_T4T_TLV_BLOCK_PARSER_INFO_COLOR  - ANSI escape code prefix.
+ 
+// <0=> Default 
+// <1=> Black 
+// <2=> Red 
+// <3=> Green 
+// <4=> Yellow 
+// <5=> Blue 
+// <6=> Magenta 
+// <7=> Cyan 
+// <8=> White 
+
+#ifndef NFC_T4T_TLV_BLOCK_PARSER_INFO_COLOR
+#define NFC_T4T_TLV_BLOCK_PARSER_INFO_COLOR 0
+#endif
+
+// </e>
+
+// </e>
+
+// </h> 
+//==========================================================
+
+// <h> nRF_Segger_RTT 
+
+//==========================================================
+// <h> segger_rtt - SEGGER RTT
+
+//==========================================================
+// <o> SEGGER_RTT_CONFIG_BUFFER_SIZE_UP - Size of upstream buffer. 
+// <i> Note that either @ref NRF_LOG_BACKEND_RTT_OUTPUT_BUFFER_SIZE
+// <i> or this value is actually used. It depends on which one is bigger.
+
+#ifndef SEGGER_RTT_CONFIG_BUFFER_SIZE_UP
+#define SEGGER_RTT_CONFIG_BUFFER_SIZE_UP 512
+#endif
+
+// <o> SEGGER_RTT_CONFIG_MAX_NUM_UP_BUFFERS - Maximum number of upstream buffers. 
+#ifndef SEGGER_RTT_CONFIG_MAX_NUM_UP_BUFFERS
+#define SEGGER_RTT_CONFIG_MAX_NUM_UP_BUFFERS 2
+#endif
+
+// <o> SEGGER_RTT_CONFIG_BUFFER_SIZE_DOWN - Size of downstream buffer. 
+#ifndef SEGGER_RTT_CONFIG_BUFFER_SIZE_DOWN
+#define SEGGER_RTT_CONFIG_BUFFER_SIZE_DOWN 16
+#endif
+
+// <o> SEGGER_RTT_CONFIG_MAX_NUM_DOWN_BUFFERS - Maximum number of downstream buffers. 
+#ifndef SEGGER_RTT_CONFIG_MAX_NUM_DOWN_BUFFERS
+#define SEGGER_RTT_CONFIG_MAX_NUM_DOWN_BUFFERS 2
+#endif
+
+// <o> SEGGER_RTT_CONFIG_DEFAULT_MODE  - RTT behavior if the buffer is full.
+ 
+
+// <i> The following modes are supported:
+// <i> - SKIP  - Do not block, output nothing.
+// <i> - TRIM  - Do not block, output as much as fits.
+// <i> - BLOCK - Wait until there is space in the buffer.
+// <0=> SKIP 
+// <1=> TRIM 
+// <2=> BLOCK_IF_FIFO_FULL 
+
+#ifndef SEGGER_RTT_CONFIG_DEFAULT_MODE
+#define SEGGER_RTT_CONFIG_DEFAULT_MODE 0
+#endif
+
+// </h> 
+//==========================================================
+
+// </h> 
+//==========================================================
+
+// <h> nRF_SoftDevice 
+
+//==========================================================
+// <e> NRF_SDH_BLE_ENABLED - nrf_sdh_ble - SoftDevice BLE event handler
+//==========================================================
+#ifndef NRF_SDH_BLE_ENABLED
+#define NRF_SDH_BLE_ENABLED 1
+#endif
+// <h> BLE Stack configuration - Stack configuration parameters
+
+// <i> The SoftDevice handler will configure the stack with these parameters when calling @ref nrf_sdh_ble_default_cfg_set.
+// <i> Other libraries might depend on these values; keep them up-to-date even if you are not explicitely calling @ref nrf_sdh_ble_default_cfg_set.
+//==========================================================
+// <o> NRF_SDH_BLE_GAP_DATA_LENGTH   <27-251> 
+
+
+// <i> Requested BLE GAP data length to be negotiated.
+
+#ifndef NRF_SDH_BLE_GAP_DATA_LENGTH
+#define NRF_SDH_BLE_GAP_DATA_LENGTH 251
+#endif
+
+// <o> NRF_SDH_BLE_PERIPHERAL_LINK_COUNT - Maximum number of peripheral links. 
+#ifndef NRF_SDH_BLE_PERIPHERAL_LINK_COUNT
+#define NRF_SDH_BLE_PERIPHERAL_LINK_COUNT 1
+#endif
+
+// <o> NRF_SDH_BLE_CENTRAL_LINK_COUNT - Maximum number of central links. 
+#ifndef NRF_SDH_BLE_CENTRAL_LINK_COUNT
+#define NRF_SDH_BLE_CENTRAL_LINK_COUNT 0
+#endif
+
+// <o> NRF_SDH_BLE_TOTAL_LINK_COUNT - Total link count. 
+// <i> Maximum number of total concurrent connections using the default configuration.
+
+#ifndef NRF_SDH_BLE_TOTAL_LINK_COUNT
+#define NRF_SDH_BLE_TOTAL_LINK_COUNT 1
+#endif
+
+// <o> NRF_SDH_BLE_GAP_EVENT_LENGTH - GAP event length. 
+// <i> The time set aside for this connection on every connection interval in 1.25 ms units.
+
+#ifndef NRF_SDH_BLE_GAP_EVENT_LENGTH
+#define NRF_SDH_BLE_GAP_EVENT_LENGTH 6
+#endif
+
+// <o> NRF_SDH_BLE_GATT_MAX_MTU_SIZE - Static maximum MTU size. 
+#ifndef NRF_SDH_BLE_GATT_MAX_MTU_SIZE
+#define NRF_SDH_BLE_GATT_MAX_MTU_SIZE 247
+#endif
+
+// <o> NRF_SDH_BLE_GATTS_ATTR_TAB_SIZE - Attribute Table size in bytes. The size must be a multiple of 4. 
+#ifndef NRF_SDH_BLE_GATTS_ATTR_TAB_SIZE
+#define NRF_SDH_BLE_GATTS_ATTR_TAB_SIZE 1408
+#endif
+
+// <o> NRF_SDH_BLE_VS_UUID_COUNT - The number of vendor-specific UUIDs. 
+#ifndef NRF_SDH_BLE_VS_UUID_COUNT
+#define NRF_SDH_BLE_VS_UUID_COUNT 1
+#endif
+
+// <q> NRF_SDH_BLE_SERVICE_CHANGED  - Include the Service Changed characteristic in the Attribute Table.
+ 
+
+#ifndef NRF_SDH_BLE_SERVICE_CHANGED
+#define NRF_SDH_BLE_SERVICE_CHANGED 0
+#endif
+
+// </h> 
+//==========================================================
+
+// <h> BLE Observers - Observers and priority levels
+
+//==========================================================
+// <o> NRF_SDH_BLE_OBSERVER_PRIO_LEVELS - Total number of priority levels for BLE observers. 
+// <i> This setting configures the number of priority levels available for BLE event handlers.
+// <i> The priority level of a handler determines the order in which it receives events, with respect to other handlers.
+
+#ifndef NRF_SDH_BLE_OBSERVER_PRIO_LEVELS
+#define NRF_SDH_BLE_OBSERVER_PRIO_LEVELS 4
+#endif
+
+// <h> BLE Observers priorities - Invididual priorities
+
+//==========================================================
+// <o> BLE_ADV_BLE_OBSERVER_PRIO  
+// <i> Priority with which BLE events are dispatched to the Advertising module.
+
+#ifndef BLE_ADV_BLE_OBSERVER_PRIO
+#define BLE_ADV_BLE_OBSERVER_PRIO 1
+#endif
+
+// <o> BLE_ANCS_C_BLE_OBSERVER_PRIO  
+// <i> Priority with which BLE events are dispatched to the Apple Notification Service Client.
+
+#ifndef BLE_ANCS_C_BLE_OBSERVER_PRIO
+#define BLE_ANCS_C_BLE_OBSERVER_PRIO 2
+#endif
+
+// <o> BLE_ANS_C_BLE_OBSERVER_PRIO  
+// <i> Priority with which BLE events are dispatched to the Alert Notification Service Client.
+
+#ifndef BLE_ANS_C_BLE_OBSERVER_PRIO
+#define BLE_ANS_C_BLE_OBSERVER_PRIO 2
+#endif
+
+// <o> BLE_BAS_BLE_OBSERVER_PRIO  
+// <i> Priority with which BLE events are dispatched to the Battery Service.
+
+#ifndef BLE_BAS_BLE_OBSERVER_PRIO
+#define BLE_BAS_BLE_OBSERVER_PRIO 2
+#endif
+
+// <o> BLE_BAS_C_BLE_OBSERVER_PRIO  
+// <i> Priority with which BLE events are dispatched to the Battery Service Client.
+
+#ifndef BLE_BAS_C_BLE_OBSERVER_PRIO
+#define BLE_BAS_C_BLE_OBSERVER_PRIO 2
+#endif
+
+// <o> BLE_BPS_BLE_OBSERVER_PRIO  
+// <i> Priority with which BLE events are dispatched to the Blood Pressure Service.
+
+#ifndef BLE_BPS_BLE_OBSERVER_PRIO
+#define BLE_BPS_BLE_OBSERVER_PRIO 2
+#endif
+
+// <o> BLE_CONN_PARAMS_BLE_OBSERVER_PRIO  
+// <i> Priority with which BLE events are dispatched to the Connection parameters module.
+
+#ifndef BLE_CONN_PARAMS_BLE_OBSERVER_PRIO
+#define BLE_CONN_PARAMS_BLE_OBSERVER_PRIO 1
+#endif
+
+// <o> BLE_CONN_STATE_BLE_OBSERVER_PRIO  
+// <i> Priority with which BLE events are dispatched to the Connection State module.
+
+#ifndef BLE_CONN_STATE_BLE_OBSERVER_PRIO
+#define BLE_CONN_STATE_BLE_OBSERVER_PRIO 0
+#endif
+
+// <o> BLE_CSCS_BLE_OBSERVER_PRIO  
+// <i> Priority with which BLE events are dispatched to the Cycling Speed and Cadence Service.
+
+#ifndef BLE_CSCS_BLE_OBSERVER_PRIO
+#define BLE_CSCS_BLE_OBSERVER_PRIO 2
+#endif
+
+// <o> BLE_CTS_C_BLE_OBSERVER_PRIO  
+// <i> Priority with which BLE events are dispatched to the Current Time Service Client.
+
+#ifndef BLE_CTS_C_BLE_OBSERVER_PRIO
+#define BLE_CTS_C_BLE_OBSERVER_PRIO 2
+#endif
+
+// <o> BLE_DB_DISC_BLE_OBSERVER_PRIO  
+// <i> Priority with which BLE events are dispatched to the Database Discovery module.
+
+#ifndef BLE_DB_DISC_BLE_OBSERVER_PRIO
+#define BLE_DB_DISC_BLE_OBSERVER_PRIO 1
+#endif
+
+// <o> BLE_DFU_BLE_OBSERVER_PRIO  
+// <i> Priority with which BLE events are dispatched to the DFU Service.
+
+#ifndef BLE_DFU_BLE_OBSERVER_PRIO
+#define BLE_DFU_BLE_OBSERVER_PRIO 2
+#endif
+
+// <o> BLE_DIS_C_BLE_OBSERVER_PRIO  
+// <i> Priority with which BLE events are dispatched to the Device Information Client.
+
+#ifndef BLE_DIS_C_BLE_OBSERVER_PRIO
+#define BLE_DIS_C_BLE_OBSERVER_PRIO 2
+#endif
+
+// <o> BLE_GLS_BLE_OBSERVER_PRIO  
+// <i> Priority with which BLE events are dispatched to the Glucose Service.
+
+#ifndef BLE_GLS_BLE_OBSERVER_PRIO
+#define BLE_GLS_BLE_OBSERVER_PRIO 2
+#endif
+
+// <o> BLE_HIDS_BLE_OBSERVER_PRIO  
+// <i> Priority with which BLE events are dispatched to the Human Interface Device Service.
+
+#ifndef BLE_HIDS_BLE_OBSERVER_PRIO
+#define BLE_HIDS_BLE_OBSERVER_PRIO 2
+#endif
+
+// <o> BLE_HRS_BLE_OBSERVER_PRIO  
+// <i> Priority with which BLE events are dispatched to the Heart Rate Service.
+
+#ifndef BLE_HRS_BLE_OBSERVER_PRIO
+#define BLE_HRS_BLE_OBSERVER_PRIO 2
+#endif
+
+// <o> BLE_HRS_C_BLE_OBSERVER_PRIO  
+// <i> Priority with which BLE events are dispatched to the Heart Rate Service Client.
+
+#ifndef BLE_HRS_C_BLE_OBSERVER_PRIO
+#define BLE_HRS_C_BLE_OBSERVER_PRIO 2
+#endif
+
+// <o> BLE_HTS_BLE_OBSERVER_PRIO  
+// <i> Priority with which BLE events are dispatched to the Health Thermometer Service.
+
+#ifndef BLE_HTS_BLE_OBSERVER_PRIO
+#define BLE_HTS_BLE_OBSERVER_PRIO 2
+#endif
+
+// <o> BLE_IAS_BLE_OBSERVER_PRIO  
+// <i> Priority with which BLE events are dispatched to the Immediate Alert Service.
+
+#ifndef BLE_IAS_BLE_OBSERVER_PRIO
+#define BLE_IAS_BLE_OBSERVER_PRIO 2
+#endif
+
+// <o> BLE_IAS_C_BLE_OBSERVER_PRIO  
+// <i> Priority with which BLE events are dispatched to the Immediate Alert Service Client.
+
+#ifndef BLE_IAS_C_BLE_OBSERVER_PRIO
+#define BLE_IAS_C_BLE_OBSERVER_PRIO 2
+#endif
+
+// <o> BLE_LBS_BLE_OBSERVER_PRIO  
+// <i> Priority with which BLE events are dispatched to the LED Button Service.
+
+#ifndef BLE_LBS_BLE_OBSERVER_PRIO
+#define BLE_LBS_BLE_OBSERVER_PRIO 2
+#endif
+
+// <o> BLE_LBS_C_BLE_OBSERVER_PRIO  
+// <i> Priority with which BLE events are dispatched to the LED Button Service Client.
+
+#ifndef BLE_LBS_C_BLE_OBSERVER_PRIO
+#define BLE_LBS_C_BLE_OBSERVER_PRIO 2
+#endif
+
+// <o> BLE_LLS_BLE_OBSERVER_PRIO  
+// <i> Priority with which BLE events are dispatched to the Link Loss Service.
+
+#ifndef BLE_LLS_BLE_OBSERVER_PRIO
+#define BLE_LLS_BLE_OBSERVER_PRIO 2
+#endif
+
+// <o> BLE_LNS_BLE_OBSERVER_PRIO  
+// <i> Priority with which BLE events are dispatched to the Location Navigation Service.
+
+#ifndef BLE_LNS_BLE_OBSERVER_PRIO
+#define BLE_LNS_BLE_OBSERVER_PRIO 2
+#endif
+
+// <o> BLE_NUS_BLE_OBSERVER_PRIO  
+// <i> Priority with which BLE events are dispatched to the UART Service.
+
+#ifndef BLE_NUS_BLE_OBSERVER_PRIO
+#define BLE_NUS_BLE_OBSERVER_PRIO 2
+#endif
+
+// <o> BLE_NUS_C_BLE_OBSERVER_PRIO  
+// <i> Priority with which BLE events are dispatched to the UART Central Service.
+
+#ifndef BLE_NUS_C_BLE_OBSERVER_PRIO
+#define BLE_NUS_C_BLE_OBSERVER_PRIO 2
+#endif
+
+// <o> BLE_OTS_BLE_OBSERVER_PRIO  
+// <i> Priority with which BLE events are dispatched to the Object transfer service.
+
+#ifndef BLE_OTS_BLE_OBSERVER_PRIO
+#define BLE_OTS_BLE_OBSERVER_PRIO 2
+#endif
+
+// <o> BLE_OTS_C_BLE_OBSERVER_PRIO  
+// <i> Priority with which BLE events are dispatched to the Object transfer service client.
+
+#ifndef BLE_OTS_C_BLE_OBSERVER_PRIO
+#define BLE_OTS_C_BLE_OBSERVER_PRIO 2
+#endif
+
+// <o> BLE_RSCS_BLE_OBSERVER_PRIO  
+// <i> Priority with which BLE events are dispatched to the Running Speed and Cadence Service.
+
+#ifndef BLE_RSCS_BLE_OBSERVER_PRIO
+#define BLE_RSCS_BLE_OBSERVER_PRIO 2
+#endif
+
+// <o> BLE_RSCS_C_BLE_OBSERVER_PRIO  
+// <i> Priority with which BLE events are dispatched to the Running Speed and Cadence Client.
+
+#ifndef BLE_RSCS_C_BLE_OBSERVER_PRIO
+#define BLE_RSCS_C_BLE_OBSERVER_PRIO 2
+#endif
+
+// <o> BLE_TPS_BLE_OBSERVER_PRIO  
+// <i> Priority with which BLE events are dispatched to the TX Power Service.
+
+#ifndef BLE_TPS_BLE_OBSERVER_PRIO
+#define BLE_TPS_BLE_OBSERVER_PRIO 2
+#endif
+
+// <o> BSP_BTN_BLE_OBSERVER_PRIO  
+// <i> Priority with which BLE events are dispatched to the Button Control module.
+
+#ifndef BSP_BTN_BLE_OBSERVER_PRIO
+#define BSP_BTN_BLE_OBSERVER_PRIO 1
+#endif
+
+// <o> NFC_BLE_PAIR_LIB_BLE_OBSERVER_PRIO  
+// <i> Priority with which BLE events are dispatched to the NFC pairing library.
+
+#ifndef NFC_BLE_PAIR_LIB_BLE_OBSERVER_PRIO
+#define NFC_BLE_PAIR_LIB_BLE_OBSERVER_PRIO 1
+#endif
+
+// <o> NFC_BLE_PAIR_LIB_BLE_OBSERVER_PRIO  
+// <i> Priority with which BLE events are dispatched to the NFC pairing library.
+
+#ifndef NFC_BLE_PAIR_LIB_BLE_OBSERVER_PRIO
+#define NFC_BLE_PAIR_LIB_BLE_OBSERVER_PRIO 1
+#endif
+
+// <o> NFC_BLE_PAIR_LIB_BLE_OBSERVER_PRIO  
+// <i> Priority with which BLE events are dispatched to the NFC pairing library.
+
+#ifndef NFC_BLE_PAIR_LIB_BLE_OBSERVER_PRIO
+#define NFC_BLE_PAIR_LIB_BLE_OBSERVER_PRIO 1
+#endif
+
+// <o> NFC_BLE_PAIR_LIB_BLE_OBSERVER_PRIO  
+// <i> Priority with which BLE events are dispatched to the NFC pairing library.
+
+#ifndef NFC_BLE_PAIR_LIB_BLE_OBSERVER_PRIO
+#define NFC_BLE_PAIR_LIB_BLE_OBSERVER_PRIO 1
+#endif
+
+// <o> NFC_BLE_PAIR_LIB_BLE_OBSERVER_PRIO  
+// <i> Priority with which BLE events are dispatched to the NFC pairing library.
+
+#ifndef NFC_BLE_PAIR_LIB_BLE_OBSERVER_PRIO
+#define NFC_BLE_PAIR_LIB_BLE_OBSERVER_PRIO 1
+#endif
+
+// <o> NFC_BLE_PAIR_LIB_BLE_OBSERVER_PRIO  
+// <i> Priority with which BLE events are dispatched to the NFC pairing library.
+
+#ifndef NFC_BLE_PAIR_LIB_BLE_OBSERVER_PRIO
+#define NFC_BLE_PAIR_LIB_BLE_OBSERVER_PRIO 1
+#endif
+
+// <o> NFC_BLE_PAIR_LIB_BLE_OBSERVER_PRIO  
+// <i> Priority with which BLE events are dispatched to the NFC pairing library.
+
+#ifndef NFC_BLE_PAIR_LIB_BLE_OBSERVER_PRIO
+#define NFC_BLE_PAIR_LIB_BLE_OBSERVER_PRIO 1
+#endif
+
+// <o> NFC_BLE_PAIR_LIB_BLE_OBSERVER_PRIO  
+// <i> Priority with which BLE events are dispatched to the NFC pairing library.
+
+#ifndef NFC_BLE_PAIR_LIB_BLE_OBSERVER_PRIO
+#define NFC_BLE_PAIR_LIB_BLE_OBSERVER_PRIO 1
+#endif
+
+// <o> NFC_BLE_PAIR_LIB_BLE_OBSERVER_PRIO  
+// <i> Priority with which BLE events are dispatched to the NFC pairing library.
+
+#ifndef NFC_BLE_PAIR_LIB_BLE_OBSERVER_PRIO
+#define NFC_BLE_PAIR_LIB_BLE_OBSERVER_PRIO 1
+#endif
+
+// <o> NFC_BLE_PAIR_LIB_BLE_OBSERVER_PRIO  
+// <i> Priority with which BLE events are dispatched to the NFC pairing library.
+
+#ifndef NFC_BLE_PAIR_LIB_BLE_OBSERVER_PRIO
+#define NFC_BLE_PAIR_LIB_BLE_OBSERVER_PRIO 1
+#endif
+
+// <o> NFC_BLE_PAIR_LIB_BLE_OBSERVER_PRIO  
+// <i> Priority with which BLE events are dispatched to the NFC pairing library.
+
+#ifndef NFC_BLE_PAIR_LIB_BLE_OBSERVER_PRIO
+#define NFC_BLE_PAIR_LIB_BLE_OBSERVER_PRIO 1
+#endif
+
+// <o> NFC_BLE_PAIR_LIB_BLE_OBSERVER_PRIO  
+// <i> Priority with which BLE events are dispatched to the NFC pairing library.
+
+#ifndef NFC_BLE_PAIR_LIB_BLE_OBSERVER_PRIO
+#define NFC_BLE_PAIR_LIB_BLE_OBSERVER_PRIO 1
+#endif
+
+// <o> NFC_BLE_PAIR_LIB_BLE_OBSERVER_PRIO  
+// <i> Priority with which BLE events are dispatched to the NFC pairing library.
+
+#ifndef NFC_BLE_PAIR_LIB_BLE_OBSERVER_PRIO
+#define NFC_BLE_PAIR_LIB_BLE_OBSERVER_PRIO 1
+#endif
+
+// <o> NFC_BLE_PAIR_LIB_BLE_OBSERVER_PRIO  
+// <i> Priority with which BLE events are dispatched to the NFC pairing library.
+
+#ifndef NFC_BLE_PAIR_LIB_BLE_OBSERVER_PRIO
+#define NFC_BLE_PAIR_LIB_BLE_OBSERVER_PRIO 1
+#endif
+
+// <o> NFC_BLE_PAIR_LIB_BLE_OBSERVER_PRIO  
+// <i> Priority with which BLE events are dispatched to the NFC pairing library.
+
+#ifndef NFC_BLE_PAIR_LIB_BLE_OBSERVER_PRIO
+#define NFC_BLE_PAIR_LIB_BLE_OBSERVER_PRIO 1
+#endif
+
+// <o> NRF_BLE_BMS_BLE_OBSERVER_PRIO  
+// <i> Priority with which BLE events are dispatched to the Bond Management Service.
+
+#ifndef NRF_BLE_BMS_BLE_OBSERVER_PRIO
+#define NRF_BLE_BMS_BLE_OBSERVER_PRIO 2
+#endif
+
+// <o> NRF_BLE_CGMS_BLE_OBSERVER_PRIO  
+// <i> Priority with which BLE events are dispatched to the Contiuon Glucose Monitoring Service.
+
+#ifndef NRF_BLE_CGMS_BLE_OBSERVER_PRIO
+#define NRF_BLE_CGMS_BLE_OBSERVER_PRIO 2
+#endif
+
+// <o> NRF_BLE_ES_BLE_OBSERVER_PRIO  
+// <i> Priority with which BLE events are dispatched to the Eddystone module.
+
+#ifndef NRF_BLE_ES_BLE_OBSERVER_PRIO
+#define NRF_BLE_ES_BLE_OBSERVER_PRIO 2
+#endif
+
+// <o> NRF_BLE_GATTS_C_BLE_OBSERVER_PRIO  
+// <i> Priority with which BLE events are dispatched to the GATT Service Client.
+
+#ifndef NRF_BLE_GATTS_C_BLE_OBSERVER_PRIO
+#define NRF_BLE_GATTS_C_BLE_OBSERVER_PRIO 2
+#endif
+
+// <o> NRF_BLE_GATT_BLE_OBSERVER_PRIO  
+// <i> Priority with which BLE events are dispatched to the GATT module.
+
+#ifndef NRF_BLE_GATT_BLE_OBSERVER_PRIO
+#define NRF_BLE_GATT_BLE_OBSERVER_PRIO 1
+#endif
+
+// <o> NRF_BLE_GQ_BLE_OBSERVER_PRIO  
+// <i> Priority with which BLE events are dispatched to the GATT Queue module.
+
+#ifndef NRF_BLE_GQ_BLE_OBSERVER_PRIO
+#define NRF_BLE_GQ_BLE_OBSERVER_PRIO 1
+#endif
+
+// <o> NRF_BLE_QWR_BLE_OBSERVER_PRIO  
+// <i> Priority with which BLE events are dispatched to the Queued writes module.
+
+#ifndef NRF_BLE_QWR_BLE_OBSERVER_PRIO
+#define NRF_BLE_QWR_BLE_OBSERVER_PRIO 2
+#endif
+
+// <o> NRF_BLE_SCAN_OBSERVER_PRIO  
+// <i> Priority for dispatching the BLE events to the Scanning Module.
+
+#ifndef NRF_BLE_SCAN_OBSERVER_PRIO
+#define NRF_BLE_SCAN_OBSERVER_PRIO 1
+#endif
+
+// <o> PM_BLE_OBSERVER_PRIO - Priority with which BLE events are dispatched to the Peer Manager module. 
+#ifndef PM_BLE_OBSERVER_PRIO
+#define PM_BLE_OBSERVER_PRIO 1
+#endif
+
+// </h> 
+//==========================================================
+
+// </h> 
+//==========================================================
+
+
+// </e>
+
+// <e> NRF_SDH_ENABLED - nrf_sdh - SoftDevice handler
+//==========================================================
+#ifndef NRF_SDH_ENABLED
+#define NRF_SDH_ENABLED 1
+#endif
+// <h> Dispatch model 
+
+// <i> This setting configures how Stack events are dispatched to the application.
+//==========================================================
+// <o> NRF_SDH_DISPATCH_MODEL
+ 
+
+// <i> NRF_SDH_DISPATCH_MODEL_INTERRUPT: SoftDevice events are passed to the application from the interrupt context.
+// <i> NRF_SDH_DISPATCH_MODEL_APPSH: SoftDevice events are scheduled using @ref app_scheduler.
+// <i> NRF_SDH_DISPATCH_MODEL_POLLING: SoftDevice events are to be fetched manually.
+// <0=> NRF_SDH_DISPATCH_MODEL_INTERRUPT 
+// <1=> NRF_SDH_DISPATCH_MODEL_APPSH 
+// <2=> NRF_SDH_DISPATCH_MODEL_POLLING 
+
+#ifndef NRF_SDH_DISPATCH_MODEL
+#define NRF_SDH_DISPATCH_MODEL 0
+#endif
+
+// </h> 
+//==========================================================
+
+// <h> Clock - SoftDevice clock configuration
+
+//==========================================================
+// <o> NRF_SDH_CLOCK_LF_SRC  - SoftDevice clock source.
+ 
+// <0=> NRF_CLOCK_LF_SRC_RC 
+// <1=> NRF_CLOCK_LF_SRC_XTAL 
+// <2=> NRF_CLOCK_LF_SRC_SYNTH 
+
+#ifndef NRF_SDH_CLOCK_LF_SRC
+#define NRF_SDH_CLOCK_LF_SRC 1
+#endif
+
+// <o> NRF_SDH_CLOCK_LF_RC_CTIV - SoftDevice calibration timer interval. 
+#ifndef NRF_SDH_CLOCK_LF_RC_CTIV
+#define NRF_SDH_CLOCK_LF_RC_CTIV 0
+#endif
+
+// <o> NRF_SDH_CLOCK_LF_RC_TEMP_CTIV - SoftDevice calibration timer interval under constant temperature. 
+// <i> How often (in number of calibration intervals) the RC oscillator shall be calibrated
+// <i>  if the temperature has not changed.
+
+#ifndef NRF_SDH_CLOCK_LF_RC_TEMP_CTIV
+#define NRF_SDH_CLOCK_LF_RC_TEMP_CTIV 0
+#endif
+
+// <o> NRF_SDH_CLOCK_LF_ACCURACY  - External clock accuracy used in the LL to compute timing.
+ 
+// <0=> NRF_CLOCK_LF_ACCURACY_250_PPM 
+// <1=> NRF_CLOCK_LF_ACCURACY_500_PPM 
+// <2=> NRF_CLOCK_LF_ACCURACY_150_PPM 
+// <3=> NRF_CLOCK_LF_ACCURACY_100_PPM 
+// <4=> NRF_CLOCK_LF_ACCURACY_75_PPM 
+// <5=> NRF_CLOCK_LF_ACCURACY_50_PPM 
+// <6=> NRF_CLOCK_LF_ACCURACY_30_PPM 
+// <7=> NRF_CLOCK_LF_ACCURACY_20_PPM 
+// <8=> NRF_CLOCK_LF_ACCURACY_10_PPM 
+// <9=> NRF_CLOCK_LF_ACCURACY_5_PPM 
+// <10=> NRF_CLOCK_LF_ACCURACY_2_PPM 
+// <11=> NRF_CLOCK_LF_ACCURACY_1_PPM 
+
+#ifndef NRF_SDH_CLOCK_LF_ACCURACY
+#define NRF_SDH_CLOCK_LF_ACCURACY 7
+#endif
+
+// </h> 
+//==========================================================
+
+// <h> SDH Observers - Observers and priority levels
+
+//==========================================================
+// <o> NRF_SDH_REQ_OBSERVER_PRIO_LEVELS - Total number of priority levels for request observers. 
+// <i> This setting configures the number of priority levels available for the SoftDevice request event handlers.
+// <i> The priority level of a handler determines the order in which it receives events, with respect to other handlers.
+
+#ifndef NRF_SDH_REQ_OBSERVER_PRIO_LEVELS
+#define NRF_SDH_REQ_OBSERVER_PRIO_LEVELS 2
+#endif
+
+// <o> NRF_SDH_STATE_OBSERVER_PRIO_LEVELS - Total number of priority levels for state observers. 
+// <i> This setting configures the number of priority levels available for the SoftDevice state event handlers.
+// <i> The priority level of a handler determines the order in which it receives events, with respect to other handlers.
+
+#ifndef NRF_SDH_STATE_OBSERVER_PRIO_LEVELS
+#define NRF_SDH_STATE_OBSERVER_PRIO_LEVELS 2
+#endif
+
+// <o> NRF_SDH_STACK_OBSERVER_PRIO_LEVELS - Total number of priority levels for stack event observers. 
+// <i> This setting configures the number of priority levels available for the SoftDevice stack event handlers (ANT, BLE, SoC).
+// <i> The priority level of a handler determines the order in which it receives events, with respect to other handlers.
+
+#ifndef NRF_SDH_STACK_OBSERVER_PRIO_LEVELS
+#define NRF_SDH_STACK_OBSERVER_PRIO_LEVELS 2
+#endif
+
+
+// <h> State Observers priorities - Invididual priorities
+
+//==========================================================
+// <o> CLOCK_CONFIG_STATE_OBSERVER_PRIO  
+// <i> Priority with which state events are dispatched to the Clock driver.
+
+#ifndef CLOCK_CONFIG_STATE_OBSERVER_PRIO
+#define CLOCK_CONFIG_STATE_OBSERVER_PRIO 0
+#endif
+
+// <o> POWER_CONFIG_STATE_OBSERVER_PRIO  
+// <i> Priority with which state events are dispatched to the Power driver.
+
+#ifndef POWER_CONFIG_STATE_OBSERVER_PRIO
+#define POWER_CONFIG_STATE_OBSERVER_PRIO 0
+#endif
+
+// <o> RNG_CONFIG_STATE_OBSERVER_PRIO  
+// <i> Priority with which state events are dispatched to this module.
+
+#ifndef RNG_CONFIG_STATE_OBSERVER_PRIO
+#define RNG_CONFIG_STATE_OBSERVER_PRIO 0
+#endif
+
+// </h> 
+//==========================================================
+
+// <h> Stack Event Observers priorities - Invididual priorities
+
+//==========================================================
+// <o> NRF_SDH_ANT_STACK_OBSERVER_PRIO  
+// <i> This setting configures the priority with which ANT events are processed with respect to other events coming from the stack.
+// <i> Modify this setting if you need to have ANT events dispatched before or after other stack events, such as BLE or SoC.
+// <i> Zero is the highest priority.
+
+#ifndef NRF_SDH_ANT_STACK_OBSERVER_PRIO
+#define NRF_SDH_ANT_STACK_OBSERVER_PRIO 0
+#endif
+
+// <o> NRF_SDH_BLE_STACK_OBSERVER_PRIO  
+// <i> This setting configures the priority with which BLE events are processed with respect to other events coming from the stack.
+// <i> Modify this setting if you need to have BLE events dispatched before or after other stack events, such as ANT or SoC.
+// <i> Zero is the highest priority.
+
+#ifndef NRF_SDH_BLE_STACK_OBSERVER_PRIO
+#define NRF_SDH_BLE_STACK_OBSERVER_PRIO 0
+#endif
+
+// <o> NRF_SDH_SOC_STACK_OBSERVER_PRIO  
+// <i> This setting configures the priority with which SoC events are processed with respect to other events coming from the stack.
+// <i> Modify this setting if you need to have SoC events dispatched before or after other stack events, such as ANT or BLE.
+// <i> Zero is the highest priority.
+
+#ifndef NRF_SDH_SOC_STACK_OBSERVER_PRIO
+#define NRF_SDH_SOC_STACK_OBSERVER_PRIO 0
+#endif
+
+// </h> 
+//==========================================================
+
+// </h> 
+//==========================================================
+
+
+// </e>
+
+// <e> NRF_SDH_SOC_ENABLED - nrf_sdh_soc - SoftDevice SoC event handler
+//==========================================================
+#ifndef NRF_SDH_SOC_ENABLED
+#define NRF_SDH_SOC_ENABLED 1
+#endif
+// <h> SoC Observers - Observers and priority levels
+
+//==========================================================
+// <o> NRF_SDH_SOC_OBSERVER_PRIO_LEVELS - Total number of priority levels for SoC observers. 
+// <i> This setting configures the number of priority levels available for the SoC event handlers.
+// <i> The priority level of a handler determines the order in which it receives events, with respect to other handlers.
+
+#ifndef NRF_SDH_SOC_OBSERVER_PRIO_LEVELS
+#define NRF_SDH_SOC_OBSERVER_PRIO_LEVELS 2
+#endif
+
+// <h> SoC Observers priorities - Invididual priorities
+
+//==========================================================
+// <o> BLE_DFU_SOC_OBSERVER_PRIO  
+// <i> Priority with which BLE events are dispatched to the DFU Service.
+
+#ifndef BLE_DFU_SOC_OBSERVER_PRIO
+#define BLE_DFU_SOC_OBSERVER_PRIO 1
+#endif
+
+// <o> CLOCK_CONFIG_SOC_OBSERVER_PRIO  
+// <i> Priority with which SoC events are dispatched to the Clock driver.
+
+#ifndef CLOCK_CONFIG_SOC_OBSERVER_PRIO
+#define CLOCK_CONFIG_SOC_OBSERVER_PRIO 0
+#endif
+
+// <o> POWER_CONFIG_SOC_OBSERVER_PRIO  
+// <i> Priority with which SoC events are dispatched to the Power driver.
+
+#ifndef POWER_CONFIG_SOC_OBSERVER_PRIO
+#define POWER_CONFIG_SOC_OBSERVER_PRIO 0
+#endif
+
+// </h> 
+//==========================================================
+
+// </h> 
+//==========================================================
+
+
+// </e>
+
+// </h> 
+//==========================================================
+
+// <<< end of configuration section >>>
+#endif //SDK_CONFIG_H
+

smart_shoes/nRF5_SDK_17.0.0_9d13099/examples/Shoes_just_traj_20201208/ble_app_uart_03_link_PC/pca10040/s112/iar/ble_app_uart_iar_nRF5x.icf

@@ -0,0 +1,37 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x19000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__   = 0x19000;
+define symbol __ICFEDIT_region_ROM_end__     = 0x7ffff;
+define symbol __ICFEDIT_region_RAM_start__   = 0x200022c8;
+define symbol __ICFEDIT_region_RAM_end__     = 0x2000ffff;
+export symbol __ICFEDIT_region_RAM_start__;
+export symbol __ICFEDIT_region_RAM_end__;
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__   = 2048;
+define symbol __ICFEDIT_size_heap__     = 2048;
+/**** End of ICF editor section. ###ICF###*/
+
+define memory mem with size = 4G;
+define region ROM_region   = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
+define region RAM_region   = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
+
+
+define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
+define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
+define block RO_END    with alignment = 8, size = 0     { };
+
+initialize by copy { readwrite };
+do not initialize  { section .noinit };
+
+keep { section .intvec };
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+place in ROM_region   { readonly,
+                        block RO_END };
+place in RAM_region   { readwrite,
+                        block CSTACK,
+                        block HEAP };
+

smart_shoes/nRF5_SDK_17.0.0_9d13099/examples/Shoes_just_traj_20201208/ble_app_uart_03_link_PC/pca10040/s112/iar/ble_app_uart_pca10040_s112.ewd

@@ -0,0 +1,1350 @@
+<?xml version="1.0" encoding="iso-8859-1"?>
+
+<project>
+  <fileVersion>2</fileVersion>  <configuration>
+    <name>nrf52832_xxaa</name>
+    <toolchain>
+      <name>ARM</name>
+    </toolchain>
+    <debug>0</debug>
+    <settings>
+      <name>C-SPY</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>26</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>0</debug>
+        <option>
+          <name>CInput</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CEndian</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OCVariant</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>MacOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>MacFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>MemOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>MemFile</name>
+          <state>$TOOLKIT_DIR$\CONFIG\debugger\NordicSemiconductor\iar_nrf52832_xxaa.ddf</state>
+        </option>
+        <option>
+          <name>RunToEnable</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>RunToName</name>
+          <state>main</state>
+        </option>
+        <option>
+          <name>CExtraOptionsCheck</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CExtraOptions</name>
+          <state>--drv_vector_table_base=0x0</state>
+        </option>
+        <option>
+          <name>CFpuProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OCDDFArgumentProducer</name>
+          <state></state>
+        </option>
+        <option>
+          <name>OCDownloadSuppressDownload</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OCDownloadVerifyAll</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OCProductVersion</name>
+          <state>7.20.2.7418</state>
+        </option>
+        <option>
+          <name>OCDynDriverList</name>
+          <state>JLINK_ID</state>
+        </option>
+        <option>
+          <name>OCLastSavedByProductVersion</name>
+          <state>7.20.2.7418</state>
+        </option>
+        <option>
+          <name>OCDownloadAttachToProgram</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>UseFlashLoader</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CLowLevel</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OCBE8Slave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>MacFile2</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CDevice</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>FlashLoadersV3</name>
+          <state>$TOOLKIT_DIR$\config\flashloader\NordicSemiconductor\nrf52832_xxaa.board</state>
+        </option>
+        <option>
+          <name>OCImagesSuppressCheck1</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OCImagesPath1</name>
+          <state></state>
+        </option>
+        <option>
+          <name>OCImagesSuppressCheck2</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OCImagesPath2</name>
+          <state></state>
+        </option>
+        <option>
+          <name>OCImagesSuppressCheck3</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OCImagesPath3</name>
+          <state></state>
+        </option>
+        <option>
+          <name>OverrideDefFlashBoard</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OCImagesOffset1</name>
+          <state></state>
+        </option>
+        <option>
+          <name>OCImagesOffset2</name>
+          <state></state>
+        </option>
+        <option>
+          <name>OCImagesOffset3</name>
+          <state></state>
+        </option>
+        <option>
+          <name>OCImagesUse1</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OCImagesUse2</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OCImagesUse3</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OCDeviceConfigMacroFile</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OCDebuggerExtraOption</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OCAllMTBOptions</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OCMulticoreNrOfCores</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OCMulticoreMaster</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OCMulticorePort</name>
+          <state>53461</state>
+        </option>
+        <option>
+          <name>OCMulticoreWorkspace</name>
+          <state></state>
+        </option>
+        <option>
+          <name>OCMulticoreSlaveProject</name>
+          <state></state>
+        </option>
+        <option>
+          <name>OCMulticoreSlaveConfiguration</name>
+          <state></state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>ARMSIM_ID</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>1</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>0</debug>
+        <option>
+          <name>OCSimDriverInfo</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OCSimEnablePSP</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OCSimPspOverrideConfig</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OCSimPspConfigFile</name>
+          <state></state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>ANGEL_ID</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>0</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>0</debug>
+        <option>
+          <name>CCAngelHeartbeat</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CAngelCommunication</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CAngelCommBaud</name>
+          <version>0</version>
+          <state>3</state>
+        </option>
+        <option>
+          <name>CAngelCommPort</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>ANGELTCPIP</name>
+          <state>aaa.bbb.ccc.ddd</state>
+        </option>
+        <option>
+          <name>DoAngelLogfile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AngelLogFile</name>
+          <state>$PROJ_DIR$\cspycomm.log</state>
+        </option>
+        <option>
+          <name>OCDriverInfo</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>CMSISDAP_ID</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>2</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>0</debug>
+        <option>
+          <name>OCDriverInfo</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CMSISDAPAttachSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OCIarProbeScriptFile</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CMSISDAPResetList</name>
+          <version>1</version>
+          <state>10</state>
+        </option>
+        <option>
+          <name>CMSISDAPHWResetDuration</name>
+          <state>300</state>
+        </option>
+        <option>
+          <name>CMSISDAPHWResetDelay</name>
+          <state>200</state>
+        </option>
+        <option>
+          <name>CMSISDAPDoLogfile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CMSISDAPLogFile</name>
+          <state>$PROJ_DIR$\cspycomm.log</state>
+        </option>
+        <option>
+          <name>CMSISDAPInterfaceRadio</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CMSISDAPInterfaceCmdLine</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CMSISDAPMultiTargetEnable</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CMSISDAPMultiTarget</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CMSISDAPJtagSpeedList</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CMSISDAPBreakpointRadio</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CMSISDAPRestoreBreakpointsCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CMSISDAPUpdateBreakpointsEdit</name>
+          <state>_call_main</state>
+        </option>
+        <option>
+          <name>RDICatchReset</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>RDICatchUndef</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>RDICatchSWI</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>RDICatchData</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>RDICatchPrefetch</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>RDICatchIRQ</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>RDICatchFIQ</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CatchCORERESET</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CatchMMERR</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CatchNOCPERR</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CatchCHKERR</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CatchSTATERR</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CatchBUSERR</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CatchINTERR</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CatchHARDERR</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CatchDummy</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CMSISDAPMultiCPUEnable</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CMSISDAPMultiCPUNumber</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OCProbeCfgOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OCProbeConfig</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CMSISDAPProbeConfigRadio</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CMSISDAPSelectedCPUBehaviour</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>ICpuName</name>
+          <state></state>
+        </option>
+        <option>
+          <name>OCJetEmuParams</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>GDBSERVER_ID</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>0</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>0</debug>
+        <option>
+          <name>OCDriverInfo</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>TCPIP</name>
+          <state>aaa.bbb.ccc.ddd</state>
+        </option>
+        <option>
+          <name>DoLogfile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>LogFile</name>
+          <state>$PROJ_DIR$\cspycomm.log</state>
+        </option>
+        <option>
+          <name>CCJTagBreakpointRadio</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCJTagDoUpdateBreakpoints</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCJTagUpdateBreakpoints</name>
+          <state>_call_main</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>IARROM_ID</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>1</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>0</debug>
+        <option>
+          <name>CRomLogFileCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CRomLogFileEditB</name>
+          <state>$PROJ_DIR$\cspycomm.log</state>
+        </option>
+        <option>
+          <name>CRomCommPort</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CRomCommBaud</name>
+          <version>0</version>
+          <state>7</state>
+        </option>
+        <option>
+          <name>OCDriverInfo</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>IJET_ID</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>3</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>0</debug>
+        <option>
+          <name>OCDriverInfo</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IjetAttachSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OCIarProbeScriptFile</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IjetResetList</name>
+          <version>1</version>
+          <state>10</state>
+        </option>
+        <option>
+          <name>IjetHWResetDuration</name>
+          <state>300</state>
+        </option>
+        <option>
+          <name>IjetHWResetDelay</name>
+          <state>200</state>
+        </option>
+        <option>
+          <name>IjetPowerFromProbe</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IjetPowerRadio</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IjetDoLogfile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IjetLogFile</name>
+          <state>$PROJ_DIR$\cspycomm.log</state>
+        </option>
+        <option>
+          <name>IjetInterfaceRadio</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IjetInterfaceCmdLine</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IjetMultiTargetEnable</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IjetMultiTarget</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IjetScanChainNonARMDevices</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IjetIRLength</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IjetJtagSpeedList</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IjetProtocolRadio</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IjetSwoPin</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IjetCpuClockEdit</name>
+          <state>72.0</state>
+        </option>
+        <option>
+          <name>IjetSwoPrescalerList</name>
+          <version>1</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IjetBreakpointRadio</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IjetRestoreBreakpointsCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IjetUpdateBreakpointsEdit</name>
+          <state>_call_main</state>
+        </option>
+        <option>
+          <name>RDICatchReset</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>RDICatchUndef</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>RDICatchSWI</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>RDICatchData</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>RDICatchPrefetch</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>RDICatchIRQ</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>RDICatchFIQ</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CatchCORERESET</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CatchMMERR</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CatchNOCPERR</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CatchCHKERR</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CatchSTATERR</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CatchBUSERR</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CatchINTERR</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CatchHARDERR</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CatchDummy</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OCProbeCfgOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OCProbeConfig</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IjetProbeConfigRadio</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IjetMultiCPUEnable</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IjetMultiCPUNumber</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IjetSelectedCPUBehaviour</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>ICpuName</name>
+          <state></state>
+        </option>
+        <option>
+          <name>OCJetEmuParams</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>JLINK_ID</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>15</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>0</debug>
+        <option>
+          <name>JLinkSpeed</name>
+          <state>1000</state>
+        </option>
+        <option>
+          <name>CCJLinkDoLogfile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCJLinkLogFile</name>
+          <state>$PROJ_DIR$\cspycomm.log</state>
+        </option>
+        <option>
+          <name>CCJLinkHWResetDelay</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OCDriverInfo</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>JLinkInitialSpeed</name>
+          <state>1000</state>
+        </option>
+        <option>
+          <name>CCDoJlinkMultiTarget</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCScanChainNonARMDevices</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCJLinkMultiTarget</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCJLinkIRLength</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCJLinkCommRadio</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCJLinkTCPIP</name>
+          <state>aaa.bbb.ccc.ddd</state>
+        </option>
+        <option>
+          <name>CCJLinkSpeedRadioV2</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCUSBDevice</name>
+          <version>1</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCRDICatchReset</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCRDICatchUndef</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCRDICatchSWI</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCRDICatchData</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCRDICatchPrefetch</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCRDICatchIRQ</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCRDICatchFIQ</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCJLinkBreakpointRadio</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCJLinkDoUpdateBreakpoints</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCJLinkUpdateBreakpoints</name>
+          <state>_call_main</state>
+        </option>
+        <option>
+          <name>CCJLinkInterfaceRadio</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OCJLinkAttachSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCJLinkResetList</name>
+          <version>6</version>
+          <state>7</state>
+        </option>
+        <option>
+          <name>CCJLinkInterfaceCmdLine</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCatchCORERESET</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCatchMMERR</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCatchNOCPERR</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCatchCHRERR</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCatchSTATERR</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCatchBUSERR</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCatchINTERR</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCatchHARDERR</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCatchDummy</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OCJLinkScriptFile</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCJLinkUsbSerialNo</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCTcpIpAlt</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCJLinkTcpIpSerialNo</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCCpuClockEdit</name>
+          <state>72.0</state>
+        </option>
+        <option>
+          <name>CCSwoClockAuto</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCSwoClockEdit</name>
+          <state>2000</state>
+        </option>
+        <option>
+          <name>OCJLinkTraceSource</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OCJLinkTraceSourceDummy</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OCJLinkDeviceName</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>LMIFTDI_ID</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>2</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>0</debug>
+        <option>
+          <name>OCDriverInfo</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>LmiftdiSpeed</name>
+          <state>500</state>
+        </option>
+        <option>
+          <name>CCLmiftdiDoLogfile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCLmiftdiLogFile</name>
+          <state>$PROJ_DIR$\cspycomm.log</state>
+        </option>
+        <option>
+          <name>CCLmiFtdiInterfaceRadio</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCLmiFtdiInterfaceCmdLine</name>
+          <state>0</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>MACRAIGOR_ID</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>3</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>0</debug>
+        <option>
+          <name>jtag</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>EmuSpeed</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>TCPIP</name>
+          <state>aaa.bbb.ccc.ddd</state>
+        </option>
+        <option>
+          <name>DoLogfile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>LogFile</name>
+          <state>$PROJ_DIR$\cspycomm.log</state>
+        </option>
+        <option>
+          <name>DoEmuMultiTarget</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>EmuMultiTarget</name>
+          <state>0@ARM7TDMI</state>
+        </option>
+        <option>
+          <name>EmuHWReset</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CEmuCommBaud</name>
+          <version>0</version>
+          <state>4</state>
+        </option>
+        <option>
+          <name>CEmuCommPort</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>jtago</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OCDriverInfo</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>UnusedAddr</name>
+          <state>0x00800000</state>
+        </option>
+        <option>
+          <name>CCMacraigorHWResetDelay</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCJTagBreakpointRadio</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCJTagDoUpdateBreakpoints</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCJTagUpdateBreakpoints</name>
+          <state>_call_main</state>
+        </option>
+        <option>
+          <name>CCMacraigorInterfaceRadio</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCMacraigorInterfaceCmdLine</name>
+          <state>0</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>PEMICRO_ID</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>1</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>0</debug>
+        <option>
+          <name>OCDriverInfo</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OCPEMicroAttachSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCPEMicroInterfaceList</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPEMicroResetDelay</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCPEMicroJtagSpeed</name>
+          <state>#UNINITIALIZED#</state>
+        </option>
+        <option>
+          <name>CCJPEMicroShowSettings</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>DoLogfile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>LogFile</name>
+          <state>$PROJ_DIR$\cspycomm.log</state>
+        </option>
+        <option>
+          <name>CCPEMicroUSBDevice</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPEMicroSerialPort</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCJPEMicroTCPIPAutoScanNetwork</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCPEMicroTCPIP</name>
+          <state>10.0.0.1</state>
+        </option>
+        <option>
+          <name>CCPEMicroCommCmdLineProducer</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCSTLinkInterfaceRadio</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCSTLinkInterfaceCmdLine</name>
+          <state>0</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>RDI_ID</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>2</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>0</debug>
+        <option>
+          <name>CRDIDriverDll</name>
+          <state>###Uninitialized###</state>
+        </option>
+        <option>
+          <name>CRDILogFileCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CRDILogFileEdit</name>
+          <state>$PROJ_DIR$\cspycomm.log</state>
+        </option>
+        <option>
+          <name>CCRDIHWReset</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCRDICatchReset</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCRDICatchUndef</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCRDICatchSWI</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCRDICatchData</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCRDICatchPrefetch</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCRDICatchIRQ</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCRDICatchFIQ</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OCDriverInfo</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>STLINK_ID</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>2</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>0</debug>
+        <option>
+          <name>OCDriverInfo</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCSTLinkInterfaceRadio</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCSTLinkInterfaceCmdLine</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCSTLinkResetList</name>
+          <version>1</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCpuClockEdit</name>
+          <state>72.0</state>
+        </option>
+        <option>
+          <name>CCSwoClockAuto</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCSwoClockEdit</name>
+          <state>2000</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>THIRDPARTY_ID</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>0</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>0</debug>
+        <option>
+          <name>CThirdPartyDriverDll</name>
+          <state>###Uninitialized###</state>
+        </option>
+        <option>
+          <name>CThirdPartyLogFileCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CThirdPartyLogFileEditB</name>
+          <state>$PROJ_DIR$\cspycomm.log</state>
+        </option>
+        <option>
+          <name>OCDriverInfo</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>XDS100_ID</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>2</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>0</debug>
+        <option>
+          <name>OCDriverInfo</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OCXDS100AttachSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>TIPackageOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>TIPackage</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCXds100InterfaceList</name>
+          <version>2</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>BoardFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>DoLogfile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>LogFile</name>
+          <state>$PROJ_DIR$\cspycomm.log</state>
+        </option>
+      </data>
+    </settings>
+    <debuggerPlugins>
+      <plugin>
+        <file>$TOOLKIT_DIR$\plugins\middleware\HCCWare\HCCWare.ewplugin</file>
+        <loadFlag>0</loadFlag>
+      </plugin>
+      <plugin>
+        <file>$TOOLKIT_DIR$\plugins\rtos\AVIX\AVIX.ENU.ewplugin</file>
+        <loadFlag>0</loadFlag>
+      </plugin>
+      <plugin>
+        <file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxArmPlugin.ENU.ewplugin</file>
+        <loadFlag>0</loadFlag>
+      </plugin>
+      <plugin>
+        <file>$TOOLKIT_DIR$\plugins\rtos\CMX\CmxTinyArmPlugin.ENU.ewplugin</file>
+        <loadFlag>0</loadFlag>
+      </plugin>
+      <plugin>
+        <file>$TOOLKIT_DIR$\plugins\rtos\embOS\embOSPlugin.ewplugin</file>
+        <loadFlag>0</loadFlag>
+      </plugin>
+      <plugin>
+        <file>$TOOLKIT_DIR$\plugins\rtos\MQX\MQXRtosPlugin.ewplugin</file>
+        <loadFlag>0</loadFlag>
+      </plugin>
+      <plugin>
+        <file>$TOOLKIT_DIR$\plugins\rtos\OpenRTOS\OpenRTOSPlugin.ewplugin</file>
+        <loadFlag>0</loadFlag>
+      </plugin>
+      <plugin>
+        <file>$TOOLKIT_DIR$\plugins\rtos\SafeRTOS\SafeRTOSPlugin.ewplugin</file>
+        <loadFlag>0</loadFlag>
+      </plugin>
+      <plugin>
+        <file>$TOOLKIT_DIR$\plugins\rtos\ThreadX\ThreadXArmPlugin.ENU.ewplugin</file>
+        <loadFlag>0</loadFlag>
+      </plugin>
+      <plugin>
+        <file>$TOOLKIT_DIR$\plugins\rtos\TI-RTOS\tirtosplugin.ewplugin</file>
+        <loadFlag>0</loadFlag>
+      </plugin>
+      <plugin>
+        <file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-286-KA-CSpy.ewplugin</file>
+        <loadFlag>0</loadFlag>
+      </plugin>
+      <plugin>
+        <file>$TOOLKIT_DIR$\plugins\rtos\uCOS-II\uCOS-II-KA-CSpy.ewplugin</file>
+        <loadFlag>0</loadFlag>
+      </plugin>
+      <plugin>
+        <file>$TOOLKIT_DIR$\plugins\rtos\uCOS-III\uCOS-III-KA-CSpy.ewplugin</file>
+        <loadFlag>0</loadFlag>
+      </plugin>
+      <plugin>
+        <file>$EW_DIR$\common\plugins\CodeCoverage\CodeCoverage.ENU.ewplugin</file>
+        <loadFlag>1</loadFlag>
+      </plugin>
+      <plugin>
+        <file>$EW_DIR$\common\plugins\Orti\Orti.ENU.ewplugin</file>
+        <loadFlag>0</loadFlag>
+      </plugin>
+      <plugin>
+        <file>$EW_DIR$\common\plugins\SymList\SymList.ENU.ewplugin</file>
+        <loadFlag>1</loadFlag>
+      </plugin>
+      <plugin>
+        <file>$EW_DIR$\common\plugins\uCProbe\uCProbePlugin.ENU.ewplugin</file>
+        <loadFlag>0</loadFlag>
+      </plugin>
+    </debuggerPlugins>
+  </configuration></project>
+
+

smart_shoes/nRF5_SDK_17.0.0_9d13099/examples/Shoes_just_traj_20201208/ble_app_uart_03_link_PC/pca10040/s112/iar/ble_app_uart_pca10040_s112.ewp

@@ -0,0 +1,1304 @@
+<?xml version="1.0" encoding="iso-8859-1"?>
+
+
+<project>
+  <fileVersion>2</fileVersion>  <configuration>
+    <name>nrf52832_xxaa</name>
+    <toolchain>
+      <name>ARM</name>
+    </toolchain>
+    <debug>0</debug>
+    <settings>
+      <name>General</name>
+      <archiveVersion>3</archiveVersion>
+      <data>
+        <version>22</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>0</debug>
+        <option>
+          <name>ExePath</name>
+          <state>_build</state>
+        </option>
+        <option>
+          <name>ObjPath</name>
+          <state>_build</state>
+        </option>
+        <option>
+          <name>ListPath</name>
+          <state>_build</state>
+        </option>
+        <option>
+          <name>Variant</name>
+          <version>20</version>
+          <state>34</state>
+        </option>
+        <option>
+          <name>GEndianMode</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>Input variant</name>
+          <version>3</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>Input description</name>
+          <state>Full formatting.</state>
+        </option>
+        <option>
+          <name>Output variant</name>
+          <version>2</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>Output description</name>
+          <state>Full formatting.</state>
+        </option>
+        <option>
+          <name>GOutputBinary</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>FPU</name>
+          <version>2</version>
+          <state>5</state>
+        </option>
+        <option>
+          <name>OGCoreOrChip</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelect</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>GRuntimeLibSelectSlave</name>
+          <version>0</version>
+          <state>2</state>
+        </option>
+        <option>
+          <name>RTDescription</name>
+          <state>Use the full configuration of the C/C++ runtime library. Full locale interface, C locale, file descriptor support, multibytes in printf and scanf, and hex floats in strtod.</state>
+        </option>
+        <option>
+          <name>OGProductVersion</name>
+          <state>6.10.3.52260</state>
+        </option>
+        <option>
+          <name>OGLastSavedByProductVersion</name>
+          <state>7.20.2.7418</state>
+        </option>
+        <option>
+          <name>GeneralEnableMisra</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraVerbose</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGChipSelectEditMenu</name>
+          <state>nrf52832_xxaa	nRF52832_xxAA</state>
+        </option>
+        <option>
+          <name>GenLowLevelInterface</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GEndianModeBE</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OGBufferedTerminalOutput</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GenStdoutInterface</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules98</name>
+          <version>0</version>
+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+        </option>
+        <option>
+          <name>GeneralMisraVer</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GeneralMisraRules04</name>
+          <version>0</version>
+          <state>111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111</state>
+        </option>
+        <option>
+          <name>RTConfigPath2</name>
+          <state>$TOOLKIT_DIR$\INC\c\DLib_Config_Full.h</state>
+        </option>
+        <option>
+          <name>GFPUCoreSlave</name>
+          <version>20</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>GBECoreSlave</name>
+          <version>20</version>
+          <state>39</state>
+        </option>
+        <option>
+          <name>OGUseCmsis</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OGUseCmsisDspLib</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>GRuntimeLibThreads</name>
+          <state>0</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>ICCARM</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>31</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>0</debug>
+        <option>
+          <name>CCGuardCalls</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCOptimizationNoSizeConstraints</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDefines</name>
+          <state>APP_TIMER_V2</state>
+          <state>APP_TIMER_V2_RTC1_ENABLED</state>
+          <state>BOARD_PCA10040</state>
+          <state>CONFIG_GPIO_AS_PINRESET</state>
+          <state>FLOAT_ABI_HARD</state>
+          <state>NRF52</state>
+          <state>NRF52832_XXAA</state>
+          <state>NRF52_PAN_74</state>
+          <state>NRF_SD_BLE_API_VERSION=7</state>
+          <state>S112</state>
+          <state>SOFTDEVICE_PRESENT</state>
+        </option>
+        <option>
+          <name>CCPreprocFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPreprocComments</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPreprocLine</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCMnemonics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListCMessages</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListAssFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCListAssSource</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCEnableRemarks</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDiagSuppress</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagRemark</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagWarning</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCDiagError</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CCObjPrefix</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCAllowList</name>
+          <version>1</version>
+          <state>11111110</state>
+        </option>
+        <option>
+          <name>CCDebugInfo</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IEndianMode</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IExtraOptionsCheck</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IExtraOptions</name>
+          <state>--diag_suppress Pe111</state>
+        </option>
+        <option>
+          <name>CCLangConformance</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCSignedPlainChar</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCRequirePrototypes</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCMultibyteSupport</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCDiagWarnAreErr</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCCompilerRuntimeInfo</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IFpuProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OutputFile</name>
+          <state>$FILE_BNAME$.o</state>
+        </option>
+        <option>
+          <name>CCLibConfigHeader</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>PreInclude</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CompilerMisraOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCIncludePath2</name>
+          <state>$PROJ_DIR$\..\..\..\config</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\ble\ble_advertising</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\ble\ble_dtm</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\ble\ble_link_ctx_manager</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\ble\ble_racp</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\ble\ble_services\ble_ancs_c</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\ble\ble_services\ble_ans_c</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\ble\ble_services\ble_bas</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\ble\ble_services\ble_bas_c</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\ble\ble_services\ble_cscs</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\ble\ble_services\ble_cts_c</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\ble\ble_services\ble_dfu</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\ble\ble_services\ble_dis</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\ble\ble_services\ble_gls</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\ble\ble_services\ble_hids</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\ble\ble_services\ble_hrs</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\ble\ble_services\ble_hrs_c</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\ble\ble_services\ble_hts</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\ble\ble_services\ble_ias</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\ble\ble_services\ble_ias_c</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\ble\ble_services\ble_lbs</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\ble\ble_services\ble_lbs_c</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\ble\ble_services\ble_lls</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\ble\ble_services\ble_nus</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\ble\ble_services\ble_nus_c</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\ble\ble_services\ble_rscs</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\ble\ble_services\ble_rscs_c</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\ble\ble_services\ble_tps</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\ble\common</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\ble\nrf_ble_gatt</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\ble\nrf_ble_qwr</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\ble\peer_manager</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\boards</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\atomic</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\atomic_fifo</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\atomic_flags</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\balloc</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\bootloader\ble_dfu</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\bsp</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\button</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\cli</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\crc16</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\crc32</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\crypto</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\csense</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\csense_drv</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\delay</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\ecc</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\experimental_section_vars</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\experimental_task_manager</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\fds</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\fifo</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\fstorage</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\gfx</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\gpiote</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\hardfault</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\hci</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\led_softblink</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\log</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\log\src</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\low_power_pwm</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\mem_manager</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\memobj</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\mpu</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\mutex</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\pwm</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\pwr_mgmt</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\queue</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\ringbuf</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\scheduler</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\sdcard</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\slip</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\sortlist</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\spi_mngr</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\stack_guard</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\strerror</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\svc</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\timer</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\twi_mngr</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\twi_sensor</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\uart</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\usbd</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\usbd\class\audio</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\usbd\class\cdc</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\usbd\class\cdc\acm</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\usbd\class\hid</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\usbd\class\hid\generic</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\usbd\class\hid\kbd</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\usbd\class\hid\mouse</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\usbd\class\msc</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\util</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\nfc\ndef\conn_hand_parser</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\nfc\ndef\conn_hand_parser\ac_rec_parser</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\nfc\ndef\conn_hand_parser\ble_oob_advdata_parser</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\nfc\ndef\conn_hand_parser\le_oob_rec_parser</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\nfc\ndef\connection_handover\ac_rec</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\nfc\ndef\connection_handover\ble_oob_advdata</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\nfc\ndef\connection_handover\ble_pair_lib</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\nfc\ndef\connection_handover\ble_pair_msg</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\nfc\ndef\connection_handover\common</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\nfc\ndef\connection_handover\ep_oob_rec</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\nfc\ndef\connection_handover\hs_rec</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\nfc\ndef\connection_handover\le_oob_rec</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\nfc\ndef\generic\message</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\nfc\ndef\generic\record</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\nfc\ndef\launchapp</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\nfc\ndef\parser\message</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\nfc\ndef\parser\record</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\nfc\ndef\text</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\nfc\ndef\uri</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\nfc\platform</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\nfc\t2t_lib</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\nfc\t2t_parser</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\nfc\t4t_lib</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\nfc\t4t_parser\apdu</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\nfc\t4t_parser\cc_file</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\nfc\t4t_parser\hl_detection_procedure</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\nfc\t4t_parser\tlv</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\softdevice\common</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\softdevice\s112\headers</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\softdevice\s112\headers\nrf52</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\toolchain\cmsis\include</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\external\fprintf</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\external\segger_rtt</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\external\utf_converter</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\integration\nrfx</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\integration\nrfx\legacy</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\modules\nrfx</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\modules\nrfx\drivers\include</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\modules\nrfx\hal</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\modules\nrfx\mdk</state>
+          <state>$PROJ_DIR$\..\config</state>
+        </option>
+        <option>
+          <name>CCStdIncCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCCodeSection</name>
+          <state>.text</state>
+        </option>
+        <option>
+          <name>IInterwork2</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IProcessorMode2</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCOptLevel</name>
+          <state>3</state>
+        </option>
+        <option>
+          <name>CCOptStrategy</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CCOptLevelSlave</name>
+          <state>3</state>
+        </option>
+        <option>
+          <name>CompilerMisraRules98</name>
+          <version>0</version>
+          <state>1000111110110101101110011100111111101110011011000101110111101101100111111111111100110011111001110111001111111111111111111111111</state>
+        </option>
+        <option>
+          <name>CompilerMisraRules04</name>
+          <version>0</version>
+          <state>111101110010111111111000110111111111111111111111111110010111101111010101111111111111111111111111101111111011111001111011111011111111111111111</state>
+        </option>
+        <option>
+          <name>CCPosIndRopi</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPosIndRwpi</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCPosIndNoDynInit</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccLang</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccCDialect</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IccAllowVLA</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccCppDialect</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IccExceptions</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IccRTTI</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IccStaticDestr</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IccCppInlineSemantics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IccCmsis</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IccFloatSemantics</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCNoLiteralPool</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CCOptStrategySlave</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>AARM</name>
+      <archiveVersion>2</archiveVersion>
+      <data>
+        <version>9</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>0</debug>
+        <option>
+          <name>AObjPrefix</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AEndian</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>ACaseSensitivity</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>MacroChars</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AWarnEnable</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AWarnWhat</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AWarnOne</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AWarnRange1</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AWarnRange2</name>
+          <state></state>
+        </option>
+        <option>
+          <name>ADebug</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AltRegisterNames</name>
+          <state>0</state>
+        </option>
+        <option>
+      <name>ADefines</name>
+          <state>APP_TIMER_V2</state>
+          <state>APP_TIMER_V2_RTC1_ENABLED</state>
+          <state>BOARD_PCA10040</state>
+          <state>CONFIG_GPIO_AS_PINRESET</state>
+          <state>FLOAT_ABI_HARD</state>
+          <state>NRF52</state>
+          <state>NRF52832_XXAA</state>
+          <state>NRF52_PAN_74</state>
+          <state>NRF_SD_BLE_API_VERSION=7</state>
+          <state>S112</state>
+          <state>SOFTDEVICE_PRESENT</state>
+        </option>
+        <option>
+          <name>AList</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AListHeader</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AListing</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>Includes</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>MacDefs</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>MacExps</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>MacExec</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>OnlyAssed</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>MultiLine</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>PageLengthCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>PageLength</name>
+          <state>80</state>
+        </option>
+        <option>
+          <name>TabSpacing</name>
+          <state>8</state>
+        </option>
+        <option>
+          <name>AXRef</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AXRefDefines</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AXRefInternal</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AXRefDual</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AFpuProcessor</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>AOutputFile</name>
+          <state>$FILE_BNAME$.o</state>
+        </option>
+        <option>
+          <name>AMultibyteSupport</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>ALimitErrorsCheck</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>ALimitErrorsEdit</name>
+          <state>100</state>
+        </option>
+        <option>
+          <name>AIgnoreStdInclude</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AUserIncludes</name>
+          <state>$PROJ_DIR$\..\..\..\config</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\ble\ble_advertising</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\ble\ble_dtm</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\ble\ble_link_ctx_manager</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\ble\ble_racp</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\ble\ble_services\ble_ancs_c</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\ble\ble_services\ble_ans_c</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\ble\ble_services\ble_bas</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\ble\ble_services\ble_bas_c</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\ble\ble_services\ble_cscs</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\ble\ble_services\ble_cts_c</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\ble\ble_services\ble_dfu</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\ble\ble_services\ble_dis</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\ble\ble_services\ble_gls</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\ble\ble_services\ble_hids</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\ble\ble_services\ble_hrs</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\ble\ble_services\ble_hrs_c</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\ble\ble_services\ble_hts</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\ble\ble_services\ble_ias</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\ble\ble_services\ble_ias_c</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\ble\ble_services\ble_lbs</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\ble\ble_services\ble_lbs_c</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\ble\ble_services\ble_lls</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\ble\ble_services\ble_nus</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\ble\ble_services\ble_nus_c</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\ble\ble_services\ble_rscs</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\ble\ble_services\ble_rscs_c</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\ble\ble_services\ble_tps</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\ble\common</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\ble\nrf_ble_gatt</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\ble\nrf_ble_qwr</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\ble\peer_manager</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\boards</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\atomic</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\atomic_fifo</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\atomic_flags</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\balloc</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\bootloader\ble_dfu</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\bsp</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\button</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\cli</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\crc16</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\crc32</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\crypto</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\csense</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\csense_drv</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\delay</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\ecc</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\experimental_section_vars</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\experimental_task_manager</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\fds</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\fifo</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\fstorage</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\gfx</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\gpiote</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\hardfault</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\hci</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\led_softblink</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\log</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\log\src</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\low_power_pwm</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\mem_manager</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\memobj</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\mpu</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\mutex</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\pwm</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\pwr_mgmt</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\queue</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\ringbuf</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\scheduler</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\sdcard</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\slip</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\sortlist</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\spi_mngr</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\stack_guard</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\strerror</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\svc</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\timer</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\twi_mngr</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\twi_sensor</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\uart</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\usbd</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\usbd\class\audio</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\usbd\class\cdc</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\usbd\class\cdc\acm</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\usbd\class\hid</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\usbd\class\hid\generic</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\usbd\class\hid\kbd</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\usbd\class\hid\mouse</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\usbd\class\msc</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\util</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\nfc\ndef\conn_hand_parser</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\nfc\ndef\conn_hand_parser\ac_rec_parser</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\nfc\ndef\conn_hand_parser\ble_oob_advdata_parser</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\nfc\ndef\conn_hand_parser\le_oob_rec_parser</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\nfc\ndef\connection_handover\ac_rec</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\nfc\ndef\connection_handover\ble_oob_advdata</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\nfc\ndef\connection_handover\ble_pair_lib</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\nfc\ndef\connection_handover\ble_pair_msg</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\nfc\ndef\connection_handover\common</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\nfc\ndef\connection_handover\ep_oob_rec</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\nfc\ndef\connection_handover\hs_rec</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\nfc\ndef\connection_handover\le_oob_rec</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\nfc\ndef\generic\message</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\nfc\ndef\generic\record</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\nfc\ndef\launchapp</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\nfc\ndef\parser\message</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\nfc\ndef\parser\record</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\nfc\ndef\text</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\nfc\ndef\uri</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\nfc\platform</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\nfc\t2t_lib</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\nfc\t2t_parser</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\nfc\t4t_lib</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\nfc\t4t_parser\apdu</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\nfc\t4t_parser\cc_file</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\nfc\t4t_parser\hl_detection_procedure</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\nfc\t4t_parser\tlv</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\softdevice\common</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\softdevice\s112\headers</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\softdevice\s112\headers\nrf52</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\components\toolchain\cmsis\include</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\external\fprintf</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\external\segger_rtt</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\external\utf_converter</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\integration\nrfx</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\integration\nrfx\legacy</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\modules\nrfx</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\modules\nrfx\drivers\include</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\modules\nrfx\hal</state>
+          <state>$PROJ_DIR$\..\..\..\..\..\..\modules\nrfx\mdk</state>
+          <state>$PROJ_DIR$\..\config</state>
+        </option>
+        <option>
+          <name>AExtraOptionsCheckV2</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>AExtraOptionsV2</name>
+          <state></state>
+        </option>
+        <option>
+          <name>AsmNoLiteralPool</name>
+          <state>0</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>OBJCOPY</name>
+      <archiveVersion>0</archiveVersion>
+      <data>
+        <version>1</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>0</debug>
+        <option>
+          <name>OOCOutputFormat</name>
+          <version>2</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OCOutputOverride</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OOCOutputFile</name>
+          <state>ble_app_uart_pca10040_s112.hex</state>
+        </option>
+        <option>
+          <name>OOCCommandLineProducer</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>OOCObjCopyEnable</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>CUSTOM</name>
+      <archiveVersion>3</archiveVersion>
+      <data>
+        <extensions></extensions>
+        <cmdline></cmdline>
+      </data>
+    </settings>
+    <settings>
+      <name>BICOMP</name>
+      <archiveVersion>0</archiveVersion>
+      <data/>
+    </settings>
+    <settings>
+      <name>BUILDACTION</name>
+      <archiveVersion>1</archiveVersion>
+      <data>
+        <prebuild></prebuild>
+        <postbuild></postbuild>
+      </data>
+    </settings>
+    <settings>
+      <name>ILINK</name>
+      <archiveVersion>0</archiveVersion>
+      <data>
+        <version>16</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>0</debug>
+        <option>
+          <name>IlinkLibIOConfig</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>XLinkMisraHandler</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkInputFileSlave</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkOutputFile</name>
+          <state>ble_app_uart_pca10040_s112.out</state>
+        </option>
+        <option>
+          <name>IlinkDebugInfoEnable</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkKeepSymbols</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkRawBinaryFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkRawBinarySymbol</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkRawBinarySegment</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkRawBinaryAlign</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkDefines</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkConfigDefines</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkMapFile</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkLogFile</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogInitialization</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogModule</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogSection</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogVeneer</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkIcfOverride</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkIcfFile</name>
+      <state>$PROJ_DIR$\ble_app_uart_iar_nRF5x.icf</state>
+        </option>
+        <option>
+          <name>IlinkIcfFileSlave</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkEnableRemarks</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkSuppressDiags</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkTreatAsRem</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkTreatAsWarn</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkTreatAsErr</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkWarningsAreErrors</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkUseExtraOptions</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkExtraOptions</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkLowLevelInterfaceSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkAutoLibEnable</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkAdditionalLibs</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkOverrideProgramEntryLabel</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkProgramEntryLabelSelect</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkProgramEntryLabel</name>
+          <state>__iar_program_start</state>
+        </option>
+        <option>
+          <name>DoFill</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>FillerByte</name>
+          <state>0xFF</state>
+        </option>
+        <option>
+          <name>FillerStart</name>
+          <state>0x0</state>
+        </option>
+        <option>
+          <name>FillerEnd</name>
+          <state>0x0</state>
+        </option>
+        <option>
+          <name>CrcSize</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcAlign</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcPoly</name>
+          <state>0x11021</state>
+        </option>
+        <option>
+          <name>CrcCompl</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CrcBitOrder</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>CrcInitialValue</name>
+          <state>0x0</state>
+        </option>
+        <option>
+          <name>DoCrc</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkBE8Slave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkBufferedTerminalOutput</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkStdoutInterfaceSlave</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcFullSize</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkIElfToolPostProcess</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogAutoLibSelect</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogRedirSymbols</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkLogUnusedFragments</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCrcReverseByteOrder</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCrcUseAsInput</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptInline</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptExceptionsAllow</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptExceptionsForce</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkCmsis</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptMergeDuplSections</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkOptUseVfe</name>
+          <state>1</state>
+        </option>
+        <option>
+          <name>IlinkOptForceVfe</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkStackAnalysisEnable</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkStackControlFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IlinkStackCallGraphFile</name>
+          <state></state>
+        </option>
+        <option>
+          <name>CrcAlgorithm</name>
+          <version>0</version>
+          <state>1</state>
+        </option>
+        <option>
+          <name>CrcUnitSize</name>
+          <version>0</version>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IlinkThreadsSlave</name>
+          <state>1</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>IARCHIVE</name>
+      <archiveVersion>0</archiveVersion>
+      <data>
+        <version>0</version>
+        <wantNonLocal>1</wantNonLocal>
+        <debug>0</debug>
+        <option>
+          <name>IarchiveInputs</name>
+          <state></state>
+        </option>
+        <option>
+          <name>IarchiveOverride</name>
+          <state>0</state>
+        </option>
+        <option>
+          <name>IarchiveOutput</name>
+          <state>###Unitialized###</state>
+        </option>
+      </data>
+    </settings>
+    <settings>
+      <name>BILINK</name>
+      <archiveVersion>0</archiveVersion>
+      <data/>
+    </settings>
+  </configuration>  <group>
+  <name>nRF_Log</name>    <file>
+    <name>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\log\src\nrf_log_backend_rtt.c</name>    </file>    <file>
+    <name>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\log\src\nrf_log_backend_serial.c</name>    </file>    <file>
+    <name>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\log\src\nrf_log_default_backends.c</name>    </file>    <file>
+    <name>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\log\src\nrf_log_frontend.c</name>    </file>    <file>
+    <name>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\log\src\nrf_log_str_formatter.c</name>    </file>  </group>  <group>
+  <name>nRF_Libraries</name>    <file>
+    <name>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\button\app_button.c</name>    </file>    <file>
+    <name>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\util\app_error.c</name>    </file>    <file>
+    <name>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\util\app_error_handler_iar.c</name>    </file>    <file>
+    <name>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\util\app_error_weak.c</name>    </file>    <file>
+    <name>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\fifo\app_fifo.c</name>    </file>    <file>
+    <name>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\scheduler\app_scheduler.c</name>    </file>    <file>
+    <name>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\timer\app_timer2.c</name>    </file>    <file>
+    <name>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\uart\app_uart_fifo.c</name>    </file>    <file>
+    <name>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\util\app_util_platform.c</name>    </file>    <file>
+    <name>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\timer\drv_rtc.c</name>    </file>    <file>
+    <name>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\hardfault\hardfault_implementation.c</name>    </file>    <file>
+    <name>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\util\nrf_assert.c</name>    </file>    <file>
+    <name>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\atomic_fifo\nrf_atfifo.c</name>    </file>    <file>
+    <name>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\atomic_flags\nrf_atflags.c</name>    </file>    <file>
+    <name>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\atomic\nrf_atomic.c</name>    </file>    <file>
+    <name>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\balloc\nrf_balloc.c</name>    </file>    <file>
+    <name>$PROJ_DIR$\..\..\..\..\..\..\external\fprintf\nrf_fprintf.c</name>    </file>    <file>
+    <name>$PROJ_DIR$\..\..\..\..\..\..\external\fprintf\nrf_fprintf_format.c</name>    </file>    <file>
+    <name>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\memobj\nrf_memobj.c</name>    </file>    <file>
+    <name>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\pwr_mgmt\nrf_pwr_mgmt.c</name>    </file>    <file>
+    <name>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\ringbuf\nrf_ringbuf.c</name>    </file>    <file>
+    <name>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\experimental_section_vars\nrf_section_iter.c</name>    </file>    <file>
+    <name>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\sortlist\nrf_sortlist.c</name>    </file>    <file>
+    <name>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\strerror\nrf_strerror.c</name>    </file>    <file>
+    <name>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\uart\retarget.c</name>    </file>  </group>  <group>
+  <name>None</name>    <file>
+    <name>$PROJ_DIR$\..\..\..\..\..\..\modules\nrfx\mdk\iar_startup_nrf52.s</name>    </file>    <file>
+    <name>$PROJ_DIR$\..\..\..\..\..\..\modules\nrfx\mdk\system_nrf52.c</name>    </file>  </group>  <group>
+  <name>Board Definition</name>    <file>
+    <name>$PROJ_DIR$\..\..\..\..\..\..\components\boards\boards.c</name>    </file>  </group>  <group>
+  <name>nRF_Drivers</name>    <file>
+    <name>$PROJ_DIR$\..\..\..\..\..\..\integration\nrfx\legacy\nrf_drv_clock.c</name>    </file>    <file>
+    <name>$PROJ_DIR$\..\..\..\..\..\..\integration\nrfx\legacy\nrf_drv_uart.c</name>    </file>    <file>
+    <name>$PROJ_DIR$\..\..\..\..\..\..\modules\nrfx\soc\nrfx_atomic.c</name>    </file>    <file>
+    <name>$PROJ_DIR$\..\..\..\..\..\..\modules\nrfx\drivers\src\nrfx_clock.c</name>    </file>    <file>
+    <name>$PROJ_DIR$\..\..\..\..\..\..\modules\nrfx\drivers\src\nrfx_gpiote.c</name>    </file>    <file>
+    <name>$PROJ_DIR$\..\..\..\..\..\..\modules\nrfx\drivers\src\prs\nrfx_prs.c</name>    </file>    <file>
+    <name>$PROJ_DIR$\..\..\..\..\..\..\modules\nrfx\drivers\src\nrfx_uart.c</name>    </file>    <file>
+    <name>$PROJ_DIR$\..\..\..\..\..\..\modules\nrfx\drivers\src\nrfx_uarte.c</name>    </file>  </group>  <group>
+  <name>Board Support</name>    <file>
+    <name>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\bsp\bsp.c</name>    </file>    <file>
+    <name>$PROJ_DIR$\..\..\..\..\..\..\components\libraries\bsp\bsp_btn_ble.c</name>    </file>  </group>  <group>
+  <name>Application</name>    <file>
+    <name>$PROJ_DIR$\..\..\..\main.c</name>    </file>    <file>
+    <name>$PROJ_DIR$\..\config\sdk_config.h</name>    </file>  </group>  <group>
+  <name>nRF_Segger_RTT</name>    <file>
+    <name>$PROJ_DIR$\..\..\..\..\..\..\external\segger_rtt\SEGGER_RTT.c</name>    </file>    <file>
+    <name>$PROJ_DIR$\..\..\..\..\..\..\external\segger_rtt\SEGGER_RTT_Syscalls_IAR.c</name>    </file>    <file>
+    <name>$PROJ_DIR$\..\..\..\..\..\..\external\segger_rtt\SEGGER_RTT_printf.c</name>    </file>  </group>  <group>
+  <name>nRF_BLE</name>    <file>
+    <name>$PROJ_DIR$\..\..\..\..\..\..\components\ble\common\ble_advdata.c</name>    </file>    <file>
+    <name>$PROJ_DIR$\..\..\..\..\..\..\components\ble\ble_advertising\ble_advertising.c</name>    </file>    <file>
+    <name>$PROJ_DIR$\..\..\..\..\..\..\components\ble\common\ble_conn_params.c</name>    </file>    <file>
+    <name>$PROJ_DIR$\..\..\..\..\..\..\components\ble\common\ble_conn_state.c</name>    </file>    <file>
+    <name>$PROJ_DIR$\..\..\..\..\..\..\components\ble\ble_link_ctx_manager\ble_link_ctx_manager.c</name>    </file>    <file>
+    <name>$PROJ_DIR$\..\..\..\..\..\..\components\ble\common\ble_srv_common.c</name>    </file>    <file>
+    <name>$PROJ_DIR$\..\..\..\..\..\..\components\ble\nrf_ble_gatt\nrf_ble_gatt.c</name>    </file>    <file>
+    <name>$PROJ_DIR$\..\..\..\..\..\..\components\ble\nrf_ble_qwr\nrf_ble_qwr.c</name>    </file>  </group>  <group>
+  <name>UTF8/UTF16 converter</name>    <file>
+    <name>$PROJ_DIR$\..\..\..\..\..\..\external\utf_converter\utf.c</name>    </file>  </group>  <group>
+  <name>nRF_BLE_Services</name>    <file>
+    <name>$PROJ_DIR$\..\..\..\..\..\..\components\ble\ble_services\ble_nus\ble_nus.c</name>    </file>  </group>  <group>
+  <name>nRF_SoftDevice</name>    <file>
+    <name>$PROJ_DIR$\..\..\..\..\..\..\components\softdevice\common\nrf_sdh.c</name>    </file>    <file>
+    <name>$PROJ_DIR$\..\..\..\..\..\..\components\softdevice\common\nrf_sdh_ble.c</name>    </file>    <file>
+    <name>$PROJ_DIR$\..\..\..\..\..\..\components\softdevice\common\nrf_sdh_soc.c</name>    </file>  </group></project>
+
+

smart_shoes/nRF5_SDK_17.0.0_9d13099/examples/Shoes_just_traj_20201208/ble_app_uart_03_link_PC/pca10040/s112/ses/ble_app_uart_pca10040_s112.emSession

@@ -0,0 +1,7 @@
+<!DOCTYPE CrossStudio_Session_File>
+<session>
+  <ARMCrossStudioWindow activeProject="ble_app_uart_pca10040_s112" buildConfiguration="Release"/>
+  <Files>
+    <SessionOpenFile codecName="Default" debugPath="../../../main.c" left="0" name="unnamed" path="../../../main.c" selected="1" top="0" useBinaryEdit="0" useTextEdit="1" x="0" y="0"/>
+  </Files>
+</session>

smart_shoes/nRF5_SDK_17.0.0_9d13099/examples/Shoes_just_traj_20201208/ble_app_uart_03_link_PC/pca10040/s112/ses/flash_placement.xml

@@ -0,0 +1,53 @@
+<!DOCTYPE Linker_Placement_File>
+<Root name="Flash Section Placement">
+  <MemorySegment name="FLASH" start="$(FLASH_PH_START)" size="$(FLASH_PH_SIZE)">
+    <ProgramSection load="no" name=".reserved_flash" start="$(FLASH_PH_START)" size="$(FLASH_START)-$(FLASH_PH_START)" />
+    <ProgramSection alignment="0x100" load="Yes" name=".vectors" start="$(FLASH_START)" />
+    <ProgramSection alignment="4" load="Yes" name=".init" />
+    <ProgramSection alignment="4" load="Yes" name=".init_rodata" />
+    <ProgramSection alignment="4" load="Yes" name=".text" />
+    <ProgramSection alignment="4" keep="Yes" load="Yes" name=".sdh_soc_observers" inputsections="*(SORT(.sdh_soc_observers*))" address_symbol="__start_sdh_soc_observers" end_symbol="__stop_sdh_soc_observers" />
+    <ProgramSection alignment="4" keep="Yes" load="Yes" name=".sdh_ble_observers" inputsections="*(SORT(.sdh_ble_observers*))" address_symbol="__start_sdh_ble_observers" end_symbol="__stop_sdh_ble_observers" />
+    <ProgramSection alignment="4" keep="Yes" load="Yes" name=".pwr_mgmt_data" inputsections="*(SORT(.pwr_mgmt_data*))" address_symbol="__start_pwr_mgmt_data" end_symbol="__stop_pwr_mgmt_data" />
+    <ProgramSection alignment="4" keep="Yes" load="Yes" name=".sdh_req_observers" inputsections="*(SORT(.sdh_req_observers*))" address_symbol="__start_sdh_req_observers" end_symbol="__stop_sdh_req_observers" />
+    <ProgramSection alignment="4" keep="Yes" load="Yes" name=".sdh_state_observers" inputsections="*(SORT(.sdh_state_observers*))" address_symbol="__start_sdh_state_observers" end_symbol="__stop_sdh_state_observers" />
+    <ProgramSection alignment="4" keep="Yes" load="Yes" name=".sdh_stack_observers" inputsections="*(SORT(.sdh_stack_observers*))" address_symbol="__start_sdh_stack_observers" end_symbol="__stop_sdh_stack_observers" />
+    <ProgramSection alignment="4" keep="Yes" load="Yes" name=".nrf_queue" inputsections="*(.nrf_queue*)" address_symbol="__start_nrf_queue" end_symbol="__stop_nrf_queue" />
+    <ProgramSection alignment="4" keep="Yes" load="Yes" name=".nrf_balloc" inputsections="*(.nrf_balloc*)" address_symbol="__start_nrf_balloc" end_symbol="__stop_nrf_balloc" />
+    <ProgramSection alignment="4" keep="Yes" load="Yes" name=".cli_command" inputsections="*(.cli_command*)" address_symbol="__start_cli_command" end_symbol="__stop_cli_command" />
+    <ProgramSection alignment="4" keep="Yes" load="Yes" name=".crypto_data" inputsections="*(SORT(.crypto_data*))" address_symbol="__start_crypto_data" end_symbol="__stop_crypto_data" />
+    <ProgramSection alignment="4" keep="Yes" load="Yes" name=".log_const_data" inputsections="*(SORT(.log_const_data*))" address_symbol="__start_log_const_data" end_symbol="__stop_log_const_data" />
+    <ProgramSection alignment="4" keep="Yes" load="Yes" name=".log_backends" inputsections="*(SORT(.log_backends*))" address_symbol="__start_log_backends" end_symbol="__stop_log_backends" />
+    <ProgramSection alignment="4" keep="Yes" load="No" name=".nrf_sections" address_symbol="__start_nrf_sections" />
+    <ProgramSection alignment="4" keep="Yes" load="Yes" name=".cli_sorted_cmd_ptrs"  inputsections="*(.cli_sorted_cmd_ptrs*)" runin=".cli_sorted_cmd_ptrs_run"/>
+    <ProgramSection alignment="4" keep="Yes" load="Yes" name=".fs_data"  inputsections="*(.fs_data*)" runin=".fs_data_run"/>
+    <ProgramSection alignment="4" keep="Yes" load="Yes" name=".log_dynamic_data"  inputsections="*(SORT(.log_dynamic_data*))" runin=".log_dynamic_data_run"/>
+    <ProgramSection alignment="4" keep="Yes" load="Yes" name=".log_filter_data"  inputsections="*(SORT(.log_filter_data*))" runin=".log_filter_data_run"/>
+    <ProgramSection alignment="4" load="Yes" name=".dtors" />
+    <ProgramSection alignment="4" load="Yes" name=".ctors" />
+    <ProgramSection alignment="4" load="Yes" name=".rodata" />
+    <ProgramSection alignment="4" load="Yes" name=".ARM.exidx" address_symbol="__exidx_start" end_symbol="__exidx_end" />
+    <ProgramSection alignment="4" load="Yes" runin=".fast_run" name=".fast" />
+    <ProgramSection alignment="4" load="Yes" runin=".data_run" name=".data" />
+    <ProgramSection alignment="4" load="Yes" runin=".tdata_run" name=".tdata" />
+  </MemorySegment>
+  <MemorySegment name="RAM" start="$(RAM_PH_START)" size="$(RAM_PH_SIZE)">
+    <ProgramSection load="no" name=".reserved_ram" start="$(RAM_PH_START)" size="$(RAM_START)-$(RAM_PH_START)" />
+    <ProgramSection alignment="0x100" load="No" name=".vectors_ram" start="$(RAM_START)" address_symbol="__app_ram_start__"/>
+    <ProgramSection alignment="4" keep="Yes" load="No" name=".nrf_sections_run" address_symbol="__start_nrf_sections_run" />
+    <ProgramSection alignment="4" keep="Yes" load="No" name=".cli_sorted_cmd_ptrs_run" address_symbol="__start_cli_sorted_cmd_ptrs" end_symbol="__stop_cli_sorted_cmd_ptrs" />
+    <ProgramSection alignment="4" keep="Yes" load="No" name=".fs_data_run" address_symbol="__start_fs_data" end_symbol="__stop_fs_data" />
+    <ProgramSection alignment="4" keep="Yes" load="No" name=".log_dynamic_data_run" address_symbol="__start_log_dynamic_data" end_symbol="__stop_log_dynamic_data" />
+    <ProgramSection alignment="4" keep="Yes" load="No" name=".log_filter_data_run" address_symbol="__start_log_filter_data" end_symbol="__stop_log_filter_data" />
+    <ProgramSection alignment="4" keep="Yes" load="No" name=".nrf_sections_run_end" address_symbol="__end_nrf_sections_run" />
+    <ProgramSection alignment="4" load="No" name=".fast_run" />
+    <ProgramSection alignment="4" load="No" name=".data_run" />
+    <ProgramSection alignment="4" load="No" name=".tdata_run" />
+    <ProgramSection alignment="4" load="No" name=".bss" />
+    <ProgramSection alignment="4" load="No" name=".tbss" />
+    <ProgramSection alignment="4" load="No" name=".non_init" />
+    <ProgramSection alignment="4" size="__HEAPSIZE__" load="No" name=".heap" />
+    <ProgramSection alignment="8" size="__STACKSIZE__" load="No" place_from_segment_end="Yes" name=".stack"  address_symbol="__StackLimit" end_symbol="__StackTop"/>
+    <ProgramSection alignment="8" size="__STACKSIZE_PROCESS__" load="No" name=".stack_process" />
+  </MemorySegment>
+</Root>

smart_shoes/nRF5_SDK_17.0.0_9d13099/examples/Shoes_just_traj_20201208/ble_app_uart_03_link_PC/pca10040/s132/arm5_no_packs/EventRecorderStub.scvd

@@ -0,0 +1,9 @@
+<?xml version="1.0" encoding="utf-8"?>
+
+<component_viewer schemaVersion="0.1" xmlns:xs="http://www.w3.org/2001/XMLSchema-instance" xs:noNamespaceSchemaLocation="Component_Viewer.xsd">
+
+<component name="EventRecorderStub" version="1.0.0"/>       <!--name and version of the component-->
+  <events>
+  </events>
+
+</component_viewer>

smart_shoes/nRF5_SDK_17.0.0_9d13099/examples/Shoes_just_traj_20201208/ble_app_uart_03_link_PC/pca10040/s132/arm5_no_packs/JLinkLog.txt

@@ -0,0 +1,3903 @@
+T2610 000:008.122   SEGGER J-Link V6.70e Log File
+T2610 000:008.261   DLL Compiled: Apr 17 2020 17:55:05
+T2610 000:008.272   Logging started @ 2020-12-17 03:45
+T2610 000:008.287 JLINK_SetWarnOutHandler(...)
+T2610 000:008.299 - 0.017ms
+T2610 000:008.313 JLINK_OpenEx(...)
+T2610 000:013.163   Firmware: J-Link OB-STM32F072-CortexM compiled Jan  7 2019 14:09:37
+T2610 000:013.379   Decompressing FW timestamp took 159 us
+T2610 000:018.429   Hardware: V1.00
+T2610 000:018.477   S/N: 20200820
+T2610 000:018.504   OEM: SEGGER
+T2610 000:018.518   Feature(s): GDB, RDI, FlashBP, FlashDL, JFlash, RDDI
+T2610 000:019.938   TELNET listener socket opened on port 19021
+T2610 000:020.245   WEBSRV Starting webserver
+T2610 000:020.394   WEBSRV Webserver running on local port 19080
+T2610 000:020.424 - 12.116ms returns "O.K."
+T2610 000:020.447 JLINK_GetEmuCaps()
+T2610 000:020.459 - 0.017ms returns 0xB8EA5A33
+T2610 000:020.476 JLINK_TIF_GetAvailable(...)
+T2610 000:020.619 - 0.153ms
+T2610 000:020.639 JLINK_SetErrorOutHandler(...)
+T2610 000:020.649 - 0.014ms
+T2610 000:020.675 JLINK_ExecCommand("ProjectFile = "F:\new_work\shoes\smart_shoes\nRF5_SDK_17.0.0_9d13099\examples\Shoes_just_traj_20201208\ble_app_uart_03_link_PC\pca10040\s132\arm5_no_packs\JLinkSettings.ini"", ...). 
+T2610 000:030.799 - 10.152ms returns 0x00
+T2610 000:040.524 JLINK_ExecCommand("Device = nRF52832_xxAA", ...). 
+T2610 000:048.856   Device "NRF52832_XXAA" selected.
+T2610 000:049.760 - 9.210ms returns 0x00
+T2610 000:049.799 JLINK_ExecCommand("DisableConnectionTimeout", ...). 
+T2610 000:049.817 - 0.008ms returns 0x01
+T2610 000:049.831 JLINK_GetHardwareVersion()
+T2610 000:049.841 - 0.015ms returns 0x2710
+T2610 000:049.854 JLINK_GetDLLVersion()  returns 67005
+T2610 000:049.873 JLINK_GetFirmwareString(...)
+T2610 000:049.885 - 0.016ms
+T2610 000:070.907 JLINK_GetDLLVersion()  returns 67005
+T2610 000:070.944 JLINK_GetCompileDateTime()
+T2610 000:070.954 - 0.014ms
+T2610 000:076.997 JLINK_GetFirmwareString(...)
+T2610 000:077.029 - 0.037ms
+T2610 000:083.353 JLINK_GetHardwareVersion()
+T2610 000:083.388 - 0.039ms returns 0x2710
+T2610 000:108.558 JLINK_TIF_Select(JLINKARM_TIF_SWD)
+T2610 000:109.212 - 0.666ms returns 0x00
+T2610 000:109.242 JLINK_SetSpeed(10000)
+T2610 000:109.298 - 0.064ms
+T2610 000:109.316 JLINK_GetId()
+T2610 000:116.025   InitTarget() start
+T2610 000:116.071    J-Link Script File: Executing InitTarget()
+T2610 000:125.498   InitTarget() end
+T2610 000:133.065   Found SW-DP with ID 0x2BA01477
+T2610 000:134.745   Old FW that does not support reading DPIDR via DAP jobs
+T2610 000:143.135   Unknown DP version. Assuming DPv0
+T2610 000:149.741   Scanning AP map to find all available APs
+T2610 000:157.184   AP[2]: Stopped AP scan as end of AP map has been reached
+T2610 000:163.071   AP[0]: AHB-AP (IDR: 0x24770011)
+T2610 000:170.238   AP[1]: JTAG-AP (IDR: 0x02880000)
+T2610 000:176.490   Iterating through AP map to find AHB-AP to use
+T2610 000:184.613   AP[0]: Core found
+T2610 000:190.787   AP[0]: AHB-AP ROM base: 0xE00FF000
+T2610 000:197.665   CPUID register: 0x410FC241. Implementer code: 0x41 (ARM)
+T2610 000:204.449   Found Cortex-M4 r0p1, Little endian.
+T2610 000:305.513    -- Max. mem block: 0x00002340
+T2610 000:305.609   CPU_ReadMem(4 bytes @ 0xE000EDF0)
+T2610 000:306.678   CPU_WriteMem(4 bytes @ 0xE000EDF0)
+T2610 000:307.411   CPU_ReadMem(4 bytes @ 0xE0002000)
+T2610 000:337.634   FPUnit: 6 code (BP) slots and 2 literal slots
+T2610 000:337.773   CPU_ReadMem(4 bytes @ 0xE000EDFC)
+T2610 000:338.589   CPU_WriteMem(4 bytes @ 0xE000EDFC)
+T2610 000:339.454   CPU_ReadMem(4 bytes @ 0xE0001000)
+T2610 000:340.270   CPU_WriteMem(4 bytes @ 0xE0001000)
+T2610 000:341.009   CPU_ReadMem(4 bytes @ 0xE000ED88)
+T2610 000:341.670   CPU_WriteMem(4 bytes @ 0xE000ED88)
+T2610 000:342.352   CPU_ReadMem(4 bytes @ 0xE000ED88)
+T2610 000:343.026   CPU_WriteMem(4 bytes @ 0xE000ED88)
+T2610 000:356.861   CoreSight components:
+T2610 000:370.117   ROMTbl[0] @ E00FF000
+T2610 000:370.194   CPU_ReadMem(64 bytes @ 0xE00FF000)
+T2610 000:371.324   CPU_ReadMem(32 bytes @ 0xE000EFE0)
+T2610 000:386.062   ROMTbl[0][0]: E000E000, CID: B105E00D, PID: 000BB00C SCS-M7
+T2610 000:386.139   CPU_ReadMem(32 bytes @ 0xE0001FE0)
+T2610 000:399.234   ROMTbl[0][1]: E0001000, CID: B105E00D, PID: 003BB002 DWT
+T2610 000:399.286   CPU_ReadMem(32 bytes @ 0xE0002FE0)
+T2610 000:407.635   ROMTbl[0][2]: E0002000, CID: B105E00D, PID: 002BB003 FPB
+T2610 000:407.685   CPU_ReadMem(32 bytes @ 0xE0000FE0)
+T2610 000:416.440   ROMTbl[0][3]: E0000000, CID: B105E00D, PID: 003BB001 ITM
+T2610 000:416.491   CPU_ReadMem(32 bytes @ 0xE0040FE0)
+T2610 000:425.173   ROMTbl[0][4]: E0040000, CID: B105900D, PID: 000BB9A1 TPIU
+T2610 000:425.223   CPU_ReadMem(32 bytes @ 0xE0041FE0)
+T2610 000:433.104   ROMTbl[0][5]: E0041000, CID: B105900D, PID: 000BB925 ETM
+T2610 000:433.572 - 324.272ms   returns 0x2BA01477
+T2610 000:433.602 JLINK_GetDLLVersion()  returns 67005
+T2610 000:433.614 JLINK_CORE_GetFound()
+T2610 000:433.624 - 0.014ms returns 0xE0000FF
+T2610 000:433.637 JLINK_GetDebugInfo(0x100 = JLINKARM_ROM_TABLE_ADDR_INDEX)
+T2610 000:433.652   Value=0xE00FF000
+T2610 000:433.671 - 0.038ms returns 0x00
+T2610 000:440.605 JLINK_GetDebugInfo(0x100 = JLINKARM_ROM_TABLE_ADDR_INDEX)
+T2610 000:440.639   Value=0xE00FF000
+T2610 000:440.654 - 0.054ms returns 0x00
+T2610 000:440.666 JLINK_GetDebugInfo(0x101 = JLINKARM_DEBUG_INFO_ETM_ADDR_INDEX)
+T2610 000:440.676   Value=0xE0041000
+T2610 000:440.690 - 0.028ms returns 0x00
+T2610 000:440.709   JLINK_ReadMemEx(0xE0041FD0, 0x0020 Bytes, ..., Flags = 0x02000004)
+T2610 000:440.741   CPU_ReadMem(32 bytes @ 0xE0041FD0)
+T2610 000:441.571   Data:  04 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ...
+T2610 000:441.590 - 0.890ms returns 0x20
+T2610 000:441.607 JLINK_GetDebugInfo(0x102 = JLINKARM_DEBUG_INFO_MTB_ADDR_INDEX)
+T2610 000:441.617   Value=0x00000000
+T2610 000:441.631 - 0.029ms returns 0x00
+T2610 000:441.643 JLINK_GetDebugInfo(0x103 = JLINKARM_DEBUG_INFO_TPIU_ADDR_INDEX)
+T2610 000:441.652   Value=0xE0040000
+T2610 000:441.666 - 0.028ms returns 0x00
+T2610 000:441.678 JLINK_GetDebugInfo(0x104 = JLINKARM_DEBUG_INFO_ITM_ADDR_INDEX)
+T2610 000:441.687   Value=0xE0000000
+T2610 000:441.701 - 0.028ms returns 0x00
+T2610 000:441.712 JLINK_GetDebugInfo(0x105 = JLINKARM_DEBUG_INFO_DWT_ADDR_INDEX)
+T2610 000:441.722   Value=0xE0001000
+T2610 000:441.736 - 0.028ms returns 0x00
+T2610 000:441.748 JLINK_GetDebugInfo(0x106 = JLINKARM_DEBUG_INFO_FPB_ADDR_INDEX)
+T2610 000:441.758   Value=0xE0002000
+T2610 000:441.772 - 0.028ms returns 0x00
+T2610 000:441.783 JLINK_GetDebugInfo(0x107 = JLINKARM_DEBUG_INFO_NVIC_ADDR_INDEX)
+T2610 000:441.792   Value=0xE000E000
+T2610 000:441.806 - 0.028ms returns 0x00
+T2610 000:441.817 JLINK_GetDebugInfo(0x10C = JLINKARM_DEBUG_INFO_DBG_ADDR_INDEX)
+T2610 000:441.827   Value=0xE000EDF0
+T2610 000:441.841 - 0.028ms returns 0x00
+T2610 000:441.852 JLINK_GetDebugInfo(0x01 = Unknown)
+T2610 000:441.863   Value=0x00000001
+T2610 000:441.877 - 0.030ms returns 0x00
+T2610 000:441.891 JLINK_ReadMemU32(0xE000ED00, 0x0001 Items, ...)
+T2610 000:441.905   CPU_ReadMem(4 bytes @ 0xE000ED00)
+T2610 000:442.401   Data:  41 C2 0F 41
+T2610 000:442.422    - CPUID
+T2610 000:442.436 - 0.549ms returns 1
+T2610 000:442.449 JLINK_GetDebugInfo(0x10F = JLINKARM_DEBUG_INFO_HAS_CORTEX_M_SECURITY_EXT_INDEX)
+T2610 000:442.459   Value=0x00000000
+T2610 000:442.473 - 0.029ms returns 0x00
+T2610 000:442.487 JLINK_SetResetType(JLINKARM_CM3_RESET_TYPE_NORMAL)
+T2610 000:442.497 - 0.014ms returns JLINKARM_CM3_RESET_TYPE_NORMAL
+T2610 000:442.508 JLINK_Reset()
+T2610 000:442.528   CPU is running
+T2610 000:442.545   CPU_WriteMem(4 bytes @ 0xE000EDF0)
+T2610 000:443.065   CPU is running
+T2610 000:443.084   CPU_WriteMem(4 bytes @ 0xE000EDFC)
+T2610 000:450.292   Reset: Halt core after reset via DEMCR.VC_CORERESET.
+T2610 000:456.696   Reset: Reset device via AIRCR.SYSRESETREQ.
+T2610 000:456.736   CPU is running
+T2610 000:456.754   CPU_WriteMem(4 bytes @ 0xE000ED0C)
+T2610 000:509.721   CPU_ReadMem(4 bytes @ 0xE000EDF0)
+T2610 000:510.185   CPU_ReadMem(4 bytes @ 0xE000EDF0)
+T2610 000:510.723   CPU is running
+T2610 000:510.772   CPU_WriteMem(4 bytes @ 0xE000EDF0)
+T2610 000:511.331   CPU is running
+T2610 000:511.354   CPU_WriteMem(4 bytes @ 0xE000EDFC)
+T2610 000:517.142   CPU_ReadMem(4 bytes @ 0xE000EDF0)
+T2610 000:522.591   CPU_WriteMem(4 bytes @ 0xE0002000)
+T2610 000:523.380   CPU_ReadMem(4 bytes @ 0xE000EDFC)
+T2610 000:524.212   CPU_ReadMem(4 bytes @ 0xE0001000)
+T2610 000:524.918 - 82.459ms
+T2610 000:525.015 JLINK_Halt()
+T2610 000:525.059 - 0.062ms returns 0x00
+T2610 000:525.110 JLINK_ReadMemU32(0xE000EDF0, 0x0001 Items, ...)
+T2610 000:525.172   CPU_ReadMem(4 bytes @ 0xE000EDF0)
+T2610 000:525.843   Data:  03 00 03 00
+T2610 000:525.927    - DHCSR
+T2610 000:525.979 - 0.887ms returns 1
+T2610 000:526.035 JLINK_WriteU32(0xE000EDF0, 0xA05F0003)
+T2610 000:526.074    - DHCSR
+T2610 000:526.159   CPU_WriteMem(4 bytes @ 0xE000EDF0)
+T2610 000:526.882 - 0.888ms returns 0
+T2610 000:526.962 JLINK_WriteU32(0xE000EDFC, 0x01000000)
+T2610 000:527.004    - DEMCR
+T2610 000:527.074   CPU_WriteMem(4 bytes @ 0xE000EDFC)
+T2610 000:527.852 - 0.952ms returns 0
+T2610 000:584.525 JLINK_GetHWStatus(...)
+T2610 000:584.809 - 0.298ms returns 0x00
+T2610 000:608.271 JLINK_GetNumBPUnits(Type = 0xFFFFFF00)
+T2610 000:608.310 - 0.046ms returns 0x06
+T2610 000:608.327 JLINK_GetNumBPUnits(Type = 0xF0)
+T2610 000:608.340 - 0.019ms returns 0x2000
+T2610 000:608.355 JLINK_GetNumWPUnits()
+T2610 000:608.368 - 0.018ms returns 0x04
+T2610 000:631.555 JLINK_GetSpeed()
+T2610 000:631.592 - 0.044ms returns 0x7D0
+T2610 000:645.216 JLINK_ReadMemU32(0xE000E004, 0x0001 Items, ...)
+T2610 000:645.259   CPU_ReadMem(4 bytes @ 0xE000E004)
+T2610 000:645.697   Data:  01 00 00 00
+T2610 000:645.718 - 0.507ms returns 1
+T2610 000:645.732 JLINK_ReadMemU32(0xE000E004, 0x0001 Items, ...)
+T2610 000:645.746   CPU_ReadMem(4 bytes @ 0xE000E004)
+T2610 000:646.179   Data:  01 00 00 00
+T2610 000:646.201 - 0.474ms returns 1
+T2610 000:646.215 JLINK_WriteMemEx(0xE0001000, 0x001C Bytes, ..., Flags = 0x02000004)
+T2610 000:646.229   Data:  01 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ...
+T2610 000:646.666   CPU_WriteMem(28 bytes @ 0xE0001000)
+T2610 000:647.492 - 1.285ms returns 0x1C
+T2610 000:647.513 JLINK_Halt()
+T2610 000:647.523 - 0.015ms returns 0x00
+T2610 000:647.535 JLINK_IsHalted()
+T2610 000:647.545 - 0.015ms returns TRUE
+T2610 000:651.030 JLINK_WriteMem(0x20000000, 0x05B8 Bytes, ...)
+T2610 000:651.052   Data:  00 BE 0A E0 0D 78 2D 06 68 40 08 24 40 00 00 D3 ...
+T2610 000:651.466   CPU_WriteMem(1464 bytes @ 0x20000000)
+T2610 000:665.793 - 14.785ms returns 0x5B8
+T2610 000:665.894 JLINK_WriteReg(R0, 0x00000000)
+T2610 000:665.916 - 0.028ms returns 0x00
+T2610 000:665.928 JLINK_WriteReg(R1, 0x01E84800)
+T2610 000:665.939 - 0.015ms returns 0x00
+T2610 000:665.950 JLINK_WriteReg(R2, 0x00000001)
+T2610 000:665.961 - 0.015ms returns 0x00
+T2610 000:665.972 JLINK_WriteReg(R3, 0x00000000)
+T2610 000:665.982 - 0.014ms returns 0x00
+T2610 000:665.993 JLINK_WriteReg(R4, 0x00000000)
+T2610 000:666.003 - 0.014ms returns 0x00
+T2610 000:666.014 JLINK_WriteReg(R5, 0x00000000)
+T2610 000:666.024 - 0.014ms returns 0x00
+T2610 000:666.035 JLINK_WriteReg(R6, 0x00000000)
+T2610 000:666.045 - 0.014ms returns 0x00
+T2610 000:666.057 JLINK_WriteReg(R7, 0x00000000)
+T2610 000:666.067 - 0.015ms returns 0x00
+T2610 000:666.078 JLINK_WriteReg(R8, 0x00000000)
+T2610 000:666.088 - 0.015ms returns 0x00
+T2610 000:666.099 JLINK_WriteReg(R9, 0x200005B4)
+T2610 000:666.109 - 0.014ms returns 0x00
+T2610 000:666.121 JLINK_WriteReg(R10, 0x00000000)
+T2610 000:666.131 - 0.015ms returns 0x00
+T2610 000:666.142 JLINK_WriteReg(R11, 0x00000000)
+T2610 000:666.152 - 0.015ms returns 0x00
+T2610 000:666.163 JLINK_WriteReg(R12, 0x00000000)
+T2610 000:666.173 - 0.015ms returns 0x00
+T2610 000:666.185 JLINK_WriteReg(R13 (SP), 0x20002000)
+T2610 000:666.195 - 0.015ms returns 0x00
+T2610 000:666.207 JLINK_WriteReg(R14, 0x20000001)
+T2610 000:666.217 - 0.015ms returns 0x00
+T2610 000:666.228 JLINK_WriteReg(R15 (PC), 0x20000020)
+T2610 000:666.238 - 0.015ms returns 0x00
+T2610 000:666.252 JLINK_WriteReg(XPSR, 0x01000000)
+T2610 000:666.264 - 0.016ms returns 0x00
+T2610 000:666.275 JLINK_WriteReg(MSP, 0x20002000)
+T2610 000:666.285 - 0.015ms returns 0x00
+T2610 000:666.296 JLINK_WriteReg(PSP, 0x20002000)
+T2610 000:666.306 - 0.015ms returns 0x00
+T2610 000:666.318 JLINK_WriteReg(CFBP, 0x00000000)
+T2610 000:666.332 - 0.019ms returns 0x00
+T2610 000:666.344   JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2)
+T2610 000:666.364   CPU_ReadMem(2 bytes @ 0x20000000)
+T2610 000:666.977 - 0.646ms returns 0x00000001
+T2610 000:666.999 JLINK_Go()
+T2610 000:667.013   CPU_WriteMem(2 bytes @ 0x20000000)
+T2610 000:667.598   CPU_ReadMem(4 bytes @ 0xE0001000)
+T2610 000:668.052   CPU_WriteMem(4 bytes @ 0xE0002008)
+T2610 000:668.072   CPU_WriteMem(4 bytes @ 0xE000200C)
+T2610 000:668.086   CPU_WriteMem(4 bytes @ 0xE0002010)
+T2610 000:668.101   CPU_WriteMem(4 bytes @ 0xE0002014)
+T2610 000:668.115   CPU_WriteMem(4 bytes @ 0xE0002018)
+T2610 000:668.130   CPU_WriteMem(4 bytes @ 0xE000201C)
+T2610 000:670.657   CPU_WriteMem(4 bytes @ 0xE0001004)
+T2610 000:675.790 - 8.800ms
+T2610 000:675.808 JLINK_IsHalted()
+T2610 000:680.401   CPU_ReadMem(2 bytes @ 0x20000000)
+T2610 000:681.021 - 5.223ms returns TRUE
+T2610 000:681.041 JLINK_ReadReg(R15 (PC))
+T2610 000:681.054 - 0.018ms returns 0x20000000
+T2610 000:681.066 JLINK_ClrBPEx(BPHandle = 0x00000001)
+T2610 000:681.077 - 0.015ms returns 0x00
+T2610 000:681.089 JLINK_ReadReg(R0)
+T2610 000:681.099 - 0.015ms returns 0x00000000
+T2610 000:681.428 JLINK_WriteReg(R0, 0x00026000)
+T2610 000:681.443 - 0.021ms returns 0x00
+T2610 000:681.455 JLINK_WriteReg(R1, 0x00001000)
+T2610 000:681.465 - 0.015ms returns 0x00
+T2610 000:681.476 JLINK_WriteReg(R2, 0x000000FF)
+T2610 000:681.487 - 0.015ms returns 0x00
+T2610 000:681.498 JLINK_WriteReg(R3, 0x00000000)
+T2610 000:681.508 - 0.014ms returns 0x00
+T2610 000:681.519 JLINK_WriteReg(R4, 0x00000000)
+T2610 000:681.529 - 0.014ms returns 0x00
+T2610 000:681.540 JLINK_WriteReg(R5, 0x00000000)
+T2610 000:681.550 - 0.014ms returns 0x00
+T2610 000:681.561 JLINK_WriteReg(R6, 0x00000000)
+T2610 000:681.571 - 0.014ms returns 0x00
+T2610 000:681.583 JLINK_WriteReg(R7, 0x00000000)
+T2610 000:681.593 - 0.014ms returns 0x00
+T2610 000:681.604 JLINK_WriteReg(R8, 0x00000000)
+T2610 000:681.614 - 0.014ms returns 0x00
+T2610 000:681.625 JLINK_WriteReg(R9, 0x200005B4)
+T2610 000:681.635 - 0.014ms returns 0x00
+T2610 000:681.646 JLINK_WriteReg(R10, 0x00000000)
+T2610 000:681.656 - 0.014ms returns 0x00
+T2610 000:681.667 JLINK_WriteReg(R11, 0x00000000)
+T2610 000:681.680 - 0.019ms returns 0x00
+T2610 000:681.693 JLINK_WriteReg(R12, 0x00000000)
+T2610 000:681.703 - 0.015ms returns 0x00
+T2610 000:681.714 JLINK_WriteReg(R13 (SP), 0x20002000)
+T2610 000:681.725 - 0.015ms returns 0x00
+T2610 000:681.736 JLINK_WriteReg(R14, 0x20000001)
+T2610 000:681.746 - 0.015ms returns 0x00
+T2610 000:681.758 JLINK_WriteReg(R15 (PC), 0x20000288)
+T2610 000:681.768 - 0.015ms returns 0x00
+T2610 000:681.779 JLINK_WriteReg(XPSR, 0x01000000)
+T2610 000:681.789 - 0.014ms returns 0x00
+T2610 000:681.800 JLINK_WriteReg(MSP, 0x20002000)
+T2610 000:681.810 - 0.014ms returns 0x00
+T2610 000:681.821 JLINK_WriteReg(PSP, 0x20002000)
+T2610 000:681.831 - 0.014ms returns 0x00
+T2610 000:681.843 JLINK_WriteReg(CFBP, 0x00000000)
+T2610 000:681.852 - 0.014ms returns 0x00
+T2610 000:681.864   JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2)
+T2610 000:681.880 - 0.020ms returns 0x00000002
+T2610 000:681.891 JLINK_Go()
+T2610 000:681.907   CPU_ReadMem(4 bytes @ 0xE0001000)
+T2610 000:686.896 - 5.021ms
+T2610 000:686.923 JLINK_IsHalted()
+T2610 000:691.485   CPU_ReadMem(2 bytes @ 0x20000000)
+T2610 000:691.976 - 5.064ms returns TRUE
+T2610 000:692.000 JLINK_ReadReg(R15 (PC))
+T2610 000:692.014 - 0.018ms returns 0x20000000
+T2610 000:692.026 JLINK_ClrBPEx(BPHandle = 0x00000002)
+T2610 000:692.037 - 0.015ms returns 0x00
+T2610 000:692.050 JLINK_ReadReg(R0)
+T2610 000:692.060 - 0.015ms returns 0x00000001
+T2610 000:692.075 JLINK_WriteReg(R0, 0x00026000)
+T2610 000:692.086 - 0.062ms returns 0x00
+T2610 000:692.149 JLINK_WriteReg(R1, 0x00001000)
+T2610 000:692.160 - 0.016ms returns 0x00
+T2610 000:692.172 JLINK_WriteReg(R2, 0x000000FF)
+T2610 000:692.182 - 0.015ms returns 0x00
+T2610 000:692.194 JLINK_WriteReg(R3, 0x00000000)
+T2610 000:692.204 - 0.015ms returns 0x00
+T2610 000:692.215 JLINK_WriteReg(R4, 0x00000000)
+T2610 000:692.225 - 0.014ms returns 0x00
+T2610 000:692.238 JLINK_WriteReg(R5, 0x00000000)
+T2610 000:692.248 - 0.014ms returns 0x00
+T2610 000:692.260 JLINK_WriteReg(R6, 0x00000000)
+T2610 000:692.270 - 0.015ms returns 0x00
+T2610 000:692.281 JLINK_WriteReg(R7, 0x00000000)
+T2610 000:692.292 - 0.015ms returns 0x00
+T2610 000:692.304 JLINK_WriteReg(R8, 0x00000000)
+T2610 000:692.314 - 0.015ms returns 0x00
+T2610 000:692.327 JLINK_WriteReg(R9, 0x200005B4)
+T2610 000:692.337 - 0.015ms returns 0x00
+T2610 000:692.348 JLINK_WriteReg(R10, 0x00000000)
+T2610 000:692.365 - 0.021ms returns 0x00
+T2610 000:692.377 JLINK_WriteReg(R11, 0x00000000)
+T2610 000:692.388 - 0.015ms returns 0x00
+T2610 000:692.399 JLINK_WriteReg(R12, 0x00000000)
+T2610 000:692.409 - 0.015ms returns 0x00
+T2610 000:692.422 JLINK_WriteReg(R13 (SP), 0x20002000)
+T2610 000:692.433 - 0.015ms returns 0x00
+T2610 000:692.445 JLINK_WriteReg(R14, 0x20000001)
+T2610 000:692.455 - 0.015ms returns 0x00
+T2610 000:692.468 JLINK_WriteReg(R15 (PC), 0x200000D4)
+T2610 000:692.478 - 0.015ms returns 0x00
+T2610 000:692.491 JLINK_WriteReg(XPSR, 0x01000000)
+T2610 000:692.501 - 0.015ms returns 0x00
+T2610 000:692.514 JLINK_WriteReg(MSP, 0x20002000)
+T2610 000:692.524 - 0.015ms returns 0x00
+T2610 000:692.536 JLINK_WriteReg(PSP, 0x20002000)
+T2610 000:692.547 - 0.015ms returns 0x00
+T2610 000:692.559 JLINK_WriteReg(CFBP, 0x00000000)
+T2610 000:692.569 - 0.015ms returns 0x00
+T2610 000:692.583   JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2)
+T2610 000:692.598 - 0.021ms returns 0x00000003
+T2610 000:692.611 JLINK_Go()
+T2610 000:692.628   CPU_ReadMem(4 bytes @ 0xE0001000)
+T2610 000:697.608 - 5.012ms
+T2610 000:697.635 JLINK_IsHalted()
+T2610 000:698.193 - 0.566ms returns FALSE
+T2610 000:717.525 JLINK_IsHalted()
+T2610 000:722.075   CPU_ReadMem(2 bytes @ 0x20000000)
+T2610 000:722.589 - 5.074ms returns TRUE
+T2610 000:722.607 JLINK_ReadReg(R15 (PC))
+T2610 000:722.619 - 0.017ms returns 0x20000000
+T2610 000:722.631 JLINK_ClrBPEx(BPHandle = 0x00000003)
+T2610 000:722.642 - 0.015ms returns 0x00
+T2610 000:722.653 JLINK_ReadReg(R0)
+T2610 000:722.664 - 0.015ms returns 0x00000000
+T2610 000:723.097 JLINK_WriteReg(R0, 0x00027000)
+T2610 000:723.113 - 0.021ms returns 0x00
+T2610 000:723.125 JLINK_WriteReg(R1, 0x00001000)
+T2610 000:723.135 - 0.015ms returns 0x00
+T2610 000:723.147 JLINK_WriteReg(R2, 0x000000FF)
+T2610 000:723.157 - 0.015ms returns 0x00
+T2610 000:723.168 JLINK_WriteReg(R3, 0x00000000)
+T2610 000:723.178 - 0.014ms returns 0x00
+T2610 000:723.189 JLINK_WriteReg(R4, 0x00000000)
+T2610 000:723.199 - 0.014ms returns 0x00
+T2610 000:723.210 JLINK_WriteReg(R5, 0x00000000)
+T2610 000:723.220 - 0.014ms returns 0x00
+T2610 000:723.232 JLINK_WriteReg(R6, 0x00000000)
+T2610 000:723.242 - 0.014ms returns 0x00
+T2610 000:723.253 JLINK_WriteReg(R7, 0x00000000)
+T2610 000:723.263 - 0.014ms returns 0x00
+T2610 000:723.274 JLINK_WriteReg(R8, 0x00000000)
+T2610 000:723.289 - 0.019ms returns 0x00
+T2610 000:723.300 JLINK_WriteReg(R9, 0x200005B4)
+T2610 000:723.310 - 0.014ms returns 0x00
+T2610 000:723.322 JLINK_WriteReg(R10, 0x00000000)
+T2610 000:723.332 - 0.015ms returns 0x00
+T2610 000:723.343 JLINK_WriteReg(R11, 0x00000000)
+T2610 000:723.353 - 0.015ms returns 0x00
+T2610 000:723.364 JLINK_WriteReg(R12, 0x00000000)
+T2610 000:723.374 - 0.015ms returns 0x00
+T2610 000:723.386 JLINK_WriteReg(R13 (SP), 0x20002000)
+T2610 000:723.396 - 0.015ms returns 0x00
+T2610 000:723.408 JLINK_WriteReg(R14, 0x20000001)
+T2610 000:723.418 - 0.015ms returns 0x00
+T2610 000:723.429 JLINK_WriteReg(R15 (PC), 0x20000288)
+T2610 000:723.439 - 0.014ms returns 0x00
+T2610 000:723.450 JLINK_WriteReg(XPSR, 0x01000000)
+T2610 000:723.460 - 0.015ms returns 0x00
+T2610 000:723.474 JLINK_WriteReg(MSP, 0x20002000)
+T2610 000:723.486 - 0.016ms returns 0x00
+T2610 000:723.497 JLINK_WriteReg(PSP, 0x20002000)
+T2610 000:723.507 - 0.015ms returns 0x00
+T2610 000:723.519 JLINK_WriteReg(CFBP, 0x00000000)
+T2610 000:723.529 - 0.014ms returns 0x00
+T2610 000:723.541   JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2)
+T2610 000:723.556 - 0.020ms returns 0x00000004
+T2610 000:723.568 JLINK_Go()
+T2610 000:723.584   CPU_ReadMem(4 bytes @ 0xE0001000)
+T2610 000:728.580 - 5.022ms
+T2610 000:728.598 JLINK_IsHalted()
+T2610 000:733.034   CPU_ReadMem(2 bytes @ 0x20000000)
+T2610 000:733.548 - 4.959ms returns TRUE
+T2610 000:733.568 JLINK_ReadReg(R15 (PC))
+T2610 000:733.580 - 0.017ms returns 0x20000000
+T2610 000:733.592 JLINK_ClrBPEx(BPHandle = 0x00000004)
+T2610 000:733.602 - 0.015ms returns 0x00
+T2610 000:733.614 JLINK_ReadReg(R0)
+T2610 000:733.624 - 0.015ms returns 0x00000001
+T2610 000:733.639 JLINK_WriteReg(R0, 0x00027000)
+T2610 000:733.649 - 0.015ms returns 0x00
+T2610 000:733.661 JLINK_WriteReg(R1, 0x00001000)
+T2610 000:733.671 - 0.015ms returns 0x00
+T2610 000:733.682 JLINK_WriteReg(R2, 0x000000FF)
+T2610 000:733.692 - 0.014ms returns 0x00
+T2610 000:733.703 JLINK_WriteReg(R3, 0x00000000)
+T2610 000:733.713 - 0.014ms returns 0x00
+T2610 000:733.724 JLINK_WriteReg(R4, 0x00000000)
+T2610 000:733.734 - 0.014ms returns 0x00
+T2610 000:733.746 JLINK_WriteReg(R5, 0x00000000)
+T2610 000:733.755 - 0.014ms returns 0x00
+T2610 000:733.767 JLINK_WriteReg(R6, 0x00000000)
+T2610 000:733.791 - 0.029ms returns 0x00
+T2610 000:733.815 JLINK_WriteReg(R7, 0x00000000)
+T2610 000:733.845 - 0.034ms returns 0x00
+T2610 000:733.868 JLINK_WriteReg(R8, 0x00000000)
+T2610 000:733.879 - 0.029ms returns 0x00
+T2610 000:733.905 JLINK_WriteReg(R9, 0x200005B4)
+T2610 000:733.915 - 0.027ms returns 0x00
+T2610 000:733.939 JLINK_WriteReg(R10, 0x00000000)
+T2610 000:733.949 - 0.014ms returns 0x00
+T2610 000:733.960 JLINK_WriteReg(R11, 0x00000000)
+T2610 000:733.970 - 0.015ms returns 0x00
+T2610 000:733.982 JLINK_WriteReg(R12, 0x00000000)
+T2610 000:733.992 - 0.015ms returns 0x00
+T2610 000:734.004 JLINK_WriteReg(R13 (SP), 0x20002000)
+T2610 000:734.014 - 0.015ms returns 0x00
+T2610 000:734.025 JLINK_WriteReg(R14, 0x20000001)
+T2610 000:734.035 - 0.014ms returns 0x00
+T2610 000:734.046 JLINK_WriteReg(R15 (PC), 0x200000D4)
+T2610 000:734.057 - 0.014ms returns 0x00
+T2610 000:734.068 JLINK_WriteReg(XPSR, 0x01000000)
+T2610 000:734.078 - 0.014ms returns 0x00
+T2610 000:734.089 JLINK_WriteReg(MSP, 0x20002000)
+T2610 000:734.099 - 0.014ms returns 0x00
+T2610 000:734.110 JLINK_WriteReg(PSP, 0x20002000)
+T2610 000:734.120 - 0.014ms returns 0x00
+T2610 000:734.131 JLINK_WriteReg(CFBP, 0x00000000)
+T2610 000:734.141 - 0.014ms returns 0x00
+T2610 000:734.153   JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2)
+T2610 000:734.168 - 0.020ms returns 0x00000005
+T2610 000:734.180 JLINK_Go()
+T2610 000:734.196   CPU_ReadMem(4 bytes @ 0xE0001000)
+T2610 000:739.211 - 5.040ms
+T2610 000:739.229 JLINK_IsHalted()
+T2610 000:739.818 - 0.601ms returns FALSE
+T2610 000:744.737 JLINK_IsHalted()
+T2610 000:749.319   CPU_ReadMem(2 bytes @ 0x20000000)
+T2610 000:749.839 - 5.114ms returns TRUE
+T2610 000:749.863 JLINK_ReadReg(R15 (PC))
+T2610 000:749.876 - 0.018ms returns 0x20000000
+T2610 000:749.910 JLINK_ClrBPEx(BPHandle = 0x00000005)
+T2610 000:749.933 - 0.028ms returns 0x00
+T2610 000:749.946 JLINK_ReadReg(R0)
+T2610 000:749.956 - 0.015ms returns 0x00000000
+T2610 000:750.422 JLINK_WriteReg(R0, 0x00028000)
+T2610 000:750.438 - 0.021ms returns 0x00
+T2610 000:750.450 JLINK_WriteReg(R1, 0x00001000)
+T2610 000:750.460 - 0.015ms returns 0x00
+T2610 000:750.471 JLINK_WriteReg(R2, 0x000000FF)
+T2610 000:750.481 - 0.014ms returns 0x00
+T2610 000:750.492 JLINK_WriteReg(R3, 0x00000000)
+T2610 000:750.502 - 0.014ms returns 0x00
+T2610 000:750.514 JLINK_WriteReg(R4, 0x00000000)
+T2610 000:750.524 - 0.014ms returns 0x00
+T2610 000:750.535 JLINK_WriteReg(R5, 0x00000000)
+T2610 000:750.549 - 0.019ms returns 0x00
+T2610 000:750.561 JLINK_WriteReg(R6, 0x00000000)
+T2610 000:750.574 - 0.020ms returns 0x00
+T2610 000:750.587 JLINK_WriteReg(R7, 0x00000000)
+T2610 000:750.597 - 0.014ms returns 0x00
+T2610 000:750.609 JLINK_WriteReg(R8, 0x00000000)
+T2610 000:750.619 - 0.014ms returns 0x00
+T2610 000:750.630 JLINK_WriteReg(R9, 0x200005B4)
+T2610 000:750.640 - 0.014ms returns 0x00
+T2610 000:750.651 JLINK_WriteReg(R10, 0x00000000)
+T2610 000:750.661 - 0.014ms returns 0x00
+T2610 000:750.672 JLINK_WriteReg(R11, 0x00000000)
+T2610 000:750.682 - 0.014ms returns 0x00
+T2610 000:750.694 JLINK_WriteReg(R12, 0x00000000)
+T2610 000:750.704 - 0.014ms returns 0x00
+T2610 000:750.715 JLINK_WriteReg(R13 (SP), 0x20002000)
+T2610 000:750.727 - 0.017ms returns 0x00
+T2610 000:750.739 JLINK_WriteReg(R14, 0x20000001)
+T2610 000:750.749 - 0.014ms returns 0x00
+T2610 000:750.760 JLINK_WriteReg(R15 (PC), 0x20000288)
+T2610 000:750.770 - 0.015ms returns 0x00
+T2610 000:750.781 JLINK_WriteReg(XPSR, 0x01000000)
+T2610 000:750.791 - 0.014ms returns 0x00
+T2610 000:750.803 JLINK_WriteReg(MSP, 0x20002000)
+T2610 000:750.813 - 0.014ms returns 0x00
+T2610 000:750.824 JLINK_WriteReg(PSP, 0x20002000)
+T2610 000:750.834 - 0.015ms returns 0x00
+T2610 000:750.845 JLINK_WriteReg(CFBP, 0x00000000)
+T2610 000:750.855 - 0.014ms returns 0x00
+T2610 000:750.867   JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2)
+T2610 000:750.882 - 0.020ms returns 0x00000006
+T2610 000:750.894 JLINK_Go()
+T2610 000:750.910   CPU_ReadMem(4 bytes @ 0xE0001000)
+T2610 000:755.749 - 4.883ms
+T2610 000:755.786 JLINK_IsHalted()
+T2610 000:760.365   CPU_ReadMem(2 bytes @ 0x20000000)
+T2610 000:761.014 - 5.254ms returns TRUE
+T2610 000:761.064 JLINK_ReadReg(R15 (PC))
+T2610 000:761.096 - 0.048ms returns 0x20000000
+T2610 000:761.130 JLINK_ClrBPEx(BPHandle = 0x00000006)
+T2610 000:761.160 - 0.043ms returns 0x00
+T2610 000:761.192 JLINK_ReadReg(R0)
+T2610 000:761.221 - 0.043ms returns 0x00000001
+T2610 000:761.260 JLINK_WriteReg(R0, 0x00028000)
+T2610 000:761.290 - 0.043ms returns 0x00
+T2610 000:761.322 JLINK_WriteReg(R1, 0x00001000)
+T2610 000:761.350 - 0.042ms returns 0x00
+T2610 000:761.383 JLINK_WriteReg(R2, 0x000000FF)
+T2610 000:761.411 - 0.042ms returns 0x00
+T2610 000:761.443 JLINK_WriteReg(R3, 0x00000000)
+T2610 000:761.472 - 0.042ms returns 0x00
+T2610 000:761.504 JLINK_WriteReg(R4, 0x00000000)
+T2610 000:761.539 - 0.049ms returns 0x00
+T2610 000:761.572 JLINK_WriteReg(R5, 0x00000000)
+T2610 000:761.601 - 0.042ms returns 0x00
+T2610 000:761.633 JLINK_WriteReg(R6, 0x00000000)
+T2610 000:761.661 - 0.042ms returns 0x00
+T2610 000:761.693 JLINK_WriteReg(R7, 0x00000000)
+T2610 000:761.722 - 0.042ms returns 0x00
+T2610 000:761.754 JLINK_WriteReg(R8, 0x00000000)
+T2610 000:761.782 - 0.042ms returns 0x00
+T2610 000:761.815 JLINK_WriteReg(R9, 0x200005B4)
+T2610 000:761.847 - 0.046ms returns 0x00
+T2610 000:761.879 JLINK_WriteReg(R10, 0x00000000)
+T2610 000:761.908 - 0.043ms returns 0x00
+T2610 000:761.941 JLINK_WriteReg(R11, 0x00000000)
+T2610 000:761.970 - 0.042ms returns 0x00
+T2610 000:762.002 JLINK_WriteReg(R12, 0x00000000)
+T2610 000:762.031 - 0.042ms returns 0x00
+T2610 000:762.063 JLINK_WriteReg(R13 (SP), 0x20002000)
+T2610 000:762.092 - 0.043ms returns 0x00
+T2610 000:762.124 JLINK_WriteReg(R14, 0x20000001)
+T2610 000:762.153 - 0.042ms returns 0x00
+T2610 000:762.185 JLINK_WriteReg(R15 (PC), 0x200000D4)
+T2610 000:762.214 - 0.043ms returns 0x00
+T2610 000:762.247 JLINK_WriteReg(XPSR, 0x01000000)
+T2610 000:762.276 - 0.043ms returns 0x00
+T2610 000:762.309 JLINK_WriteReg(MSP, 0x20002000)
+T2610 000:762.337 - 0.043ms returns 0x00
+T2610 000:762.370 JLINK_WriteReg(PSP, 0x20002000)
+T2610 000:762.400 - 0.043ms returns 0x00
+T2610 000:762.432 JLINK_WriteReg(CFBP, 0x00000000)
+T2610 000:762.461 - 0.044ms returns 0x00
+T2610 000:762.496   JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2)
+T2610 000:762.539 - 0.059ms returns 0x00000007
+T2610 000:762.573 JLINK_Go()
+T2610 000:762.616   CPU_ReadMem(4 bytes @ 0xE0001000)
+T2610 000:767.774 - 5.236ms
+T2610 000:767.834 JLINK_IsHalted()
+T2610 000:768.407 - 0.599ms returns FALSE
+T2610 000:772.907 JLINK_IsHalted()
+T2610 000:777.883   CPU_ReadMem(2 bytes @ 0x20000000)
+T2610 000:778.657 - 5.801ms returns TRUE
+T2610 000:778.743 JLINK_ReadReg(R15 (PC))
+T2610 000:778.783 - 0.054ms returns 0x20000000
+T2610 000:778.818 JLINK_ClrBPEx(BPHandle = 0x00000007)
+T2610 000:778.848 - 0.045ms returns 0x00
+T2610 000:778.882 JLINK_ReadReg(R0)
+T2610 000:778.912 - 0.045ms returns 0x00000000
+T2610 000:780.236 JLINK_WriteReg(R0, 0x00029000)
+T2610 000:780.300 - 0.079ms returns 0x00
+T2610 000:780.334 JLINK_WriteReg(R1, 0x00001000)
+T2610 000:780.363 - 0.043ms returns 0x00
+T2610 000:780.396 JLINK_WriteReg(R2, 0x000000FF)
+T2610 000:780.436 - 0.054ms returns 0x00
+T2610 000:780.469 JLINK_WriteReg(R3, 0x00000000)
+T2610 000:780.497 - 0.042ms returns 0x00
+T2610 000:780.530 JLINK_WriteReg(R4, 0x00000000)
+T2610 000:780.558 - 0.042ms returns 0x00
+T2610 000:780.591 JLINK_WriteReg(R5, 0x00000000)
+T2610 000:780.647 - 0.071ms returns 0x00
+T2610 000:780.681 JLINK_WriteReg(R6, 0x00000000)
+T2610 000:780.710 - 0.043ms returns 0x00
+T2610 000:780.742 JLINK_WriteReg(R7, 0x00000000)
+T2610 000:780.771 - 0.042ms returns 0x00
+T2610 000:780.803 JLINK_WriteReg(R8, 0x00000000)
+T2610 000:780.832 - 0.042ms returns 0x00
+T2610 000:780.864 JLINK_WriteReg(R9, 0x200005B4)
+T2610 000:780.892 - 0.042ms returns 0x00
+T2610 000:780.924 JLINK_WriteReg(R10, 0x00000000)
+T2610 000:780.953 - 0.042ms returns 0x00
+T2610 000:780.986 JLINK_WriteReg(R11, 0x00000000)
+T2610 000:781.014 - 0.042ms returns 0x00
+T2610 000:781.047 JLINK_WriteReg(R12, 0x00000000)
+T2610 000:781.075 - 0.042ms returns 0x00
+T2610 000:781.107 JLINK_WriteReg(R13 (SP), 0x20002000)
+T2610 000:781.138 - 0.044ms returns 0x00
+T2610 000:781.170 JLINK_WriteReg(R14, 0x20000001)
+T2610 000:781.198 - 0.042ms returns 0x00
+T2610 000:781.230 JLINK_WriteReg(R15 (PC), 0x20000288)
+T2610 000:781.259 - 0.042ms returns 0x00
+T2610 000:781.291 JLINK_WriteReg(XPSR, 0x01000000)
+T2610 000:781.319 - 0.042ms returns 0x00
+T2610 000:781.352 JLINK_WriteReg(MSP, 0x20002000)
+T2610 000:781.380 - 0.042ms returns 0x00
+T2610 000:781.412 JLINK_WriteReg(PSP, 0x20002000)
+T2610 000:781.441 - 0.042ms returns 0x00
+T2610 000:781.473 JLINK_WriteReg(CFBP, 0x00000000)
+T2610 000:781.502 - 0.042ms returns 0x00
+T2610 000:781.537   JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2)
+T2610 000:781.581 - 0.059ms returns 0x00000008
+T2610 000:781.619 JLINK_Go()
+T2610 000:781.667   CPU_ReadMem(4 bytes @ 0xE0001000)
+T2610 000:787.092 - 5.525ms
+T2610 000:787.174 JLINK_IsHalted()
+T2610 000:792.106   CPU_ReadMem(2 bytes @ 0x20000000)
+T2610 000:792.907 - 5.792ms returns TRUE
+T2610 000:793.002 JLINK_ReadReg(R15 (PC))
+T2610 000:793.047 - 0.063ms returns 0x20000000
+T2610 000:793.088 JLINK_ClrBPEx(BPHandle = 0x00000008)
+T2610 000:793.124 - 0.052ms returns 0x00
+T2610 000:793.163 JLINK_ReadReg(R0)
+T2610 000:793.197 - 0.051ms returns 0x00000001
+T2610 000:793.244 JLINK_WriteReg(R0, 0x00029000)
+T2610 000:793.280 - 0.052ms returns 0x00
+T2610 000:793.319 JLINK_WriteReg(R1, 0x00001000)
+T2610 000:793.365 - 0.063ms returns 0x00
+T2610 000:793.404 JLINK_WriteReg(R2, 0x000000FF)
+T2610 000:793.438 - 0.050ms returns 0x00
+T2610 000:793.476 JLINK_WriteReg(R3, 0x00000000)
+T2610 000:793.509 - 0.050ms returns 0x00
+T2610 000:793.547 JLINK_WriteReg(R4, 0x00000000)
+T2610 000:793.581 - 0.050ms returns 0x00
+T2610 000:793.619 JLINK_WriteReg(R5, 0x00000000)
+T2610 000:793.653 - 0.050ms returns 0x00
+T2610 000:793.691 JLINK_WriteReg(R6, 0x00000000)
+T2610 000:793.730 - 0.057ms returns 0x00
+T2610 000:793.771 JLINK_WriteReg(R7, 0x00000000)
+T2610 000:793.811 - 0.059ms returns 0x00
+T2610 000:793.856 JLINK_WriteReg(R8, 0x00000000)
+T2610 000:793.891 - 0.052ms returns 0x00
+T2610 000:793.929 JLINK_WriteReg(R9, 0x200005B4)
+T2610 000:793.963 - 0.050ms returns 0x00
+T2610 000:794.001 JLINK_WriteReg(R10, 0x00000000)
+T2610 000:794.034 - 0.050ms returns 0x00
+T2610 000:794.072 JLINK_WriteReg(R11, 0x00000000)
+T2610 000:794.106 - 0.050ms returns 0x00
+T2610 000:794.144 JLINK_WriteReg(R12, 0x00000000)
+T2610 000:794.178 - 0.050ms returns 0x00
+T2610 000:794.315 JLINK_WriteReg(R13 (SP), 0x20002000)
+T2610 000:794.361 - 0.063ms returns 0x00
+T2610 000:794.399 JLINK_WriteReg(R14, 0x20000001)
+T2610 000:794.433 - 0.050ms returns 0x00
+T2610 000:794.471 JLINK_WriteReg(R15 (PC), 0x200000D4)
+T2610 000:794.505 - 0.050ms returns 0x00
+T2610 000:794.543 JLINK_WriteReg(XPSR, 0x01000000)
+T2610 000:794.577 - 0.050ms returns 0x00
+T2610 000:794.615 JLINK_WriteReg(MSP, 0x20002000)
+T2610 000:794.649 - 0.050ms returns 0x00
+T2610 000:794.687 JLINK_WriteReg(PSP, 0x20002000)
+T2610 000:794.720 - 0.050ms returns 0x00
+T2610 000:794.761 JLINK_WriteReg(CFBP, 0x00000000)
+T2610 000:794.795 - 0.050ms returns 0x00
+T2610 000:794.836   JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2)
+T2610 000:794.889 - 0.071ms returns 0x00000009
+T2610 000:794.928 JLINK_Go()
+T2610 000:794.983   CPU_ReadMem(4 bytes @ 0xE0001000)
+T2610 000:800.484 - 5.605ms
+T2610 000:800.566 JLINK_IsHalted()
+T2610 000:801.315 - 0.807ms returns FALSE
+T2610 000:814.631 JLINK_IsHalted()
+T2610 000:819.556   CPU_ReadMem(2 bytes @ 0x20000000)
+T2610 000:820.372 - 5.801ms returns TRUE
+T2610 000:820.466 JLINK_ReadReg(R15 (PC))
+T2610 000:820.511 - 0.063ms returns 0x20000000
+T2610 000:820.553 JLINK_ClrBPEx(BPHandle = 0x00000009)
+T2610 000:820.588 - 0.052ms returns 0x00
+T2610 000:820.633 JLINK_ReadReg(R0)
+T2610 000:820.674 - 0.058ms returns 0x00000000
+T2610 000:822.181 JLINK_WriteReg(R0, 0x0002A000)
+T2610 000:822.246 - 0.083ms returns 0x00
+T2610 000:822.287 JLINK_WriteReg(R1, 0x00001000)
+T2610 000:822.335 - 0.066ms returns 0x00
+T2610 000:822.375 JLINK_WriteReg(R2, 0x000000FF)
+T2610 000:822.409 - 0.051ms returns 0x00
+T2610 000:822.448 JLINK_WriteReg(R3, 0x00000000)
+T2610 000:822.482 - 0.050ms returns 0x00
+T2610 000:822.520 JLINK_WriteReg(R4, 0x00000000)
+T2610 000:822.554 - 0.051ms returns 0x00
+T2610 000:822.593 JLINK_WriteReg(R5, 0x00000000)
+T2610 000:822.626 - 0.050ms returns 0x00
+T2610 000:822.665 JLINK_WriteReg(R6, 0x00000000)
+T2610 000:822.699 - 0.050ms returns 0x00
+T2610 000:822.737 JLINK_WriteReg(R7, 0x00000000)
+T2610 000:822.771 - 0.050ms returns 0x00
+T2610 000:822.809 JLINK_WriteReg(R8, 0x00000000)
+T2610 000:822.843 - 0.050ms returns 0x00
+T2610 000:822.881 JLINK_WriteReg(R9, 0x200005B4)
+T2610 000:822.915 - 0.050ms returns 0x00
+T2610 000:822.953 JLINK_WriteReg(R10, 0x00000000)
+T2610 000:822.987 - 0.051ms returns 0x00
+T2610 000:823.025 JLINK_WriteReg(R11, 0x00000000)
+T2610 000:823.059 - 0.051ms returns 0x00
+T2610 000:823.098 JLINK_WriteReg(R12, 0x00000000)
+T2610 000:823.132 - 0.050ms returns 0x00
+T2610 000:823.170 JLINK_WriteReg(R13 (SP), 0x20002000)
+T2610 000:823.206 - 0.052ms returns 0x00
+T2610 000:823.244 JLINK_WriteReg(R14, 0x20000001)
+T2610 000:823.278 - 0.050ms returns 0x00
+T2610 000:823.323 JLINK_WriteReg(R15 (PC), 0x20000288)
+T2610 000:823.358 - 0.052ms returns 0x00
+T2610 000:823.397 JLINK_WriteReg(XPSR, 0x01000000)
+T2610 000:823.431 - 0.050ms returns 0x00
+T2610 000:823.469 JLINK_WriteReg(MSP, 0x20002000)
+T2610 000:823.503 - 0.050ms returns 0x00
+T2610 000:823.541 JLINK_WriteReg(PSP, 0x20002000)
+T2610 000:823.575 - 0.050ms returns 0x00
+T2610 000:823.613 JLINK_WriteReg(CFBP, 0x00000000)
+T2610 000:823.647 - 0.050ms returns 0x00
+T2610 000:823.688   JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2)
+T2610 000:823.739 - 0.070ms returns 0x0000000A
+T2610 000:823.779 JLINK_Go()
+T2610 000:823.834   CPU_ReadMem(4 bytes @ 0xE0001000)
+T2610 000:829.114 - 5.396ms
+T2610 000:829.210 JLINK_IsHalted()
+T2610 000:834.096   CPU_ReadMem(2 bytes @ 0x20000000)
+T2610 000:834.883 - 5.732ms returns TRUE
+T2610 000:834.984 JLINK_ReadReg(R15 (PC))
+T2610 000:835.030 - 0.064ms returns 0x20000000
+T2610 000:835.081 JLINK_ClrBPEx(BPHandle = 0x0000000A)
+T2610 000:835.124 - 0.060ms returns 0x00
+T2610 000:835.167 JLINK_ReadReg(R0)
+T2610 000:835.203 - 0.052ms returns 0x00000001
+T2610 000:835.254 JLINK_WriteReg(R0, 0x0002A000)
+T2610 000:835.291 - 0.053ms returns 0x00
+T2610 000:835.334 JLINK_WriteReg(R1, 0x00001000)
+T2610 000:835.369 - 0.051ms returns 0x00
+T2610 000:835.410 JLINK_WriteReg(R2, 0x000000FF)
+T2610 000:835.456 - 0.062ms returns 0x00
+T2610 000:835.499 JLINK_WriteReg(R3, 0x00000000)
+T2610 000:835.534 - 0.051ms returns 0x00
+T2610 000:835.575 JLINK_WriteReg(R4, 0x00000000)
+T2610 000:835.609 - 0.050ms returns 0x00
+T2610 000:835.652 JLINK_WriteReg(R5, 0x00000000)
+T2610 000:835.686 - 0.051ms returns 0x00
+T2610 000:835.727 JLINK_WriteReg(R6, 0x00000000)
+T2610 000:835.768 - 0.058ms returns 0x00
+T2610 000:835.813 JLINK_WriteReg(R7, 0x00000000)
+T2610 000:835.849 - 0.052ms returns 0x00
+T2610 000:835.889 JLINK_WriteReg(R8, 0x00000000)
+T2610 000:835.924 - 0.050ms returns 0x00
+T2610 000:835.966 JLINK_WriteReg(R9, 0x200005B4)
+T2610 000:836.000 - 0.050ms returns 0x00
+T2610 000:836.041 JLINK_WriteReg(R10, 0x00000000)
+T2610 000:836.076 - 0.051ms returns 0x00
+T2610 000:836.118 JLINK_WriteReg(R11, 0x00000000)
+T2610 000:836.152 - 0.051ms returns 0x00
+T2610 000:836.193 JLINK_WriteReg(R12, 0x00000000)
+T2610 000:836.227 - 0.051ms returns 0x00
+T2610 000:836.270 JLINK_WriteReg(R13 (SP), 0x20002000)
+T2610 000:836.305 - 0.052ms returns 0x00
+T2610 000:836.346 JLINK_WriteReg(R14, 0x20000001)
+T2610 000:836.380 - 0.051ms returns 0x00
+T2610 000:836.422 JLINK_WriteReg(R15 (PC), 0x200000D4)
+T2610 000:836.457 - 0.051ms returns 0x00
+T2610 000:836.498 JLINK_WriteReg(XPSR, 0x01000000)
+T2610 000:836.532 - 0.051ms returns 0x00
+T2610 000:836.572 JLINK_WriteReg(MSP, 0x20002000)
+T2610 000:836.605 - 0.050ms returns 0x00
+T2610 000:836.646 JLINK_WriteReg(PSP, 0x20002000)
+T2610 000:836.680 - 0.050ms returns 0x00
+T2610 000:836.722 JLINK_WriteReg(CFBP, 0x00000000)
+T2610 000:836.756 - 0.052ms returns 0x00
+T2610 000:836.806   JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2)
+T2610 000:836.858 - 0.070ms returns 0x0000000B
+T2610 000:836.901 JLINK_Go()
+T2610 000:836.955   CPU_ReadMem(4 bytes @ 0xE0001000)
+T2610 000:842.236 - 5.375ms
+T2610 000:842.313 JLINK_IsHalted()
+T2610 000:842.933 - 0.660ms returns FALSE
+T2610 000:854.881 JLINK_IsHalted()
+T2610 000:859.809   CPU_ReadMem(2 bytes @ 0x20000000)
+T2610 000:860.540 - 5.704ms returns TRUE
+T2610 000:860.634 JLINK_ReadReg(R15 (PC))
+T2610 000:860.681 - 0.065ms returns 0x20000000
+T2610 000:860.722 JLINK_ClrBPEx(BPHandle = 0x0000000B)
+T2610 000:860.758 - 0.053ms returns 0x00
+T2610 000:860.798 JLINK_ReadReg(R0)
+T2610 000:860.832 - 0.051ms returns 0x00000000
+T2610 000:862.585 JLINK_WriteReg(R0, 0x0002B000)
+T2610 000:862.680 - 0.115ms returns 0x00
+T2610 000:862.812 JLINK_WriteReg(R1, 0x00001000)
+T2610 000:862.852 - 0.057ms returns 0x00
+T2610 000:862.892 JLINK_WriteReg(R2, 0x000000FF)
+T2610 000:862.926 - 0.052ms returns 0x00
+T2610 000:862.966 JLINK_WriteReg(R3, 0x00000000)
+T2610 000:863.000 - 0.051ms returns 0x00
+T2610 000:863.039 JLINK_WriteReg(R4, 0x00000000)
+T2610 000:863.075 - 0.052ms returns 0x00
+T2610 000:863.114 JLINK_WriteReg(R5, 0x00000000)
+T2610 000:863.148 - 0.051ms returns 0x00
+T2610 000:863.186 JLINK_WriteReg(R6, 0x00000000)
+T2610 000:863.220 - 0.050ms returns 0x00
+T2610 000:863.259 JLINK_WriteReg(R7, 0x00000000)
+T2610 000:863.294 - 0.051ms returns 0x00
+T2610 000:863.333 JLINK_WriteReg(R8, 0x00000000)
+T2610 000:863.368 - 0.051ms returns 0x00
+T2610 000:863.406 JLINK_WriteReg(R9, 0x200005B4)
+T2610 000:863.441 - 0.051ms returns 0x00
+T2610 000:863.479 JLINK_WriteReg(R10, 0x00000000)
+T2610 000:863.515 - 0.052ms returns 0x00
+T2610 000:863.553 JLINK_WriteReg(R11, 0x00000000)
+T2610 000:863.588 - 0.052ms returns 0x00
+T2610 000:863.630 JLINK_WriteReg(R12, 0x00000000)
+T2610 000:863.665 - 0.051ms returns 0x00
+T2610 000:863.704 JLINK_WriteReg(R13 (SP), 0x20002000)
+T2610 000:863.741 - 0.053ms returns 0x00
+T2610 000:863.779 JLINK_WriteReg(R14, 0x20000001)
+T2610 000:863.813 - 0.050ms returns 0x00
+T2610 000:863.852 JLINK_WriteReg(R15 (PC), 0x20000288)
+T2610 000:863.886 - 0.051ms returns 0x00
+T2610 000:863.925 JLINK_WriteReg(XPSR, 0x01000000)
+T2610 000:863.959 - 0.050ms returns 0x00
+T2610 000:863.997 JLINK_WriteReg(MSP, 0x20002000)
+T2610 000:864.030 - 0.050ms returns 0x00
+T2610 000:864.068 JLINK_WriteReg(PSP, 0x20002000)
+T2610 000:864.110 - 0.062ms returns 0x00
+T2610 000:864.153 JLINK_WriteReg(CFBP, 0x00000000)
+T2610 000:864.187 - 0.050ms returns 0x00
+T2610 000:864.228   JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2)
+T2610 000:864.280 - 0.070ms returns 0x0000000C
+T2610 000:864.319 JLINK_Go()
+T2610 000:864.377   CPU_ReadMem(4 bytes @ 0xE0001000)
+T2610 000:869.753 - 5.500ms
+T2610 000:869.868 JLINK_IsHalted()
+T2610 000:874.830   CPU_ReadMem(2 bytes @ 0x20000000)
+T2610 000:875.501 - 5.672ms returns TRUE
+T2610 000:875.579 JLINK_ReadReg(R15 (PC))
+T2610 000:875.623 - 0.062ms returns 0x20000000
+T2610 000:875.669 JLINK_ClrBPEx(BPHandle = 0x0000000C)
+T2610 000:875.705 - 0.053ms returns 0x00
+T2610 000:875.751 JLINK_ReadReg(R0)
+T2610 000:875.787 - 0.052ms returns 0x00000001
+T2610 000:875.838 JLINK_WriteReg(R0, 0x0002B000)
+T2610 000:875.875 - 0.053ms returns 0x00
+T2610 000:875.916 JLINK_WriteReg(R1, 0x00001000)
+T2610 000:875.951 - 0.051ms returns 0x00
+T2610 000:875.994 JLINK_WriteReg(R2, 0x000000FF)
+T2610 000:876.028 - 0.050ms returns 0x00
+T2610 000:876.069 JLINK_WriteReg(R3, 0x00000000)
+T2610 000:876.103 - 0.050ms returns 0x00
+T2610 000:876.145 JLINK_WriteReg(R4, 0x00000000)
+T2610 000:876.179 - 0.051ms returns 0x00
+T2610 000:876.220 JLINK_WriteReg(R5, 0x00000000)
+T2610 000:876.255 - 0.050ms returns 0x00
+T2610 000:876.299 JLINK_WriteReg(R6, 0x00000000)
+T2610 000:876.333 - 0.050ms returns 0x00
+T2610 000:876.375 JLINK_WriteReg(R7, 0x00000000)
+T2610 000:876.409 - 0.051ms returns 0x00
+T2610 000:876.451 JLINK_WriteReg(R8, 0x00000000)
+T2610 000:876.486 - 0.051ms returns 0x00
+T2610 000:876.527 JLINK_WriteReg(R9, 0x200005B4)
+T2610 000:876.562 - 0.051ms returns 0x00
+T2610 000:876.603 JLINK_WriteReg(R10, 0x00000000)
+T2610 000:876.638 - 0.051ms returns 0x00
+T2610 000:876.681 JLINK_WriteReg(R11, 0x00000000)
+T2610 000:876.718 - 0.053ms returns 0x00
+T2610 000:876.759 JLINK_WriteReg(R12, 0x00000000)
+T2610 000:876.794 - 0.051ms returns 0x00
+T2610 000:876.836 JLINK_WriteReg(R13 (SP), 0x20002000)
+T2610 000:876.872 - 0.052ms returns 0x00
+T2610 000:876.914 JLINK_WriteReg(R14, 0x20000001)
+T2610 000:876.948 - 0.051ms returns 0x00
+T2610 000:876.991 JLINK_WriteReg(R15 (PC), 0x200000D4)
+T2610 000:877.025 - 0.051ms returns 0x00
+T2610 000:877.067 JLINK_WriteReg(XPSR, 0x01000000)
+T2610 000:877.102 - 0.051ms returns 0x00
+T2610 000:877.144 JLINK_WriteReg(MSP, 0x20002000)
+T2610 000:877.179 - 0.050ms returns 0x00
+T2610 000:877.220 JLINK_WriteReg(PSP, 0x20002000)
+T2610 000:877.254 - 0.051ms returns 0x00
+T2610 000:877.296 JLINK_WriteReg(CFBP, 0x00000000)
+T2610 000:877.331 - 0.050ms returns 0x00
+T2610 000:877.374   JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2)
+T2610 000:877.425 - 0.070ms returns 0x0000000D
+T2610 000:877.467 JLINK_Go()
+T2610 000:877.524   CPU_ReadMem(4 bytes @ 0xE0001000)
+T2610 000:882.866 - 5.448ms
+T2610 000:882.957 JLINK_IsHalted()
+T2610 000:883.585 - 0.671ms returns FALSE
+T2610 000:888.813 JLINK_IsHalted()
+T2610 000:893.948   CPU_ReadMem(2 bytes @ 0x20000000)
+T2610 000:894.744 - 5.990ms returns TRUE
+T2610 000:894.839 JLINK_ReadReg(R15 (PC))
+T2610 000:894.901 - 0.082ms returns 0x20000000
+T2610 000:894.944 JLINK_ClrBPEx(BPHandle = 0x0000000D)
+T2610 000:894.981 - 0.055ms returns 0x00
+T2610 000:895.023 JLINK_ReadReg(R0)
+T2610 000:895.057 - 0.051ms returns 0x00000000
+T2610 000:896.566 JLINK_WriteReg(R0, 0x0002C000)
+T2610 000:896.634 - 0.086ms returns 0x00
+T2610 000:896.675 JLINK_WriteReg(R1, 0x00001000)
+T2610 000:896.709 - 0.051ms returns 0x00
+T2610 000:896.748 JLINK_WriteReg(R2, 0x000000FF)
+T2610 000:896.782 - 0.050ms returns 0x00
+T2610 000:896.821 JLINK_WriteReg(R3, 0x00000000)
+T2610 000:896.854 - 0.050ms returns 0x00
+T2610 000:896.913 JLINK_WriteReg(R4, 0x00000000)
+T2610 000:896.948 - 0.052ms returns 0x00
+T2610 000:896.987 JLINK_WriteReg(R5, 0x00000000)
+T2610 000:897.022 - 0.051ms returns 0x00
+T2610 000:897.060 JLINK_WriteReg(R6, 0x00000000)
+T2610 000:897.094 - 0.050ms returns 0x00
+T2610 000:897.133 JLINK_WriteReg(R7, 0x00000000)
+T2610 000:897.167 - 0.051ms returns 0x00
+T2610 000:897.215 JLINK_WriteReg(R8, 0x00000000)
+T2610 000:897.255 - 0.057ms returns 0x00
+T2610 000:897.294 JLINK_WriteReg(R9, 0x200005B4)
+T2610 000:897.328 - 0.050ms returns 0x00
+T2610 000:897.366 JLINK_WriteReg(R10, 0x00000000)
+T2610 000:897.400 - 0.050ms returns 0x00
+T2610 000:897.439 JLINK_WriteReg(R11, 0x00000000)
+T2610 000:897.473 - 0.051ms returns 0x00
+T2610 000:897.512 JLINK_WriteReg(R12, 0x00000000)
+T2610 000:897.547 - 0.051ms returns 0x00
+T2610 000:897.586 JLINK_WriteReg(R13 (SP), 0x20002000)
+T2610 000:897.637 - 0.069ms returns 0x00
+T2610 000:897.678 JLINK_WriteReg(R14, 0x20000001)
+T2610 000:897.713 - 0.051ms returns 0x00
+T2610 000:897.752 JLINK_WriteReg(R15 (PC), 0x20000288)
+T2610 000:897.786 - 0.051ms returns 0x00
+T2610 000:897.825 JLINK_WriteReg(XPSR, 0x01000000)
+T2610 000:897.859 - 0.058ms returns 0x00
+T2610 000:897.908 JLINK_WriteReg(MSP, 0x20002000)
+T2610 000:897.945 - 0.054ms returns 0x00
+T2610 000:897.984 JLINK_WriteReg(PSP, 0x20002000)
+T2610 000:898.019 - 0.051ms returns 0x00
+T2610 000:898.058 JLINK_WriteReg(CFBP, 0x00000000)
+T2610 000:898.093 - 0.051ms returns 0x00
+T2610 000:898.135   JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2)
+T2610 000:898.187 - 0.071ms returns 0x0000000E
+T2610 000:898.227 JLINK_Go()
+T2610 000:898.284   CPU_ReadMem(4 bytes @ 0xE0001000)
+T2610 000:903.576 - 5.400ms
+T2610 000:903.661 JLINK_IsHalted()
+T2610 000:908.420   CPU_ReadMem(2 bytes @ 0x20000000)
+T2610 000:909.148 - 5.528ms returns TRUE
+T2610 000:909.228 JLINK_ReadReg(R15 (PC))
+T2610 000:909.342 - 0.145ms returns 0x20000000
+T2610 000:909.407 JLINK_ClrBPEx(BPHandle = 0x0000000E)
+T2610 000:909.446 - 0.057ms returns 0x00
+T2610 000:909.491 JLINK_ReadReg(R0)
+T2610 000:909.527 - 0.054ms returns 0x00000001
+T2610 000:909.580 JLINK_WriteReg(R0, 0x0002C000)
+T2610 000:909.617 - 0.054ms returns 0x00
+T2610 000:909.661 JLINK_WriteReg(R1, 0x00001000)
+T2610 000:909.696 - 0.052ms returns 0x00
+T2610 000:909.739 JLINK_WriteReg(R2, 0x000000FF)
+T2610 000:909.774 - 0.052ms returns 0x00
+T2610 000:909.817 JLINK_WriteReg(R3, 0x00000000)
+T2610 000:909.853 - 0.053ms returns 0x00
+T2610 000:909.929 JLINK_WriteReg(R4, 0x00000000)
+T2610 000:909.968 - 0.057ms returns 0x00
+T2610 000:910.012 JLINK_WriteReg(R5, 0x00000000)
+T2610 000:910.048 - 0.052ms returns 0x00
+T2610 000:910.091 JLINK_WriteReg(R6, 0x00000000)
+T2610 000:910.125 - 0.050ms returns 0x00
+T2610 000:910.166 JLINK_WriteReg(R7, 0x00000000)
+T2610 000:910.200 - 0.051ms returns 0x00
+T2610 000:910.305 JLINK_WriteReg(R8, 0x00000000)
+T2610 000:910.370 - 0.084ms returns 0x00
+T2610 000:910.416 JLINK_WriteReg(R9, 0x200005B4)
+T2610 000:910.454 - 0.055ms returns 0x00
+T2610 000:910.497 JLINK_WriteReg(R10, 0x00000000)
+T2610 000:910.532 - 0.053ms returns 0x00
+T2610 000:910.576 JLINK_WriteReg(R11, 0x00000000)
+T2610 000:910.612 - 0.052ms returns 0x00
+T2610 000:910.654 JLINK_WriteReg(R12, 0x00000000)
+T2610 000:910.699 - 0.062ms returns 0x00
+T2610 000:910.742 JLINK_WriteReg(R13 (SP), 0x20002000)
+T2610 000:910.778 - 0.053ms returns 0x00
+T2610 000:910.821 JLINK_WriteReg(R14, 0x20000001)
+T2610 000:910.864 - 0.060ms returns 0x00
+T2610 000:910.907 JLINK_WriteReg(R15 (PC), 0x200000D4)
+T2610 000:910.943 - 0.052ms returns 0x00
+T2610 000:910.985 JLINK_WriteReg(XPSR, 0x01000000)
+T2610 000:911.025 - 0.117ms returns 0x00
+T2610 000:911.158 JLINK_WriteReg(MSP, 0x20002000)
+T2610 000:911.204 - 0.065ms returns 0x00
+T2610 000:911.249 JLINK_WriteReg(PSP, 0x20002000)
+T2610 000:911.284 - 0.052ms returns 0x00
+T2610 000:911.327 JLINK_WriteReg(CFBP, 0x00000000)
+T2610 000:911.362 - 0.051ms returns 0x00
+T2610 000:911.407   JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2)
+T2610 000:911.460 - 0.071ms returns 0x0000000F
+T2610 000:911.504 JLINK_Go()
+T2610 000:911.557   CPU_ReadMem(4 bytes @ 0xE0001000)
+T2610 000:917.013 - 5.569ms
+T2610 000:917.116 JLINK_IsHalted()
+T2610 000:917.887 - 0.835ms returns FALSE
+T2610 000:926.914 JLINK_IsHalted()
+T2610 000:931.983   CPU_ReadMem(2 bytes @ 0x20000000)
+T2610 000:932.783 - 5.937ms returns TRUE
+T2610 000:932.887 JLINK_ReadReg(R15 (PC))
+T2610 000:932.944 - 0.075ms returns 0x20000000
+T2610 000:932.985 JLINK_ClrBPEx(BPHandle = 0x0000000F)
+T2610 000:933.021 - 0.052ms returns 0x00
+T2610 000:933.061 JLINK_ReadReg(R0)
+T2610 000:933.095 - 0.051ms returns 0x00000000
+T2610 000:936.271 JLINK_WriteReg(R0, 0x0002D000)
+T2610 000:936.344 - 0.091ms returns 0x00
+T2610 000:936.386 JLINK_WriteReg(R1, 0x00001000)
+T2610 000:936.421 - 0.052ms returns 0x00
+T2610 000:936.459 JLINK_WriteReg(R2, 0x000000FF)
+T2610 000:936.493 - 0.050ms returns 0x00
+T2610 000:936.531 JLINK_WriteReg(R3, 0x00000000)
+T2610 000:936.565 - 0.050ms returns 0x00
+T2610 000:936.603 JLINK_WriteReg(R4, 0x00000000)
+T2610 000:936.636 - 0.050ms returns 0x00
+T2610 000:936.674 JLINK_WriteReg(R5, 0x00000000)
+T2610 000:936.707 - 0.050ms returns 0x00
+T2610 000:936.745 JLINK_WriteReg(R6, 0x00000000)
+T2610 000:936.779 - 0.050ms returns 0x00
+T2610 000:936.830 JLINK_WriteReg(R7, 0x00000000)
+T2610 000:936.866 - 0.052ms returns 0x00
+T2610 000:936.904 JLINK_WriteReg(R8, 0x00000000)
+T2610 000:936.938 - 0.050ms returns 0x00
+T2610 000:936.976 JLINK_WriteReg(R9, 0x200005B4)
+T2610 000:937.010 - 0.050ms returns 0x00
+T2610 000:937.048 JLINK_WriteReg(R10, 0x00000000)
+T2610 000:937.093 - 0.062ms returns 0x00
+T2610 000:937.132 JLINK_WriteReg(R11, 0x00000000)
+T2610 000:937.166 - 0.051ms returns 0x00
+T2610 000:937.204 JLINK_WriteReg(R12, 0x00000000)
+T2610 000:937.238 - 0.050ms returns 0x00
+T2610 000:937.277 JLINK_WriteReg(R13 (SP), 0x20002000)
+T2610 000:937.312 - 0.052ms returns 0x00
+T2610 000:937.351 JLINK_WriteReg(R14, 0x20000001)
+T2610 000:937.385 - 0.050ms returns 0x00
+T2610 000:937.423 JLINK_WriteReg(R15 (PC), 0x20000288)
+T2610 000:937.458 - 0.051ms returns 0x00
+T2610 000:937.496 JLINK_WriteReg(XPSR, 0x01000000)
+T2610 000:937.530 - 0.050ms returns 0x00
+T2610 000:937.568 JLINK_WriteReg(MSP, 0x20002000)
+T2610 000:937.602 - 0.050ms returns 0x00
+T2610 000:937.640 JLINK_WriteReg(PSP, 0x20002000)
+T2610 000:937.674 - 0.050ms returns 0x00
+T2610 000:937.713 JLINK_WriteReg(CFBP, 0x00000000)
+T2610 000:937.746 - 0.050ms returns 0x00
+T2610 000:937.787   JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2)
+T2610 000:937.860 - 0.093ms returns 0x00000010
+T2610 000:937.901 JLINK_Go()
+T2610 000:937.958   CPU_ReadMem(4 bytes @ 0xE0001000)
+T2610 000:943.339 - 5.498ms
+T2610 000:943.435 JLINK_IsHalted()
+T2610 000:948.482   CPU_ReadMem(2 bytes @ 0x20000000)
+T2610 000:949.189 - 5.802ms returns TRUE
+T2610 000:949.278 JLINK_ReadReg(R15 (PC))
+T2610 000:949.325 - 0.065ms returns 0x20000000
+T2610 000:949.370 JLINK_ClrBPEx(BPHandle = 0x00000010)
+T2610 000:949.407 - 0.055ms returns 0x00
+T2610 000:949.453 JLINK_ReadReg(R0)
+T2610 000:949.488 - 0.052ms returns 0x00000001
+T2610 000:949.539 JLINK_WriteReg(R0, 0x0002D000)
+T2610 000:949.576 - 0.054ms returns 0x00
+T2610 000:949.618 JLINK_WriteReg(R1, 0x00001000)
+T2610 000:949.652 - 0.051ms returns 0x00
+T2610 000:949.691 JLINK_WriteReg(R2, 0x000000FF)
+T2610 000:949.724 - 0.050ms returns 0x00
+T2610 000:949.766 JLINK_WriteReg(R3, 0x00000000)
+T2610 000:949.824 - 0.075ms returns 0x00
+T2610 000:949.959 JLINK_WriteReg(R4, 0x00000000)
+T2610 000:950.016 - 0.076ms returns 0x00
+T2610 000:950.058 JLINK_WriteReg(R5, 0x00000000)
+T2610 000:950.094 - 0.053ms returns 0x00
+T2610 000:950.133 JLINK_WriteReg(R6, 0x00000000)
+T2610 000:950.168 - 0.052ms returns 0x00
+T2610 000:950.207 JLINK_WriteReg(R7, 0x00000000)
+T2610 000:950.241 - 0.051ms returns 0x00
+T2610 000:950.280 JLINK_WriteReg(R8, 0x00000000)
+T2610 000:950.315 - 0.051ms returns 0x00
+T2610 000:950.352 JLINK_WriteReg(R9, 0x200005B4)
+T2610 000:950.398 - 0.063ms returns 0x00
+T2610 000:950.437 JLINK_WriteReg(R10, 0x00000000)
+T2610 000:950.473 - 0.052ms returns 0x00
+T2610 000:950.512 JLINK_WriteReg(R11, 0x00000000)
+T2610 000:950.546 - 0.051ms returns 0x00
+T2610 000:950.585 JLINK_WriteReg(R12, 0x00000000)
+T2610 000:950.619 - 0.051ms returns 0x00
+T2610 000:950.658 JLINK_WriteReg(R13 (SP), 0x20002000)
+T2610 000:950.694 - 0.053ms returns 0x00
+T2610 000:950.732 JLINK_WriteReg(R14, 0x20000001)
+T2610 000:950.774 - 0.077ms returns 0x00
+T2610 000:950.833 JLINK_WriteReg(R15 (PC), 0x200000D4)
+T2610 000:950.868 - 0.052ms returns 0x00
+T2610 000:950.907 JLINK_WriteReg(XPSR, 0x01000000)
+T2610 000:950.942 - 0.051ms returns 0x00
+T2610 000:950.981 JLINK_WriteReg(MSP, 0x20002000)
+T2610 000:951.015 - 0.051ms returns 0x00
+T2610 000:951.054 JLINK_WriteReg(PSP, 0x20002000)
+T2610 000:951.089 - 0.051ms returns 0x00
+T2610 000:951.127 JLINK_WriteReg(CFBP, 0x00000000)
+T2610 000:951.161 - 0.051ms returns 0x00
+T2610 000:951.203   JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2)
+T2610 000:951.255 - 0.071ms returns 0x00000011
+T2610 000:951.295 JLINK_Go()
+T2610 000:951.349   CPU_ReadMem(4 bytes @ 0xE0001000)
+T2610 000:956.866 - 5.636ms
+T2610 000:956.967 JLINK_IsHalted()
+T2610 000:957.704 - 0.795ms returns FALSE
+T2610 000:970.961 JLINK_IsHalted()
+T2610 000:975.964   CPU_ReadMem(2 bytes @ 0x20000000)
+T2610 000:976.760 - 5.858ms returns TRUE
+T2610 000:976.861 JLINK_ReadReg(R15 (PC))
+T2610 000:976.907 - 0.065ms returns 0x20000000
+T2610 000:976.952 JLINK_ClrBPEx(BPHandle = 0x00000011)
+T2610 000:976.989 - 0.053ms returns 0x00
+T2610 000:977.032 JLINK_ReadReg(R0)
+T2610 000:977.066 - 0.052ms returns 0x00000000
+T2610 000:978.553 JLINK_WriteReg(R0, 0x0002E000)
+T2610 000:978.615 - 0.080ms returns 0x00
+T2610 000:978.655 JLINK_WriteReg(R1, 0x00001000)
+T2610 000:978.690 - 0.063ms returns 0x00
+T2610 000:978.741 JLINK_WriteReg(R2, 0x000000FF)
+T2610 000:978.775 - 0.051ms returns 0x00
+T2610 000:978.814 JLINK_WriteReg(R3, 0x00000000)
+T2610 000:978.849 - 0.051ms returns 0x00
+T2610 000:978.888 JLINK_WriteReg(R4, 0x00000000)
+T2610 000:978.922 - 0.050ms returns 0x00
+T2610 000:978.960 JLINK_WriteReg(R5, 0x00000000)
+T2610 000:978.994 - 0.051ms returns 0x00
+T2610 000:979.032 JLINK_WriteReg(R6, 0x00000000)
+T2610 000:979.066 - 0.050ms returns 0x00
+T2610 000:979.105 JLINK_WriteReg(R7, 0x00000000)
+T2610 000:979.152 - 0.064ms returns 0x00
+T2610 000:979.191 JLINK_WriteReg(R8, 0x00000000)
+T2610 000:979.226 - 0.051ms returns 0x00
+T2610 000:979.264 JLINK_WriteReg(R9, 0x200005B4)
+T2610 000:979.298 - 0.051ms returns 0x00
+T2610 000:979.337 JLINK_WriteReg(R10, 0x00000000)
+T2610 000:979.372 - 0.051ms returns 0x00
+T2610 000:979.410 JLINK_WriteReg(R11, 0x00000000)
+T2610 000:979.445 - 0.052ms returns 0x00
+T2610 000:979.484 JLINK_WriteReg(R12, 0x00000000)
+T2610 000:979.518 - 0.051ms returns 0x00
+T2610 000:979.557 JLINK_WriteReg(R13 (SP), 0x20002000)
+T2610 000:979.594 - 0.053ms returns 0x00
+T2610 000:979.634 JLINK_WriteReg(R14, 0x20000001)
+T2610 000:979.669 - 0.052ms returns 0x00
+T2610 000:979.719 JLINK_WriteReg(R15 (PC), 0x20000288)
+T2610 000:979.756 - 0.054ms returns 0x00
+T2610 000:979.795 JLINK_WriteReg(XPSR, 0x01000000)
+T2610 000:979.830 - 0.051ms returns 0x00
+T2610 000:979.868 JLINK_WriteReg(MSP, 0x20002000)
+T2610 000:979.902 - 0.050ms returns 0x00
+T2610 000:979.941 JLINK_WriteReg(PSP, 0x20002000)
+T2610 000:979.975 - 0.051ms returns 0x00
+T2610 000:980.013 JLINK_WriteReg(CFBP, 0x00000000)
+T2610 000:980.047 - 0.050ms returns 0x00
+T2610 000:980.088   JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2)
+T2610 000:980.139 - 0.070ms returns 0x00000012
+T2610 000:980.179 JLINK_Go()
+T2610 000:980.236   CPU_ReadMem(4 bytes @ 0xE0001000)
+T2610 000:985.795 - 5.675ms
+T2610 000:985.890 JLINK_IsHalted()
+T2610 000:990.923   CPU_ReadMem(2 bytes @ 0x20000000)
+T2610 000:991.705 - 5.879ms returns TRUE
+T2610 000:991.804 JLINK_ReadReg(R15 (PC))
+T2610 000:991.850 - 0.063ms returns 0x20000000
+T2610 000:991.891 JLINK_ClrBPEx(BPHandle = 0x00000012)
+T2610 000:991.926 - 0.052ms returns 0x00
+T2610 000:991.966 JLINK_ReadReg(R0)
+T2610 000:992.000 - 0.051ms returns 0x00000001
+T2610 000:992.048 JLINK_WriteReg(R0, 0x0002E000)
+T2610 000:992.084 - 0.052ms returns 0x00
+T2610 000:992.123 JLINK_WriteReg(R1, 0x00001000)
+T2610 000:992.156 - 0.050ms returns 0x00
+T2610 000:992.195 JLINK_WriteReg(R2, 0x000000FF)
+T2610 000:992.228 - 0.050ms returns 0x00
+T2610 000:992.266 JLINK_WriteReg(R3, 0x00000000)
+T2610 000:992.300 - 0.057ms returns 0x00
+T2610 000:992.349 JLINK_WriteReg(R4, 0x00000000)
+T2610 000:992.384 - 0.050ms returns 0x00
+T2610 000:992.422 JLINK_WriteReg(R5, 0x00000000)
+T2610 000:992.455 - 0.049ms returns 0x00
+T2610 000:992.493 JLINK_WriteReg(R6, 0x00000000)
+T2610 000:992.538 - 0.062ms returns 0x00
+T2610 000:992.577 JLINK_WriteReg(R7, 0x00000000)
+T2610 000:992.611 - 0.050ms returns 0x00
+T2610 000:992.648 JLINK_WriteReg(R8, 0x00000000)
+T2610 000:992.682 - 0.050ms returns 0x00
+T2610 000:992.720 JLINK_WriteReg(R9, 0x200005B4)
+T2610 000:992.754 - 0.049ms returns 0x00
+T2610 000:992.796 JLINK_WriteReg(R10, 0x00000000)
+T2610 000:992.830 - 0.051ms returns 0x00
+T2610 000:992.869 JLINK_WriteReg(R11, 0x00000000)
+T2610 000:992.903 - 0.050ms returns 0x00
+T2610 000:992.941 JLINK_WriteReg(R12, 0x00000000)
+T2610 000:992.974 - 0.050ms returns 0x00
+T2610 000:993.012 JLINK_WriteReg(R13 (SP), 0x20002000)
+T2610 000:993.048 - 0.052ms returns 0x00
+T2610 000:993.086 JLINK_WriteReg(R14, 0x20000001)
+T2610 000:993.120 - 0.050ms returns 0x00
+T2610 000:993.158 JLINK_WriteReg(R15 (PC), 0x200000D4)
+T2610 000:993.192 - 0.050ms returns 0x00
+T2610 000:993.230 JLINK_WriteReg(XPSR, 0x01000000)
+T2610 000:993.263 - 0.050ms returns 0x00
+T2610 000:993.302 JLINK_WriteReg(MSP, 0x20002000)
+T2610 000:993.336 - 0.050ms returns 0x00
+T2610 000:993.374 JLINK_WriteReg(PSP, 0x20002000)
+T2610 000:993.408 - 0.050ms returns 0x00
+T2610 000:993.446 JLINK_WriteReg(CFBP, 0x00000000)
+T2610 000:993.479 - 0.050ms returns 0x00
+T2610 000:993.520   JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2)
+T2610 000:993.571 - 0.069ms returns 0x00000013
+T2610 000:993.610 JLINK_Go()
+T2610 000:993.663   CPU_ReadMem(4 bytes @ 0xE0001000)
+T2610 000:999.158 - 5.600ms
+T2610 000:999.244 JLINK_IsHalted()
+T2610 000:999.894 - 0.691ms returns FALSE
+T2610 001:007.876 JLINK_IsHalted()
+T2610 001:013.006   CPU_ReadMem(2 bytes @ 0x20000000)
+T2610 001:013.803 - 5.991ms returns TRUE
+T2610 001:013.903 JLINK_ReadReg(R15 (PC))
+T2610 001:013.954 - 0.072ms returns 0x20000000
+T2610 001:014.001 JLINK_ClrBPEx(BPHandle = 0x00000013)
+T2610 001:014.041 - 0.060ms returns 0x00
+T2610 001:014.089 JLINK_ReadReg(R0)
+T2610 001:014.132 - 0.065ms returns 0x00000000
+T2610 001:017.155 JLINK_WriteReg(R0, 0x0002F000)
+T2610 001:017.234 - 0.099ms returns 0x00
+T2610 001:017.276 JLINK_WriteReg(R1, 0x00001000)
+T2610 001:017.311 - 0.052ms returns 0x00
+T2610 001:017.350 JLINK_WriteReg(R2, 0x000000FF)
+T2610 001:017.384 - 0.050ms returns 0x00
+T2610 001:017.423 JLINK_WriteReg(R3, 0x00000000)
+T2610 001:017.457 - 0.050ms returns 0x00
+T2610 001:017.495 JLINK_WriteReg(R4, 0x00000000)
+T2610 001:017.540 - 0.062ms returns 0x00
+T2610 001:017.579 JLINK_WriteReg(R5, 0x00000000)
+T2610 001:017.613 - 0.050ms returns 0x00
+T2610 001:017.652 JLINK_WriteReg(R6, 0x00000000)
+T2610 001:017.685 - 0.050ms returns 0x00
+T2610 001:017.724 JLINK_WriteReg(R7, 0x00000000)
+T2610 001:017.761 - 0.055ms returns 0x00
+T2610 001:017.800 JLINK_WriteReg(R8, 0x00000000)
+T2610 001:017.834 - 0.050ms returns 0x00
+T2610 001:017.872 JLINK_WriteReg(R9, 0x200005B4)
+T2610 001:017.906 - 0.050ms returns 0x00
+T2610 001:017.944 JLINK_WriteReg(R10, 0x00000000)
+T2610 001:017.978 - 0.050ms returns 0x00
+T2610 001:018.017 JLINK_WriteReg(R11, 0x00000000)
+T2610 001:018.051 - 0.050ms returns 0x00
+T2610 001:018.089 JLINK_WriteReg(R12, 0x00000000)
+T2610 001:018.123 - 0.050ms returns 0x00
+T2610 001:018.161 JLINK_WriteReg(R13 (SP), 0x20002000)
+T2610 001:018.197 - 0.052ms returns 0x00
+T2610 001:018.235 JLINK_WriteReg(R14, 0x20000001)
+T2610 001:018.270 - 0.051ms returns 0x00
+T2610 001:018.308 JLINK_WriteReg(R15 (PC), 0x20000288)
+T2610 001:018.342 - 0.051ms returns 0x00
+T2610 001:018.380 JLINK_WriteReg(XPSR, 0x01000000)
+T2610 001:018.414 - 0.050ms returns 0x00
+T2610 001:018.452 JLINK_WriteReg(MSP, 0x20002000)
+T2610 001:018.486 - 0.050ms returns 0x00
+T2610 001:018.525 JLINK_WriteReg(PSP, 0x20002000)
+T2610 001:018.559 - 0.050ms returns 0x00
+T2610 001:018.596 JLINK_WriteReg(CFBP, 0x00000000)
+T2610 001:018.630 - 0.050ms returns 0x00
+T2610 001:018.678   JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2)
+T2610 001:018.735 - 0.078ms returns 0x00000014
+T2610 001:018.778 JLINK_Go()
+T2610 001:018.835   CPU_ReadMem(4 bytes @ 0xE0001000)
+T2610 001:024.381 - 5.663ms
+T2610 001:024.476 JLINK_IsHalted()
+T2610 001:029.442   CPU_ReadMem(2 bytes @ 0x20000000)
+T2610 001:030.204 - 5.783ms returns TRUE
+T2610 001:030.300 JLINK_ReadReg(R15 (PC))
+T2610 001:030.347 - 0.064ms returns 0x20000000
+T2610 001:030.392 JLINK_ClrBPEx(BPHandle = 0x00000014)
+T2610 001:030.428 - 0.053ms returns 0x00
+T2610 001:030.472 JLINK_ReadReg(R0)
+T2610 001:030.507 - 0.230ms returns 0x00000001
+T2610 001:030.750 JLINK_WriteReg(R0, 0x0002F000)
+T2610 001:030.790 - 0.057ms returns 0x00
+T2610 001:030.832 JLINK_WriteReg(R1, 0x00001000)
+T2610 001:030.867 - 0.051ms returns 0x00
+T2610 001:030.908 JLINK_WriteReg(R2, 0x000000FF)
+T2610 001:030.942 - 0.051ms returns 0x00
+T2610 001:030.984 JLINK_WriteReg(R3, 0x00000000)
+T2610 001:031.030 - 0.063ms returns 0x00
+T2610 001:031.085 JLINK_WriteReg(R4, 0x00000000)
+T2610 001:031.121 - 0.054ms returns 0x00
+T2610 001:031.164 JLINK_WriteReg(R5, 0x00000000)
+T2610 001:031.198 - 0.051ms returns 0x00
+T2610 001:031.239 JLINK_WriteReg(R6, 0x00000000)
+T2610 001:031.273 - 0.050ms returns 0x00
+T2610 001:031.315 JLINK_WriteReg(R7, 0x00000000)
+T2610 001:031.348 - 0.050ms returns 0x00
+T2610 001:031.390 JLINK_WriteReg(R8, 0x00000000)
+T2610 001:031.424 - 0.051ms returns 0x00
+T2610 001:031.466 JLINK_WriteReg(R9, 0x200005B4)
+T2610 001:031.500 - 0.050ms returns 0x00
+T2610 001:031.541 JLINK_WriteReg(R10, 0x00000000)
+T2610 001:031.576 - 0.051ms returns 0x00
+T2610 001:031.618 JLINK_WriteReg(R11, 0x00000000)
+T2610 001:031.652 - 0.050ms returns 0x00
+T2610 001:031.693 JLINK_WriteReg(R12, 0x00000000)
+T2610 001:031.727 - 0.051ms returns 0x00
+T2610 001:031.770 JLINK_WriteReg(R13 (SP), 0x20002000)
+T2610 001:031.805 - 0.052ms returns 0x00
+T2610 001:031.847 JLINK_WriteReg(R14, 0x20000001)
+T2610 001:031.881 - 0.051ms returns 0x00
+T2610 001:031.924 JLINK_WriteReg(R15 (PC), 0x200000D4)
+T2610 001:031.958 - 0.051ms returns 0x00
+T2610 001:032.000 JLINK_WriteReg(XPSR, 0x01000000)
+T2610 001:032.034 - 0.051ms returns 0x00
+T2610 001:032.089 JLINK_WriteReg(MSP, 0x20002000)
+T2610 001:032.125 - 0.053ms returns 0x00
+T2610 001:032.166 JLINK_WriteReg(PSP, 0x20002000)
+T2610 001:032.200 - 0.050ms returns 0x00
+T2610 001:032.242 JLINK_WriteReg(CFBP, 0x00000000)
+T2610 001:032.276 - 0.050ms returns 0x00
+T2610 001:033.083   JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2)
+T2610 001:033.190 - 0.135ms returns 0x00000015
+T2610 001:033.235 JLINK_Go()
+T2610 001:033.294   CPU_ReadMem(4 bytes @ 0xE0001000)
+T2610 001:038.992 - 5.817ms
+T2610 001:039.088 JLINK_IsHalted()
+T2610 001:039.865 - 0.837ms returns FALSE
+T2610 001:045.242 JLINK_IsHalted()
+T2610 001:050.350   CPU_ReadMem(2 bytes @ 0x20000000)
+T2610 001:051.150 - 5.974ms returns TRUE
+T2610 001:051.252 JLINK_ReadReg(R15 (PC))
+T2610 001:051.297 - 0.063ms returns 0x20000000
+T2610 001:051.338 JLINK_ClrBPEx(BPHandle = 0x00000015)
+T2610 001:051.374 - 0.052ms returns 0x00
+T2610 001:051.414 JLINK_ReadReg(R0)
+T2610 001:051.448 - 0.051ms returns 0x00000000
+T2610 001:053.087 JLINK_WriteReg(R0, 0x00030000)
+T2610 001:053.158 - 0.090ms returns 0x00
+T2610 001:053.204 JLINK_WriteReg(R1, 0x00001000)
+T2610 001:053.252 - 0.065ms returns 0x00
+T2610 001:053.292 JLINK_WriteReg(R2, 0x000000FF)
+T2610 001:053.326 - 0.050ms returns 0x00
+T2610 001:053.364 JLINK_WriteReg(R3, 0x00000000)
+T2610 001:053.398 - 0.050ms returns 0x00
+T2610 001:053.436 JLINK_WriteReg(R4, 0x00000000)
+T2610 001:053.469 - 0.050ms returns 0x00
+T2610 001:053.508 JLINK_WriteReg(R5, 0x00000000)
+T2610 001:053.542 - 0.050ms returns 0x00
+T2610 001:053.580 JLINK_WriteReg(R6, 0x00000000)
+T2610 001:053.614 - 0.050ms returns 0x00
+T2610 001:053.652 JLINK_WriteReg(R7, 0x00000000)
+T2610 001:053.685 - 0.050ms returns 0x00
+T2610 001:053.724 JLINK_WriteReg(R8, 0x00000000)
+T2610 001:053.758 - 0.050ms returns 0x00
+T2610 001:053.796 JLINK_WriteReg(R9, 0x200005B4)
+T2610 001:053.930 - 0.158ms returns 0x00
+T2610 001:053.977 JLINK_WriteReg(R10, 0x00000000)
+T2610 001:054.012 - 0.051ms returns 0x00
+T2610 001:054.050 JLINK_WriteReg(R11, 0x00000000)
+T2610 001:054.084 - 0.050ms returns 0x00
+T2610 001:054.122 JLINK_WriteReg(R12, 0x00000000)
+T2610 001:054.157 - 0.051ms returns 0x00
+T2610 001:054.200 JLINK_WriteReg(R13 (SP), 0x20002000)
+T2610 001:054.236 - 0.053ms returns 0x00
+T2610 001:054.274 JLINK_WriteReg(R14, 0x20000001)
+T2610 001:054.308 - 0.050ms returns 0x00
+T2610 001:054.346 JLINK_WriteReg(R15 (PC), 0x20000288)
+T2610 001:054.381 - 0.051ms returns 0x00
+T2610 001:054.419 JLINK_WriteReg(XPSR, 0x01000000)
+T2610 001:054.452 - 0.050ms returns 0x00
+T2610 001:054.490 JLINK_WriteReg(MSP, 0x20002000)
+T2610 001:054.524 - 0.050ms returns 0x00
+T2610 001:054.563 JLINK_WriteReg(PSP, 0x20002000)
+T2610 001:054.597 - 0.050ms returns 0x00
+T2610 001:054.635 JLINK_WriteReg(CFBP, 0x00000000)
+T2610 001:054.668 - 0.050ms returns 0x00
+T2610 001:054.709   JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2)
+T2610 001:054.761 - 0.070ms returns 0x00000016
+T2610 001:054.800 JLINK_Go()
+T2610 001:054.856   CPU_ReadMem(4 bytes @ 0xE0001000)
+T2610 001:060.274 - 5.538ms
+T2610 001:060.386 JLINK_IsHalted()
+T2610 001:065.255   CPU_ReadMem(2 bytes @ 0x20000000)
+T2610 001:065.907 - 5.564ms returns TRUE
+T2610 001:065.988 JLINK_ReadReg(R15 (PC))
+T2610 001:066.032 - 0.062ms returns 0x20000000
+T2610 001:066.077 JLINK_ClrBPEx(BPHandle = 0x00000016)
+T2610 001:066.113 - 0.053ms returns 0x00
+T2610 001:066.156 JLINK_ReadReg(R0)
+T2610 001:066.191 - 0.051ms returns 0x00000001
+T2610 001:066.368 JLINK_WriteReg(R0, 0x00030000)
+T2610 001:066.442 - 0.093ms returns 0x00
+T2610 001:066.485 JLINK_WriteReg(R1, 0x00001000)
+T2610 001:066.520 - 0.052ms returns 0x00
+T2610 001:066.559 JLINK_WriteReg(R2, 0x000000FF)
+T2610 001:066.592 - 0.050ms returns 0x00
+T2610 001:066.631 JLINK_WriteReg(R3, 0x00000000)
+T2610 001:066.664 - 0.050ms returns 0x00
+T2610 001:066.702 JLINK_WriteReg(R4, 0x00000000)
+T2610 001:066.736 - 0.050ms returns 0x00
+T2610 001:066.774 JLINK_WriteReg(R5, 0x00000000)
+T2610 001:066.808 - 0.050ms returns 0x00
+T2610 001:066.846 JLINK_WriteReg(R6, 0x00000000)
+T2610 001:066.880 - 0.050ms returns 0x00
+T2610 001:066.918 JLINK_WriteReg(R7, 0x00000000)
+T2610 001:066.951 - 0.050ms returns 0x00
+T2610 001:066.989 JLINK_WriteReg(R8, 0x00000000)
+T2610 001:067.023 - 0.050ms returns 0x00
+T2610 001:067.061 JLINK_WriteReg(R9, 0x200005B4)
+T2610 001:067.094 - 0.050ms returns 0x00
+T2610 001:067.132 JLINK_WriteReg(R10, 0x00000000)
+T2610 001:067.166 - 0.050ms returns 0x00
+T2610 001:067.204 JLINK_WriteReg(R11, 0x00000000)
+T2610 001:067.238 - 0.050ms returns 0x00
+T2610 001:067.276 JLINK_WriteReg(R12, 0x00000000)
+T2610 001:067.310 - 0.054ms returns 0x00
+T2610 001:067.353 JLINK_WriteReg(R13 (SP), 0x20002000)
+T2610 001:067.388 - 0.052ms returns 0x00
+T2610 001:067.427 JLINK_WriteReg(R14, 0x20000001)
+T2610 001:067.461 - 0.050ms returns 0x00
+T2610 001:067.499 JLINK_WriteReg(R15 (PC), 0x200000D4)
+T2610 001:067.533 - 0.050ms returns 0x00
+T2610 001:067.571 JLINK_WriteReg(XPSR, 0x01000000)
+T2610 001:067.605 - 0.050ms returns 0x00
+T2610 001:067.643 JLINK_WriteReg(MSP, 0x20002000)
+T2610 001:067.677 - 0.050ms returns 0x00
+T2610 001:067.715 JLINK_WriteReg(PSP, 0x20002000)
+T2610 001:067.749 - 0.050ms returns 0x00
+T2610 001:067.787 JLINK_WriteReg(CFBP, 0x00000000)
+T2610 001:067.821 - 0.050ms returns 0x00
+T2610 001:067.861   JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2)
+T2610 001:067.914 - 0.071ms returns 0x00000017
+T2610 001:067.953 JLINK_Go()
+T2610 001:068.006   CPU_ReadMem(4 bytes @ 0xE0001000)
+T2610 001:073.528 - 5.635ms
+T2610 001:073.624 JLINK_IsHalted()
+T2610 001:074.358 - 0.800ms returns FALSE
+T2610 001:080.464 JLINK_IsHalted()
+T2610 001:085.416   CPU_ReadMem(2 bytes @ 0x20000000)
+T2610 001:086.218 - 5.813ms returns TRUE
+T2610 001:086.313 JLINK_ReadReg(R15 (PC))
+T2610 001:086.368 - 0.073ms returns 0x20000000
+T2610 001:086.414 JLINK_ClrBPEx(BPHandle = 0x00000017)
+T2610 001:086.559 - 0.169ms returns 0x00
+T2610 001:086.609 JLINK_ReadReg(R0)
+T2610 001:086.644 - 0.052ms returns 0x00000000
+T2610 001:087.646 JLINK_WriteReg(R0, 0x00000001)
+T2610 001:087.705 - 0.076ms returns 0x00
+T2610 001:087.745 JLINK_WriteReg(R1, 0x00001000)
+T2610 001:087.779 - 0.051ms returns 0x00
+T2610 001:087.818 JLINK_WriteReg(R2, 0x000000FF)
+T2610 001:087.852 - 0.050ms returns 0x00
+T2610 001:087.890 JLINK_WriteReg(R3, 0x00000000)
+T2610 001:087.924 - 0.050ms returns 0x00
+T2610 001:087.962 JLINK_WriteReg(R4, 0x00000000)
+T2610 001:087.995 - 0.050ms returns 0x00
+T2610 001:088.033 JLINK_WriteReg(R5, 0x00000000)
+T2610 001:088.067 - 0.050ms returns 0x00
+T2610 001:088.105 JLINK_WriteReg(R6, 0x00000000)
+T2610 001:088.139 - 0.050ms returns 0x00
+T2610 001:088.177 JLINK_WriteReg(R7, 0x00000000)
+T2610 001:088.210 - 0.050ms returns 0x00
+T2610 001:088.248 JLINK_WriteReg(R8, 0x00000000)
+T2610 001:088.282 - 0.050ms returns 0x00
+T2610 001:088.320 JLINK_WriteReg(R9, 0x200005B4)
+T2610 001:088.363 - 0.059ms returns 0x00
+T2610 001:088.401 JLINK_WriteReg(R10, 0x00000000)
+T2610 001:088.435 - 0.050ms returns 0x00
+T2610 001:088.474 JLINK_WriteReg(R11, 0x00000000)
+T2610 001:088.508 - 0.050ms returns 0x00
+T2610 001:088.546 JLINK_WriteReg(R12, 0x00000000)
+T2610 001:088.580 - 0.050ms returns 0x00
+T2610 001:088.618 JLINK_WriteReg(R13 (SP), 0x20002000)
+T2610 001:088.654 - 0.052ms returns 0x00
+T2610 001:088.692 JLINK_WriteReg(R14, 0x20000001)
+T2610 001:088.726 - 0.050ms returns 0x00
+T2610 001:088.764 JLINK_WriteReg(R15 (PC), 0x20000060)
+T2610 001:088.798 - 0.050ms returns 0x00
+T2610 001:088.836 JLINK_WriteReg(XPSR, 0x01000000)
+T2610 001:088.870 - 0.050ms returns 0x00
+T2610 001:088.908 JLINK_WriteReg(MSP, 0x20002000)
+T2610 001:088.941 - 0.050ms returns 0x00
+T2610 001:088.980 JLINK_WriteReg(PSP, 0x20002000)
+T2610 001:089.014 - 0.050ms returns 0x00
+T2610 001:089.052 JLINK_WriteReg(CFBP, 0x00000000)
+T2610 001:089.086 - 0.050ms returns 0x00
+T2610 001:089.126   JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2)
+T2610 001:089.178 - 0.070ms returns 0x00000018
+T2610 001:089.217 JLINK_Go()
+T2610 001:089.272   CPU_ReadMem(4 bytes @ 0xE0001000)
+T2610 001:094.933 - 5.775ms
+T2610 001:095.034 JLINK_IsHalted()
+T2610 001:099.997   CPU_ReadMem(2 bytes @ 0x20000000)
+T2610 001:100.730 - 5.752ms returns TRUE
+T2610 001:100.835 JLINK_ReadReg(R15 (PC))
+T2610 001:100.881 - 0.064ms returns 0x20000000
+T2610 001:100.926 JLINK_ClrBPEx(BPHandle = 0x00000018)
+T2610 001:100.962 - 0.053ms returns 0x00
+T2610 001:101.005 JLINK_ReadReg(R0)
+T2610 001:101.040 - 0.052ms returns 0x00000000
+T2610 001:181.173 JLINK_WriteMem(0x20000000, 0x05B8 Bytes, ...)
+T2610 001:181.238   Data:  00 BE 0A E0 0D 78 2D 06 68 40 08 24 40 00 00 D3 ...
+T2610 001:181.314   CPU_WriteMem(1464 bytes @ 0x20000000)
+T2610 001:195.792 - 14.684ms returns 0x5B8
+T2610 001:195.989 JLINK_WriteReg(R0, 0x00000000)
+T2610 001:196.045 - 0.075ms returns 0x00
+T2610 001:196.088 JLINK_WriteReg(R1, 0x01E84800)
+T2610 001:196.134 - 0.063ms returns 0x00
+T2610 001:196.176 JLINK_WriteReg(R2, 0x00000002)
+T2610 001:196.216 - 0.060ms returns 0x00
+T2610 001:196.263 JLINK_WriteReg(R3, 0x00000000)
+T2610 001:196.302 - 0.059ms returns 0x00
+T2610 001:196.348 JLINK_WriteReg(R4, 0x00000000)
+T2610 001:196.387 - 0.058ms returns 0x00
+T2610 001:196.429 JLINK_WriteReg(R5, 0x00000000)
+T2610 001:196.468 - 0.057ms returns 0x00
+T2610 001:196.508 JLINK_WriteReg(R6, 0x00000000)
+T2610 001:196.546 - 0.054ms returns 0x00
+T2610 001:196.584 JLINK_WriteReg(R7, 0x00000000)
+T2610 001:196.618 - 0.050ms returns 0x00
+T2610 001:196.655 JLINK_WriteReg(R8, 0x00000000)
+T2610 001:196.689 - 0.050ms returns 0x00
+T2610 001:196.727 JLINK_WriteReg(R9, 0x200005B4)
+T2610 001:196.761 - 0.050ms returns 0x00
+T2610 001:196.799 JLINK_WriteReg(R10, 0x00000000)
+T2610 001:196.833 - 0.050ms returns 0x00
+T2610 001:196.871 JLINK_WriteReg(R11, 0x00000000)
+T2610 001:196.905 - 0.050ms returns 0x00
+T2610 001:196.943 JLINK_WriteReg(R12, 0x00000000)
+T2610 001:196.977 - 0.050ms returns 0x00
+T2610 001:197.015 JLINK_WriteReg(R13 (SP), 0x20002000)
+T2610 001:197.171 - 0.173ms returns 0x00
+T2610 001:197.211 JLINK_WriteReg(R14, 0x20000001)
+T2610 001:197.245 - 0.050ms returns 0x00
+T2610 001:197.284 JLINK_WriteReg(R15 (PC), 0x20000020)
+T2610 001:197.318 - 0.051ms returns 0x00
+T2610 001:197.356 JLINK_WriteReg(XPSR, 0x01000000)
+T2610 001:197.390 - 0.050ms returns 0x00
+T2610 001:197.428 JLINK_WriteReg(MSP, 0x20002000)
+T2610 001:197.462 - 0.050ms returns 0x00
+T2610 001:197.501 JLINK_WriteReg(PSP, 0x20002000)
+T2610 001:197.535 - 0.051ms returns 0x00
+T2610 001:197.573 JLINK_WriteReg(CFBP, 0x00000000)
+T2610 001:197.607 - 0.055ms returns 0x00
+T2610 001:197.662   JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2)
+T2610 001:197.727   CPU_ReadMem(2 bytes @ 0x20000000)
+T2610 001:198.531 - 0.931ms returns 0x00000019
+T2610 001:198.625 JLINK_Go()
+T2610 001:198.674   CPU_WriteMem(2 bytes @ 0x20000000)
+T2610 001:199.477   CPU_ReadMem(4 bytes @ 0xE0001000)
+T2610 001:204.873 - 6.303ms
+T2610 001:204.966 JLINK_IsHalted()
+T2610 001:209.746   CPU_ReadMem(2 bytes @ 0x20000000)
+T2610 001:210.528 - 5.621ms returns TRUE
+T2610 001:210.630 JLINK_ReadReg(R15 (PC))
+T2610 001:210.676 - 0.064ms returns 0x20000000
+T2610 001:210.721 JLINK_ClrBPEx(BPHandle = 0x00000019)
+T2610 001:210.758 - 0.054ms returns 0x00
+T2610 001:210.801 JLINK_ReadReg(R0)
+T2610 001:210.836 - 0.051ms returns 0x00000000
+T2610 001:211.876 JLINK_WriteMem(0x200005C8, 0x0238 Bytes, ...)
+T2610 001:211.954   Data:  10 84 00 20 C1 63 02 00 C9 63 02 00 CB 63 02 00 ...
+T2610 001:212.033   CPU_WriteMem(568 bytes @ 0x200005C8)
+T2610 001:218.425 - 6.609ms returns 0x238
+T2610 001:218.521 JLINK_WriteMem(0x20000800, 0x0400 Bytes, ...)
+T2610 001:218.559   Data:  02 03 40 E8 01 34 00 2C E9 D1 4F F0 01 00 0A 60 ...
+T2610 001:218.635   CPU_WriteMem(1024 bytes @ 0x20000800)
+T2610 001:229.163 - 10.704ms returns 0x400
+T2610 001:229.263 JLINK_WriteMem(0x20000C00, 0x0400 Bytes, ...)
+T2610 001:229.304   Data:  30 46 04 F0 29 FA 23 4C B5 05 60 B1 30 46 04 F0 ...
+T2610 001:229.383   CPU_WriteMem(1024 bytes @ 0x20000C00)
+T2610 001:240.017 - 10.819ms returns 0x400
+T2610 001:240.127 JLINK_WriteMem(0x20001000, 0x0400 Bytes, ...)
+T2610 001:240.165   Data:  03 2F 7C D0 04 2F 7F D0 05 2F 01 D0 06 2F 7B D1 ...
+T2610 001:240.250   CPU_WriteMem(1024 bytes @ 0x20001000)
+T2610 001:250.723 - 10.656ms returns 0x400
+T2610 001:250.827 JLINK_WriteMem(0x20001400, 0x01C8 Bytes, ...)
+T2610 001:250.865   Data:  00 F0 40 F8 04 46 02 A9 00 20 00 F0 6C FA 20 46 ...
+T2610 001:250.939   CPU_WriteMem(456 bytes @ 0x20001400)
+T2610 001:256.149 - 5.383ms returns 0x1C8
+T2610 001:256.264 JLINK_WriteReg(R0, 0x00026000)
+T2610 001:256.312 - 0.067ms returns 0x00
+T2610 001:256.373 JLINK_WriteReg(R1, 0x00001000)
+T2610 001:256.410 - 0.055ms returns 0x00
+T2610 001:256.455 JLINK_WriteReg(R2, 0x200005C8)
+T2610 001:256.490 - 0.052ms returns 0x00
+T2610 001:256.532 JLINK_WriteReg(R3, 0x00000000)
+T2610 001:256.566 - 0.050ms returns 0x00
+T2610 001:256.608 JLINK_WriteReg(R4, 0x00000000)
+T2610 001:256.641 - 0.050ms returns 0x00
+T2610 001:256.683 JLINK_WriteReg(R5, 0x00000000)
+T2610 001:256.717 - 0.050ms returns 0x00
+T2610 001:256.759 JLINK_WriteReg(R6, 0x00000000)
+T2610 001:256.793 - 0.050ms returns 0x00
+T2610 001:256.834 JLINK_WriteReg(R7, 0x00000000)
+T2610 001:256.868 - 0.051ms returns 0x00
+T2610 001:256.910 JLINK_WriteReg(R8, 0x00000000)
+T2610 001:256.944 - 0.050ms returns 0x00
+T2610 001:256.985 JLINK_WriteReg(R9, 0x200005B4)
+T2610 001:257.019 - 0.051ms returns 0x00
+T2610 001:257.061 JLINK_WriteReg(R10, 0x00000000)
+T2610 001:257.095 - 0.051ms returns 0x00
+T2610 001:257.136 JLINK_WriteReg(R11, 0x00000000)
+T2610 001:257.170 - 0.051ms returns 0x00
+T2610 001:257.213 JLINK_WriteReg(R12, 0x00000000)
+T2610 001:257.247 - 0.051ms returns 0x00
+T2610 001:257.288 JLINK_WriteReg(R13 (SP), 0x20002000)
+T2610 001:257.324 - 0.071ms returns 0x00
+T2610 001:257.387 JLINK_WriteReg(R14, 0x20000001)
+T2610 001:257.423 - 0.052ms returns 0x00
+T2610 001:257.465 JLINK_WriteReg(R15 (PC), 0x20000154)
+T2610 001:257.500 - 0.149ms returns 0x00
+T2610 001:257.649 JLINK_WriteReg(XPSR, 0x01000000)
+T2610 001:257.686 - 0.054ms returns 0x00
+T2610 001:257.728 JLINK_WriteReg(MSP, 0x20002000)
+T2610 001:257.762 - 0.051ms returns 0x00
+T2610 001:257.804 JLINK_WriteReg(PSP, 0x20002000)
+T2610 001:257.838 - 0.050ms returns 0x00
+T2610 001:257.881 JLINK_WriteReg(CFBP, 0x00000000)
+T2610 001:257.915 - 0.051ms returns 0x00
+T2610 001:257.958   JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2)
+T2610 001:258.010 - 0.070ms returns 0x0000001A
+T2610 001:258.053 JLINK_Go()
+T2610 001:258.109   CPU_ReadMem(4 bytes @ 0xE0001000)
+T2610 001:263.336 - 5.330ms
+T2610 001:263.423 JLINK_IsHalted()
+T2610 001:263.979 - 0.598ms returns FALSE
+T2610 001:277.332 JLINK_IsHalted()
+T2610 001:278.154 - 0.882ms returns FALSE
+T2610 001:282.445 JLINK_IsHalted()
+T2610 001:283.279 - 0.897ms returns FALSE
+T2610 001:285.452 JLINK_IsHalted()
+T2610 001:286.281 - 0.892ms returns FALSE
+T2610 001:288.588 JLINK_IsHalted()
+T2610 001:289.376 - 0.858ms returns FALSE
+T2610 001:291.440 JLINK_IsHalted()
+T2610 001:292.280 - 0.900ms returns FALSE
+T2610 001:294.247 JLINK_IsHalted()
+T2610 001:294.947 - 0.744ms returns FALSE
+T2610 001:300.393 JLINK_IsHalted()
+T2610 001:301.256 - 0.923ms returns FALSE
+T2610 001:303.400 JLINK_IsHalted()
+T2610 001:304.254 - 0.918ms returns FALSE
+T2610 001:306.394 JLINK_IsHalted()
+T2610 001:307.268 - 0.934ms returns FALSE
+T2610 001:309.294 JLINK_IsHalted()
+T2610 001:309.975 - 0.720ms returns FALSE
+T2610 001:316.394 JLINK_IsHalted()
+T2610 001:317.258 - 0.925ms returns FALSE
+T2610 001:319.388 JLINK_IsHalted()
+T2610 001:320.234 - 0.907ms returns FALSE
+T2610 001:322.369 JLINK_IsHalted()
+T2610 001:323.239 - 0.930ms returns FALSE
+T2610 001:325.178 JLINK_IsHalted()
+T2610 001:325.863 - 0.731ms returns FALSE
+T2610 001:327.218 JLINK_IsHalted()
+T2610 001:327.894 - 0.713ms returns FALSE
+T2610 001:329.177 JLINK_IsHalted()
+T2610 001:329.846 - 0.706ms returns FALSE
+T2610 001:331.966 JLINK_IsHalted()
+T2610 001:332.645 - 0.716ms returns FALSE
+T2610 001:333.885 JLINK_IsHalted()
+T2610 001:339.066   CPU_ReadMem(2 bytes @ 0x20000000)
+T2610 001:339.755 - 5.917ms returns TRUE
+T2610 001:339.845 JLINK_ReadReg(R15 (PC))
+T2610 001:339.891 - 0.064ms returns 0x20000000
+T2610 001:339.936 JLINK_ClrBPEx(BPHandle = 0x0000001A)
+T2610 001:339.973 - 0.054ms returns 0x00
+T2610 001:340.018 JLINK_ReadReg(R0)
+T2610 001:340.053 - 0.052ms returns 0x00000000
+T2610 001:342.800 JLINK_WriteMem(0x200005C8, 0x0238 Bytes, ...)
+T2610 001:342.865   Data:  06 D0 03 28 09 D0 04 28 01 CF 09 D0 06 60 45 E1 ...
+T2610 001:342.938   CPU_WriteMem(568 bytes @ 0x200005C8)
+T2610 001:349.057 - 6.326ms returns 0x238
+T2610 001:349.163 JLINK_WriteMem(0x20000800, 0x0400 Bytes, ...)
+T2610 001:349.200   Data:  DD E9 0F 12 90 47 09 F1 01 09 76 1C C1 45 F4 DB ...
+T2610 001:349.277   CPU_WriteMem(1024 bytes @ 0x20000800)
+T2610 001:359.689 - 10.557ms returns 0x400
+T2610 001:359.742 JLINK_WriteMem(0x20000C00, 0x0400 Bytes, ...)
+T2610 001:359.766   Data:  F4 2C 00 20 98 2C 00 20 70 B5 0A 4E 01 46 0A 48 ...
+T2610 001:359.811   CPU_WriteMem(1024 bytes @ 0x20000C00)
+T2610 001:370.100 - 10.402ms returns 0x400
+T2610 001:370.173 JLINK_WriteMem(0x20001000, 0x0400 Bytes, ...)
+T2610 001:370.197   Data:  05 1E 9D D1 30 8A 50 B1 CD E9 00 47 4B 46 07 22 ...
+T2610 001:370.246   CPU_WriteMem(1024 bytes @ 0x20001000)
+T2610 001:380.626 - 10.498ms returns 0x400
+T2610 001:380.700 JLINK_WriteMem(0x20001400, 0x01C8 Bytes, ...)
+T2610 001:380.726   Data:  05 21 84 F8 31 10 21 E0 84 F8 31 B0 1E E0 E0 69 ...
+T2610 001:380.775   CPU_WriteMem(456 bytes @ 0x20001400)
+T2610 001:385.790 - 5.126ms returns 0x1C8
+T2610 001:385.860 JLINK_WriteReg(R0, 0x00027000)
+T2610 001:385.892 - 0.043ms returns 0x00
+T2610 001:385.921 JLINK_WriteReg(R1, 0x00001000)
+T2610 001:385.944 - 0.033ms returns 0x00
+T2610 001:385.971 JLINK_WriteReg(R2, 0x200005C8)
+T2610 001:385.993 - 0.032ms returns 0x00
+T2610 001:386.110 JLINK_WriteReg(R3, 0x00000000)
+T2610 001:386.154 - 0.056ms returns 0x00
+T2610 001:386.182 JLINK_WriteReg(R4, 0x00000000)
+T2610 001:386.211 - 0.040ms returns 0x00
+T2610 001:386.236 JLINK_WriteReg(R5, 0x00000000)
+T2610 001:386.258 - 0.032ms returns 0x00
+T2610 001:386.283 JLINK_WriteReg(R6, 0x00000000)
+T2610 001:386.304 - 0.032ms returns 0x00
+T2610 001:386.329 JLINK_WriteReg(R7, 0x00000000)
+T2610 001:386.351 - 0.032ms returns 0x00
+T2610 001:386.376 JLINK_WriteReg(R8, 0x00000000)
+T2610 001:386.397 - 0.032ms returns 0x00
+T2610 001:386.425 JLINK_WriteReg(R9, 0x200005B4)
+T2610 001:386.447 - 0.032ms returns 0x00
+T2610 001:386.472 JLINK_WriteReg(R10, 0x00000000)
+T2610 001:386.493 - 0.032ms returns 0x00
+T2610 001:386.518 JLINK_WriteReg(R11, 0x00000000)
+T2610 001:386.540 - 0.032ms returns 0x00
+T2610 001:386.565 JLINK_WriteReg(R12, 0x00000000)
+T2610 001:386.587 - 0.032ms returns 0x00
+T2610 001:386.611 JLINK_WriteReg(R13 (SP), 0x20002000)
+T2610 001:386.635 - 0.034ms returns 0x00
+T2610 001:386.659 JLINK_WriteReg(R14, 0x20000001)
+T2610 001:386.681 - 0.032ms returns 0x00
+T2610 001:386.706 JLINK_WriteReg(R15 (PC), 0x20000154)
+T2610 001:386.728 - 0.032ms returns 0x00
+T2610 001:386.752 JLINK_WriteReg(XPSR, 0x01000000)
+T2610 001:386.774 - 0.032ms returns 0x00
+T2610 001:386.798 JLINK_WriteReg(MSP, 0x20002000)
+T2610 001:386.820 - 0.032ms returns 0x00
+T2610 001:386.845 JLINK_WriteReg(PSP, 0x20002000)
+T2610 001:386.867 - 0.032ms returns 0x00
+T2610 001:386.891 JLINK_WriteReg(CFBP, 0x00000000)
+T2610 001:386.913 - 0.032ms returns 0x00
+T2610 001:386.940   JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2)
+T2610 001:386.974 - 0.046ms returns 0x0000001B
+T2610 001:386.999 JLINK_Go()
+T2610 001:387.035   CPU_ReadMem(4 bytes @ 0xE0001000)
+T2610 001:392.191 - 5.216ms
+T2610 001:392.235 JLINK_IsHalted()
+T2610 001:392.824 - 0.612ms returns FALSE
+T2610 001:397.982 JLINK_IsHalted()
+T2610 001:398.709 - 0.769ms returns FALSE
+T2610 001:399.980 JLINK_IsHalted()
+T2610 001:400.716 - 0.777ms returns FALSE
+T2610 001:401.977 JLINK_IsHalted()
+T2610 001:402.587 - 0.644ms returns FALSE
+T2610 001:403.830 JLINK_IsHalted()
+T2610 001:404.364 - 0.554ms returns FALSE
+T2610 001:405.814 JLINK_IsHalted()
+T2610 001:406.527 - 0.755ms returns FALSE
+T2610 001:407.945 JLINK_IsHalted()
+T2610 001:408.681 - 0.777ms returns FALSE
+T2610 001:409.942 JLINK_IsHalted()
+T2610 001:410.702 - 0.802ms returns FALSE
+T2610 001:411.933 JLINK_IsHalted()
+T2610 001:412.550 - 0.650ms returns FALSE
+T2610 001:413.935 JLINK_IsHalted()
+T2610 001:414.692 - 0.798ms returns FALSE
+T2610 001:415.925 JLINK_IsHalted()
+T2610 001:416.682 - 0.799ms returns FALSE
+T2610 001:417.928 JLINK_IsHalted()
+T2610 001:418.554 - 0.664ms returns FALSE
+T2610 001:419.915 JLINK_IsHalted()
+T2610 001:420.655 - 0.782ms returns FALSE
+T2610 001:421.917 JLINK_IsHalted()
+T2610 001:422.629 - 0.754ms returns FALSE
+T2610 001:423.906 JLINK_IsHalted()
+T2610 001:424.649 - 0.784ms returns FALSE
+T2610 001:425.895 JLINK_IsHalted()
+T2610 001:426.634 - 0.780ms returns FALSE
+T2610 001:427.898 JLINK_IsHalted()
+T2610 001:428.632 - 0.774ms returns FALSE
+T2610 001:429.890 JLINK_IsHalted()
+T2610 001:430.650 - 0.802ms returns FALSE
+T2610 001:431.887 JLINK_IsHalted()
+T2610 001:432.521 - 0.672ms returns FALSE
+T2610 001:433.767 JLINK_IsHalted()
+T2610 001:434.334 - 0.593ms returns FALSE
+T2610 001:435.754 JLINK_IsHalted()
+T2610 001:436.448 - 0.736ms returns FALSE
+T2610 001:437.865 JLINK_IsHalted()
+T2610 001:438.629 - 0.806ms returns FALSE
+T2610 001:439.870 JLINK_IsHalted()
+T2610 001:440.593 - 0.764ms returns FALSE
+T2610 001:441.857 JLINK_IsHalted()
+T2610 001:442.576 - 0.761ms returns FALSE
+T2610 001:443.860 JLINK_IsHalted()
+T2610 001:444.624 - 0.806ms returns FALSE
+T2610 001:446.816 JLINK_IsHalted()
+T2610 001:447.540 - 0.765ms returns FALSE
+T2610 001:448.839 JLINK_IsHalted()
+T2610 001:449.417 - 0.612ms returns FALSE
+T2610 001:450.712 JLINK_IsHalted()
+T2610 001:451.411 - 0.746ms returns FALSE
+T2610 001:452.706 JLINK_IsHalted()
+T2610 001:453.387 - 0.723ms returns FALSE
+T2610 001:454.715 JLINK_IsHalted()
+T2610 001:455.444 - 0.778ms returns FALSE
+T2610 001:456.839 JLINK_IsHalted()
+T2610 001:457.730 - 0.961ms returns FALSE
+T2610 001:459.845 JLINK_IsHalted()
+T2610 001:460.720 - 0.950ms returns FALSE
+T2610 001:462.764 JLINK_IsHalted()
+T2610 001:468.014   CPU_ReadMem(2 bytes @ 0x20000000)
+T2610 001:468.925 - 6.232ms returns TRUE
+T2610 001:469.041 JLINK_ReadReg(R15 (PC))
+T2610 001:469.101 - 0.084ms returns 0x20000000
+T2610 001:469.157 JLINK_ClrBPEx(BPHandle = 0x0000001B)
+T2610 001:469.206 - 0.072ms returns 0x00
+T2610 001:469.259 JLINK_ReadReg(R0)
+T2610 001:469.306 - 0.069ms returns 0x00000000
+T2610 001:471.187 JLINK_WriteMem(0x200005C8, 0x0238 Bytes, ...)
+T2610 001:471.259   Data:  79 FA A1 88 A9 80 18 48 02 F0 CA FC 00 28 0C D0 ...
+T2610 001:471.350   CPU_WriteMem(568 bytes @ 0x200005C8)
+T2610 001:477.673 - 6.557ms returns 0x238
+T2610 001:477.790 JLINK_WriteMem(0x20000800, 0x0400 Bytes, ...)
+T2610 001:477.842   Data:  02 F0 6D FA 0B 99 0C A8 00 F0 72 FE 2C 22 0C A9 ...
+T2610 001:477.937   CPU_WriteMem(1024 bytes @ 0x20000800)
+T2610 001:488.518 - 10.799ms returns 0x400
+T2610 001:488.644 JLINK_WriteMem(0x20000C00, 0x0400 Bytes, ...)
+T2610 001:488.696   Data:  3E 20 47 41 4D 45 4D 4F 44 45 5F 49 4E 54 4F 00 ...
+T2610 001:488.793   CPU_WriteMem(1024 bytes @ 0x20000C00)
+T2610 001:499.218 - 10.638ms returns 0x400
+T2610 001:499.338 JLINK_WriteMem(0x20001000, 0x0400 Bytes, ...)
+T2610 001:499.390   Data:  4F F4 00 51 DF E7 78 68 FE F7 E4 FD 06 46 D5 F1 ...
+T2610 001:499.497   CPU_WriteMem(1024 bytes @ 0x20001000)
+T2610 001:510.067 - 10.799ms returns 0x400
+T2610 001:510.194 JLINK_WriteMem(0x20001400, 0x01C8 Bytes, ...)
+T2610 001:510.245   Data:  40 FB 06 A8 00 F0 7E FD 08 B1 FE F7 57 FB 00 24 ...
+T2610 001:510.341   CPU_WriteMem(456 bytes @ 0x20001400)
+T2610 001:515.545 - 5.424ms returns 0x1C8
+T2610 001:515.685 JLINK_WriteReg(R0, 0x00028000)
+T2610 001:515.746 - 0.087ms returns 0x00
+T2610 001:515.805 JLINK_WriteReg(R1, 0x00001000)
+T2610 001:515.854 - 0.071ms returns 0x00
+T2610 001:515.910 JLINK_WriteReg(R2, 0x200005C8)
+T2610 001:515.957 - 0.069ms returns 0x00
+T2610 001:516.013 JLINK_WriteReg(R3, 0x00000000)
+T2610 001:516.060 - 0.069ms returns 0x00
+T2610 001:516.116 JLINK_WriteReg(R4, 0x00000000)
+T2610 001:516.162 - 0.069ms returns 0x00
+T2610 001:516.218 JLINK_WriteReg(R5, 0x00000000)
+T2610 001:516.264 - 0.069ms returns 0x00
+T2610 001:516.320 JLINK_WriteReg(R6, 0x00000000)
+T2610 001:516.366 - 0.068ms returns 0x00
+T2610 001:516.422 JLINK_WriteReg(R7, 0x00000000)
+T2610 001:516.468 - 0.069ms returns 0x00
+T2610 001:516.524 JLINK_WriteReg(R8, 0x00000000)
+T2610 001:516.571 - 0.069ms returns 0x00
+T2610 001:516.630 JLINK_WriteReg(R9, 0x200005B4)
+T2610 001:516.677 - 0.069ms returns 0x00
+T2610 001:516.734 JLINK_WriteReg(R10, 0x00000000)
+T2610 001:516.780 - 0.069ms returns 0x00
+T2610 001:516.837 JLINK_WriteReg(R11, 0x00000000)
+T2610 001:516.884 - 0.069ms returns 0x00
+T2610 001:516.941 JLINK_WriteReg(R12, 0x00000000)
+T2610 001:516.987 - 0.069ms returns 0x00
+T2610 001:517.043 JLINK_WriteReg(R13 (SP), 0x20002000)
+T2610 001:517.092 - 0.071ms returns 0x00
+T2610 001:517.149 JLINK_WriteReg(R14, 0x20000001)
+T2610 001:517.196 - 0.069ms returns 0x00
+T2610 001:517.254 JLINK_WriteReg(R15 (PC), 0x20000154)
+T2610 001:517.301 - 0.070ms returns 0x00
+T2610 001:517.359 JLINK_WriteReg(XPSR, 0x01000000)
+T2610 001:517.405 - 0.069ms returns 0x00
+T2610 001:517.462 JLINK_WriteReg(MSP, 0x20002000)
+T2610 001:517.509 - 0.069ms returns 0x00
+T2610 001:517.566 JLINK_WriteReg(PSP, 0x20002000)
+T2610 001:517.615 - 0.072ms returns 0x00
+T2610 001:517.673 JLINK_WriteReg(CFBP, 0x00000000)
+T2610 001:517.720 - 0.069ms returns 0x00
+T2610 001:517.780   JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2)
+T2610 001:517.850 - 0.095ms returns 0x0000001C
+T2610 001:517.909 JLINK_Go()
+T2610 001:517.982   CPU_ReadMem(4 bytes @ 0xE0001000)
+T2610 001:523.709 - 5.870ms
+T2610 001:523.834 JLINK_IsHalted()
+T2610 001:524.680 - 0.915ms returns FALSE
+T2610 001:531.467 JLINK_IsHalted()
+T2610 001:532.361 - 0.965ms returns FALSE
+T2610 001:534.494 JLINK_IsHalted()
+T2610 001:535.371 - 0.955ms returns FALSE
+T2610 001:537.523 JLINK_IsHalted()
+T2610 001:538.370 - 0.916ms returns FALSE
+T2610 001:540.694 JLINK_IsHalted()
+T2610 001:541.563 - 0.940ms returns FALSE
+T2610 001:543.737 JLINK_IsHalted()
+T2610 001:544.658 - 0.998ms returns FALSE
+T2610 001:546.516 JLINK_IsHalted()
+T2610 001:547.293 - 0.831ms returns FALSE
+T2610 001:549.595 JLINK_IsHalted()
+T2610 001:550.348 - 0.802ms returns FALSE
+T2610 001:552.683 JLINK_IsHalted()
+T2610 001:553.563 - 0.951ms returns FALSE
+T2610 001:555.649 JLINK_IsHalted()
+T2610 001:556.519 - 0.940ms returns FALSE
+T2610 001:558.700 JLINK_IsHalted()
+T2610 001:559.433 - 0.787ms returns FALSE
+T2610 001:561.637 JLINK_IsHalted()
+T2610 001:562.379 - 0.792ms returns FALSE
+T2610 001:564.665 JLINK_IsHalted()
+T2610 001:565.346 - 0.731ms returns FALSE
+T2610 001:567.651 JLINK_IsHalted()
+T2610 001:568.362 - 0.760ms returns FALSE
+T2610 001:570.633 JLINK_IsHalted()
+T2610 001:571.317 - 0.734ms returns FALSE
+T2610 001:573.627 JLINK_IsHalted()
+T2610 001:574.401 - 0.825ms returns FALSE
+T2610 001:576.626 JLINK_IsHalted()
+T2610 001:577.382 - 0.804ms returns FALSE
+T2610 001:579.585 JLINK_IsHalted()
+T2610 001:580.293 - 0.762ms returns FALSE
+T2610 001:581.626 JLINK_IsHalted()
+T2610 001:582.373 - 0.800ms returns FALSE
+T2610 001:589.560 JLINK_IsHalted()
+T2610 001:590.260 - 0.753ms returns FALSE
+T2610 001:591.582 JLINK_IsHalted()
+T2610 001:592.344 - 0.813ms returns FALSE
+T2610 001:594.700 JLINK_IsHalted()
+T2610 001:600.011   CPU_ReadMem(2 bytes @ 0x20000000)
+T2610 001:600.891 - 6.250ms returns TRUE
+T2610 001:600.989 JLINK_ReadReg(R15 (PC))
+T2610 001:601.032 - 0.060ms returns 0x20000000
+T2610 001:601.073 JLINK_ClrBPEx(BPHandle = 0x0000001C)
+T2610 001:601.107 - 0.050ms returns 0x00
+T2610 001:601.150 JLINK_ReadReg(R0)
+T2610 001:601.182 - 0.048ms returns 0x00000000
+T2610 001:602.561 JLINK_WriteMem(0x200005C8, 0x0238 Bytes, ...)
+T2610 001:602.617   Data:  59 69 00 29 06 D0 01 22 8D F8 00 20 AD F8 02 00 ...
+T2610 001:602.684   CPU_WriteMem(568 bytes @ 0x200005C8)
+T2610 001:608.874 - 6.366ms returns 0x238
+T2610 001:608.960 JLINK_WriteMem(0x20000800, 0x0400 Bytes, ...)
+T2610 001:608.994   Data:  00 0F 02 D0 28 68 C0 F8 04 43 BD E8 F0 81 00 68 ...
+T2610 001:609.061   CPU_WriteMem(1024 bytes @ 0x20000800)
+T2610 001:619.613 - 10.713ms returns 0x400
+T2610 001:619.710 JLINK_WriteMem(0x20000C00, 0x0400 Bytes, ...)
+T2610 001:619.745   Data:  01 D1 01 20 30 71 BD E8 F0 81 00 00 1C 2C 00 20 ...
+T2610 001:619.812   CPU_WriteMem(1024 bytes @ 0x20000C00)
+T2610 001:630.435 - 10.790ms returns 0x400
+T2610 001:630.554 JLINK_WriteMem(0x20001000, 0x0400 Bytes, ...)
+T2610 001:630.605   Data:  C0 B2 FD F7 6D FE 20 46 10 BD 40 68 03 F0 14 BD ...
+T2610 001:630.701   CPU_WriteMem(1024 bytes @ 0x20001000)
+T2610 001:641.298 - 10.816ms returns 0x400
+T2610 001:641.430 JLINK_WriteMem(0x20001400, 0x01C8 Bytes, ...)
+T2610 001:641.491   Data:  10 B5 0A 49 41 60 0A 48 00 F0 60 FC 58 B9 02 F0 ...
+T2610 001:641.587   CPU_WriteMem(456 bytes @ 0x20001400)
+T2610 001:646.763 - 5.404ms returns 0x1C8
+T2610 001:646.903 JLINK_WriteReg(R0, 0x00029000)
+T2610 001:646.966 - 0.088ms returns 0x00
+T2610 001:647.025 JLINK_WriteReg(R1, 0x00001000)
+T2610 001:647.073 - 0.071ms returns 0x00
+T2610 001:647.131 JLINK_WriteReg(R2, 0x200005C8)
+T2610 001:647.178 - 0.069ms returns 0x00
+T2610 001:647.235 JLINK_WriteReg(R3, 0x00000000)
+T2610 001:647.281 - 0.069ms returns 0x00
+T2610 001:647.490 JLINK_WriteReg(R4, 0x00000000)
+T2610 001:647.582 - 0.118ms returns 0x00
+T2610 001:647.640 JLINK_WriteReg(R5, 0x00000000)
+T2610 001:647.688 - 0.071ms returns 0x00
+T2610 001:647.741 JLINK_WriteReg(R6, 0x00000000)
+T2610 001:647.787 - 0.069ms returns 0x00
+T2610 001:647.839 JLINK_WriteReg(R7, 0x00000000)
+T2610 001:647.885 - 0.068ms returns 0x00
+T2610 001:647.937 JLINK_WriteReg(R8, 0x00000000)
+T2610 001:647.983 - 0.068ms returns 0x00
+T2610 001:648.035 JLINK_WriteReg(R9, 0x200005B4)
+T2610 001:648.081 - 0.068ms returns 0x00
+T2610 001:648.133 JLINK_WriteReg(R10, 0x00000000)
+T2610 001:648.179 - 0.069ms returns 0x00
+T2610 001:648.239 JLINK_WriteReg(R11, 0x00000000)
+T2610 001:648.291 - 0.075ms returns 0x00
+T2610 001:648.344 JLINK_WriteReg(R12, 0x00000000)
+T2610 001:648.389 - 0.068ms returns 0x00
+T2610 001:648.441 JLINK_WriteReg(R13 (SP), 0x20002000)
+T2610 001:648.490 - 0.071ms returns 0x00
+T2610 001:648.541 JLINK_WriteReg(R14, 0x20000001)
+T2610 001:648.591 - 0.072ms returns 0x00
+T2610 001:648.644 JLINK_WriteReg(R15 (PC), 0x20000154)
+T2610 001:648.690 - 0.069ms returns 0x00
+T2610 001:648.743 JLINK_WriteReg(XPSR, 0x01000000)
+T2610 001:648.789 - 0.068ms returns 0x00
+T2610 001:648.841 JLINK_WriteReg(MSP, 0x20002000)
+T2610 001:648.887 - 0.068ms returns 0x00
+T2610 001:648.940 JLINK_WriteReg(PSP, 0x20002000)
+T2610 001:648.986 - 0.069ms returns 0x00
+T2610 001:649.038 JLINK_WriteReg(CFBP, 0x00000000)
+T2610 001:649.084 - 0.068ms returns 0x00
+T2610 001:649.140   JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2)
+T2610 001:649.212 - 0.097ms returns 0x0000001D
+T2610 001:649.265 JLINK_Go()
+T2610 001:649.339   CPU_ReadMem(4 bytes @ 0xE0001000)
+T2610 001:654.960 - 5.765ms
+T2610 001:655.076 JLINK_IsHalted()
+T2610 001:655.917 - 0.911ms returns FALSE
+T2610 001:662.042 JLINK_IsHalted()
+T2610 001:662.795 - 0.837ms returns FALSE
+T2610 001:665.039 JLINK_IsHalted()
+T2610 001:665.918 - 0.952ms returns FALSE
+T2610 001:667.926 JLINK_IsHalted()
+T2610 001:668.649 - 0.773ms returns FALSE
+T2610 001:670.886 JLINK_IsHalted()
+T2610 001:671.601 - 0.765ms returns FALSE
+T2610 001:673.893 JLINK_IsHalted()
+T2610 001:674.618 - 0.774ms returns FALSE
+T2610 001:677.014 JLINK_IsHalted()
+T2610 001:677.899 - 0.956ms returns FALSE
+T2610 001:680.003 JLINK_IsHalted()
+T2610 001:680.909 - 0.979ms returns FALSE
+T2610 001:682.989 JLINK_IsHalted()
+T2610 001:683.844 - 0.918ms returns FALSE
+T2610 001:685.847 JLINK_IsHalted()
+T2610 001:686.656 - 0.863ms returns FALSE
+T2610 001:688.823 JLINK_IsHalted()
+T2610 001:689.499 - 0.729ms returns FALSE
+T2610 001:690.857 JLINK_IsHalted()
+T2610 001:691.518 - 0.710ms returns FALSE
+T2610 001:692.813 JLINK_IsHalted()
+T2610 001:693.603 - 0.860ms returns FALSE
+T2610 001:695.864 JLINK_IsHalted()
+T2610 001:696.837 - 1.036ms returns FALSE
+T2610 001:704.997 JLINK_IsHalted()
+T2610 001:705.926 - 1.000ms returns FALSE
+T2610 001:708.050 JLINK_IsHalted()
+T2610 001:708.920 - 0.941ms returns FALSE
+T2610 001:711.063 JLINK_IsHalted()
+T2610 001:712.063 - 1.071ms returns FALSE
+T2610 001:713.945 JLINK_IsHalted()
+T2610 001:714.924 - 1.051ms returns FALSE
+T2610 001:725.029 JLINK_IsHalted()
+T2610 001:730.160   CPU_ReadMem(2 bytes @ 0x20000000)
+T2610 001:730.916 - 5.938ms returns TRUE
+T2610 001:731.010 JLINK_ReadReg(R15 (PC))
+T2610 001:731.068 - 0.081ms returns 0x20000000
+T2610 001:731.122 JLINK_ClrBPEx(BPHandle = 0x0000001D)
+T2610 001:731.171 - 0.072ms returns 0x00
+T2610 001:731.225 JLINK_ReadReg(R0)
+T2610 001:731.272 - 0.069ms returns 0x00000000
+T2610 001:734.378 JLINK_WriteMem(0x200005C8, 0x0238 Bytes, ...)
+T2610 001:734.460   Data:  4F F4 90 71 20 68 02 F0 79 F8 4F F4 92 71 20 68 ...
+T2610 001:734.553   CPU_WriteMem(568 bytes @ 0x200005C8)
+T2610 001:740.825 - 6.516ms returns 0x238
+T2610 001:740.941 JLINK_WriteMem(0x20000800, 0x0400 Bytes, ...)
+T2610 001:740.992   Data:  20 30 40 1C 00 91 02 28 F2 D3 01 98 00 F0 03 00 ...
+T2610 001:741.088   CPU_WriteMem(1024 bytes @ 0x20000800)
+T2610 001:751.530 - 10.651ms returns 0x400
+T2610 001:751.647 JLINK_WriteMem(0x20000C00, 0x0400 Bytes, ...)
+T2610 001:751.699   Data:  10 BD 10 B5 31 B1 B2 FB F3 F4 03 FB 14 24 1C B1 ...
+T2610 001:751.794   CPU_WriteMem(1024 bytes @ 0x20000C00)
+T2610 001:762.396 - 10.823ms returns 0x400
+T2610 001:762.529 JLINK_WriteMem(0x20001000, 0x0400 Bytes, ...)
+T2610 001:762.591   Data:  01 91 4F F4 C0 72 02 91 03 91 AD F8 04 20 00 7A ...
+T2610 001:762.692   CPU_WriteMem(1024 bytes @ 0x20001000)
+T2610 001:773.344 - 10.885ms returns 0x400
+T2610 001:773.470 JLINK_WriteMem(0x20001400, 0x01C8 Bytes, ...)
+T2610 001:773.522   Data:  60 47 20 46 17 4B 18 A2 00 97 22 E0 0E 20 00 90 ...
+T2610 001:773.626   CPU_WriteMem(456 bytes @ 0x20001400)
+T2610 001:778.963 - 5.559ms returns 0x1C8
+T2610 001:779.098 JLINK_WriteReg(R0, 0x0002A000)
+T2610 001:779.161 - 0.090ms returns 0x00
+T2610 001:779.223 JLINK_WriteReg(R1, 0x00001000)
+T2610 001:779.272 - 0.072ms returns 0x00
+T2610 001:779.329 JLINK_WriteReg(R2, 0x200005C8)
+T2610 001:779.375 - 0.069ms returns 0x00
+T2610 001:779.433 JLINK_WriteReg(R3, 0x00000000)
+T2610 001:779.479 - 0.069ms returns 0x00
+T2610 001:779.537 JLINK_WriteReg(R4, 0x00000000)
+T2610 001:779.584 - 0.085ms returns 0x00
+T2610 001:779.657 JLINK_WriteReg(R5, 0x00000000)
+T2610 001:779.704 - 0.069ms returns 0x00
+T2610 001:779.760 JLINK_WriteReg(R6, 0x00000000)
+T2610 001:779.806 - 0.069ms returns 0x00
+T2610 001:779.862 JLINK_WriteReg(R7, 0x00000000)
+T2610 001:779.909 - 0.069ms returns 0x00
+T2610 001:779.965 JLINK_WriteReg(R8, 0x00000000)
+T2610 001:780.011 - 0.069ms returns 0x00
+T2610 001:780.068 JLINK_WriteReg(R9, 0x200005B4)
+T2610 001:780.115 - 0.070ms returns 0x00
+T2610 001:780.175 JLINK_WriteReg(R10, 0x00000000)
+T2610 001:780.223 - 0.070ms returns 0x00
+T2610 001:780.281 JLINK_WriteReg(R11, 0x00000000)
+T2610 001:780.330 - 0.072ms returns 0x00
+T2610 001:780.387 JLINK_WriteReg(R12, 0x00000000)
+T2610 001:780.435 - 0.070ms returns 0x00
+T2610 001:780.492 JLINK_WriteReg(R13 (SP), 0x20002000)
+T2610 001:780.542 - 0.073ms returns 0x00
+T2610 001:780.603 JLINK_WriteReg(R14, 0x20000001)
+T2610 001:780.652 - 0.072ms returns 0x00
+T2610 001:780.709 JLINK_WriteReg(R15 (PC), 0x20000154)
+T2610 001:780.756 - 0.070ms returns 0x00
+T2610 001:780.815 JLINK_WriteReg(XPSR, 0x01000000)
+T2610 001:780.863 - 0.071ms returns 0x00
+T2610 001:780.919 JLINK_WriteReg(MSP, 0x20002000)
+T2610 001:780.967 - 0.070ms returns 0x00
+T2610 001:781.024 JLINK_WriteReg(PSP, 0x20002000)
+T2610 001:781.072 - 0.070ms returns 0x00
+T2610 001:781.128 JLINK_WriteReg(CFBP, 0x00000000)
+T2610 001:781.174 - 0.069ms returns 0x00
+T2610 001:781.235   JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2)
+T2610 001:781.306 - 0.096ms returns 0x0000001E
+T2610 001:781.363 JLINK_Go()
+T2610 001:781.437   CPU_ReadMem(4 bytes @ 0xE0001000)
+T2610 001:787.076 - 5.783ms
+T2610 001:787.201 JLINK_IsHalted()
+T2610 001:787.951 - 0.803ms returns FALSE
+T2610 001:803.713 JLINK_IsHalted()
+T2610 001:804.514 - 0.855ms returns FALSE
+T2610 001:806.702 JLINK_IsHalted()
+T2610 001:807.424 - 0.771ms returns FALSE
+T2610 001:809.718 JLINK_IsHalted()
+T2610 001:810.295 - 0.606ms returns FALSE
+T2610 001:811.618 JLINK_IsHalted()
+T2610 001:812.251 - 0.662ms returns FALSE
+T2610 001:813.589 JLINK_IsHalted()
+T2610 001:814.143 - 0.582ms returns FALSE
+T2610 001:815.645 JLINK_IsHalted()
+T2610 001:816.266 - 0.649ms returns FALSE
+T2610 001:817.663 JLINK_IsHalted()
+T2610 001:818.393 - 0.776ms returns FALSE
+T2610 001:819.779 JLINK_IsHalted()
+T2610 001:820.542 - 0.812ms returns FALSE
+T2610 001:822.748 JLINK_IsHalted()
+T2610 001:823.515 - 0.816ms returns FALSE
+T2610 001:828.590 JLINK_IsHalted()
+T2610 001:829.529 - 0.987ms returns FALSE
+T2610 001:831.720 JLINK_IsHalted()
+T2610 001:832.509 - 0.839ms returns FALSE
+T2610 001:834.740 JLINK_IsHalted()
+T2610 001:835.515 - 0.821ms returns FALSE
+T2610 001:837.699 JLINK_IsHalted()
+T2610 001:838.463 - 0.821ms returns FALSE
+T2610 001:840.707 JLINK_IsHalted()
+T2610 001:841.489 - 0.828ms returns FALSE
+T2610 001:843.624 JLINK_IsHalted()
+T2610 001:844.375 - 0.797ms returns FALSE
+T2610 001:846.523 JLINK_IsHalted()
+T2610 001:847.195 - 0.701ms returns FALSE
+T2610 001:848.630 JLINK_IsHalted()
+T2610 001:849.384 - 0.800ms returns FALSE
+T2610 001:850.631 JLINK_IsHalted()
+T2610 001:851.385 - 0.799ms returns FALSE
+T2610 001:852.619 JLINK_IsHalted()
+T2610 001:853.389 - 0.816ms returns FALSE
+T2610 001:854.614 JLINK_IsHalted()
+T2610 001:855.256 - 0.679ms returns FALSE
+T2610 001:857.380 JLINK_IsHalted()
+T2610 001:862.359   CPU_ReadMem(2 bytes @ 0x20000000)
+T2610 001:863.138 - 5.803ms returns TRUE
+T2610 001:863.211 JLINK_ReadReg(R15 (PC))
+T2610 001:863.245 - 0.047ms returns 0x20000000
+T2610 001:863.275 JLINK_ClrBPEx(BPHandle = 0x0000001E)
+T2610 001:863.308 - 0.048ms returns 0x00
+T2610 001:863.341 JLINK_ReadReg(R0)
+T2610 001:863.366 - 0.038ms returns 0x00000000
+T2610 001:864.489 JLINK_WriteMem(0x200005C8, 0x0238 Bytes, ...)
+T2610 001:864.534   Data:  02 D0 03 2A 2A D1 1B E0 E3 60 01 79 11 B1 01 29 ...
+T2610 001:864.588   CPU_WriteMem(568 bytes @ 0x200005C8)
+T2610 001:870.827 - 6.436ms returns 0x238
+T2610 001:870.982 JLINK_WriteMem(0x20000800, 0x0400 Bytes, ...)
+T2610 001:871.039   Data:  5F 69 73 5F 77 69 74 68 69 6E 5F 62 6F 75 6E 64 ...
+T2610 001:871.138   CPU_WriteMem(1024 bytes @ 0x20000800)
+T2610 001:881.649 - 10.730ms returns 0x400
+T2610 001:881.766 JLINK_WriteMem(0x20000C00, 0x0400 Bytes, ...)
+T2610 001:881.819   Data:  78 D0 00 F0 27 FA 43 46 08 22 05 A9 38 46 00 F0 ...
+T2610 001:881.942   CPU_WriteMem(1024 bytes @ 0x20000C00)
+T2610 001:892.385 - 10.675ms returns 0x400
+T2610 001:892.496 JLINK_WriteMem(0x20001000, 0x0400 Bytes, ...)
+T2610 001:892.547   Data:  49 1C 61 71 28 60 05 46 7F 1C C0 F8 00 80 B7 42 ...
+T2610 001:892.643   CPU_WriteMem(1024 bytes @ 0x20001000)
+T2610 001:903.153 - 10.726ms returns 0x400
+T2610 001:903.276 JLINK_WriteMem(0x20001400, 0x01C8 Bytes, ...)
+T2610 001:903.328   Data:  AD F8 00 52 80 A9 68 46 61 DF 38 B1 05 28 16 D0 ...
+T2610 001:903.424   CPU_WriteMem(456 bytes @ 0x20001400)
+T2610 001:908.678 - 5.473ms returns 0x1C8
+T2610 001:908.819 JLINK_WriteReg(R0, 0x0002B000)
+T2610 001:908.882 - 0.089ms returns 0x00
+T2610 001:908.942 JLINK_WriteReg(R1, 0x00001000)
+T2610 001:908.991 - 0.072ms returns 0x00
+T2610 001:909.049 JLINK_WriteReg(R2, 0x200005C8)
+T2610 001:909.096 - 0.070ms returns 0x00
+T2610 001:909.153 JLINK_WriteReg(R3, 0x00000000)
+T2610 001:909.202 - 0.071ms returns 0x00
+T2610 001:909.258 JLINK_WriteReg(R4, 0x00000000)
+T2610 001:909.305 - 0.070ms returns 0x00
+T2610 001:909.362 JLINK_WriteReg(R5, 0x00000000)
+T2610 001:909.409 - 0.069ms returns 0x00
+T2610 001:909.465 JLINK_WriteReg(R6, 0x00000000)
+T2610 001:909.512 - 0.069ms returns 0x00
+T2610 001:909.569 JLINK_WriteReg(R7, 0x00000000)
+T2610 001:909.616 - 0.082ms returns 0x00
+T2610 001:909.686 JLINK_WriteReg(R8, 0x00000000)
+T2610 001:909.733 - 0.069ms returns 0x00
+T2610 001:909.789 JLINK_WriteReg(R9, 0x200005B4)
+T2610 001:909.836 - 0.069ms returns 0x00
+T2610 001:909.893 JLINK_WriteReg(R10, 0x00000000)
+T2610 001:909.940 - 0.069ms returns 0x00
+T2610 001:909.996 JLINK_WriteReg(R11, 0x00000000)
+T2610 001:910.043 - 0.069ms returns 0x00
+T2610 001:910.099 JLINK_WriteReg(R12, 0x00000000)
+T2610 001:910.146 - 0.069ms returns 0x00
+T2610 001:910.202 JLINK_WriteReg(R13 (SP), 0x20002000)
+T2610 001:910.251 - 0.071ms returns 0x00
+T2610 001:910.307 JLINK_WriteReg(R14, 0x20000001)
+T2610 001:910.354 - 0.069ms returns 0x00
+T2610 001:910.410 JLINK_WriteReg(R15 (PC), 0x20000154)
+T2610 001:910.457 - 0.069ms returns 0x00
+T2610 001:910.515 JLINK_WriteReg(XPSR, 0x01000000)
+T2610 001:910.562 - 0.069ms returns 0x00
+T2610 001:910.619 JLINK_WriteReg(MSP, 0x20002000)
+T2610 001:910.689 - 0.093ms returns 0x00
+T2610 001:910.747 JLINK_WriteReg(PSP, 0x20002000)
+T2610 001:910.795 - 0.069ms returns 0x00
+T2610 001:910.851 JLINK_WriteReg(CFBP, 0x00000000)
+T2610 001:910.898 - 0.069ms returns 0x00
+T2610 001:910.959   JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2)
+T2610 001:911.030 - 0.096ms returns 0x0000001F
+T2610 001:911.089 JLINK_Go()
+T2610 001:911.162   CPU_ReadMem(4 bytes @ 0xE0001000)
+T2610 001:916.787 - 5.767ms
+T2610 001:916.911 JLINK_IsHalted()
+T2610 001:917.708 - 0.870ms returns FALSE
+T2610 001:925.764 JLINK_IsHalted()
+T2610 001:926.618 - 0.925ms returns FALSE
+T2610 001:928.757 JLINK_IsHalted()
+T2610 001:929.528 - 0.871ms returns FALSE
+T2610 001:931.751 JLINK_IsHalted()
+T2610 001:932.615 - 0.935ms returns FALSE
+T2610 001:934.743 JLINK_IsHalted()
+T2610 001:935.624 - 0.956ms returns FALSE
+T2610 001:943.619 JLINK_IsHalted()
+T2610 001:944.331 - 0.765ms returns FALSE
+T2610 001:946.593 JLINK_IsHalted()
+T2610 001:947.301 - 0.762ms returns FALSE
+T2610 001:949.552 JLINK_IsHalted()
+T2610 001:950.214 - 0.715ms returns FALSE
+T2610 001:951.577 JLINK_IsHalted()
+T2610 001:952.296 - 0.770ms returns FALSE
+T2610 001:954.579 JLINK_IsHalted()
+T2610 001:955.258 - 0.732ms returns FALSE
+T2610 001:956.559 JLINK_IsHalted()
+T2610 001:957.234 - 0.725ms returns FALSE
+T2610 001:958.556 JLINK_IsHalted()
+T2610 001:959.239 - 0.736ms returns FALSE
+T2610 001:961.686 JLINK_IsHalted()
+T2610 001:962.446 - 0.833ms returns FALSE
+T2610 001:964.635 JLINK_IsHalted()
+T2610 001:965.548 - 0.986ms returns FALSE
+T2610 001:967.644 JLINK_IsHalted()
+T2610 001:968.533 - 0.958ms returns FALSE
+T2610 001:970.672 JLINK_IsHalted()
+T2610 001:971.537 - 0.935ms returns FALSE
+T2610 001:973.705 JLINK_IsHalted()
+T2610 001:974.570 - 0.936ms returns FALSE
+T2610 001:976.665 JLINK_IsHalted()
+T2610 001:977.525 - 0.930ms returns FALSE
+T2610 001:979.529 JLINK_IsHalted()
+T2610 001:980.387 - 0.928ms returns FALSE
+T2610 001:982.712 JLINK_IsHalted()
+T2610 001:983.587 - 0.946ms returns FALSE
+T2610 001:985.506 JLINK_IsHalted()
+T2610 001:986.335 - 0.899ms returns FALSE
+T2610 001:988.633 JLINK_IsHalted()
+T2610 001:993.830   CPU_ReadMem(2 bytes @ 0x20000000)
+T2610 001:994.612 - 6.035ms returns TRUE
+T2610 001:994.713 JLINK_ReadReg(R15 (PC))
+T2610 001:994.772 - 0.083ms returns 0x20000000
+T2610 001:994.827 JLINK_ClrBPEx(BPHandle = 0x0000001F)
+T2610 001:994.876 - 0.071ms returns 0x00
+T2610 001:994.929 JLINK_ReadReg(R0)
+T2610 001:994.976 - 0.070ms returns 0x00000000
+T2610 001:999.225 JLINK_WriteMem(0x200005C8, 0x0238 Bytes, ...)
+T2610 001:999.310   Data:  F0 E7 81 68 00 29 0B D0 02 68 92 68 0A 44 82 60 ...
+T2610 001:999.408   CPU_WriteMem(568 bytes @ 0x200005C8)
+T2610 002:005.715 - 6.560ms returns 0x238
+T2610 002:005.831 JLINK_WriteMem(0x20000800, 0x0400 Bytes, ...)
+T2610 002:005.883   Data:  BD E8 F0 81 00 60 00 40 A8 58 00 20 2D E9 FC 41 ...
+T2610 002:005.978   CPU_WriteMem(1024 bytes @ 0x20000800)
+T2610 002:016.544 - 10.783ms returns 0x400
+T2610 002:016.669 JLINK_WriteMem(0x20000C00, 0x0400 Bytes, ...)
+T2610 002:016.724   Data:  30 BD 00 00 BC 2C 00 20 70 B5 0E 46 05 46 4F F4 ...
+T2610 002:016.825   CPU_WriteMem(1024 bytes @ 0x20000C00)
+T2610 002:027.278 - 10.679ms returns 0x400
+T2610 002:027.402 JLINK_WriteMem(0x20001000, 0x0400 Bytes, ...)
+T2610 002:027.454   Data:  2D E9 F0 5F 04 46 00 79 0E 46 00 EB C0 01 DF F8 ...
+T2610 002:027.550   CPU_WriteMem(1024 bytes @ 0x20001000)
+T2610 002:037.894 - 10.552ms returns 0x400
+T2610 002:038.007 JLINK_WriteMem(0x20001400, 0x01C8 Bytes, ...)
+T2610 002:038.059   Data:  CB FC A1 79 E0 79 81 42 08 D9 28 46 BD E8 70 40 ...
+T2610 002:038.152   CPU_WriteMem(456 bytes @ 0x20001400)
+T2610 002:043.320 - 5.383ms returns 0x1C8
+T2610 002:043.568 JLINK_WriteReg(R0, 0x0002C000)
+T2610 002:043.649 - 0.108ms returns 0x00
+T2610 002:043.707 JLINK_WriteReg(R1, 0x00001000)
+T2610 002:043.757 - 0.074ms returns 0x00
+T2610 002:043.811 JLINK_WriteReg(R2, 0x200005C8)
+T2610 002:043.859 - 0.072ms returns 0x00
+T2610 002:043.913 JLINK_WriteReg(R3, 0x00000000)
+T2610 002:043.961 - 0.077ms returns 0x00
+T2610 002:044.020 JLINK_WriteReg(R4, 0x00000000)
+T2610 002:044.068 - 0.071ms returns 0x00
+T2610 002:044.122 JLINK_WriteReg(R5, 0x00000000)
+T2610 002:044.169 - 0.071ms returns 0x00
+T2610 002:044.223 JLINK_WriteReg(R6, 0x00000000)
+T2610 002:044.270 - 0.070ms returns 0x00
+T2610 002:044.323 JLINK_WriteReg(R7, 0x00000000)
+T2610 002:044.371 - 0.070ms returns 0x00
+T2610 002:044.423 JLINK_WriteReg(R8, 0x00000000)
+T2610 002:044.471 - 0.071ms returns 0x00
+T2610 002:044.524 JLINK_WriteReg(R9, 0x200005B4)
+T2610 002:044.571 - 0.070ms returns 0x00
+T2610 002:044.624 JLINK_WriteReg(R10, 0x00000000)
+T2610 002:044.672 - 0.071ms returns 0x00
+T2610 002:044.726 JLINK_WriteReg(R11, 0x00000000)
+T2610 002:044.774 - 0.071ms returns 0x00
+T2610 002:044.827 JLINK_WriteReg(R12, 0x00000000)
+T2610 002:044.886 - 0.082ms returns 0x00
+T2610 002:044.940 JLINK_WriteReg(R13 (SP), 0x20002000)
+T2610 002:044.992 - 0.076ms returns 0x00
+T2610 002:045.046 JLINK_WriteReg(R14, 0x20000001)
+T2610 002:045.094 - 0.071ms returns 0x00
+T2610 002:045.147 JLINK_WriteReg(R15 (PC), 0x20000154)
+T2610 002:045.203 - 0.083ms returns 0x00
+T2610 002:045.261 JLINK_WriteReg(XPSR, 0x01000000)
+T2610 002:045.308 - 0.070ms returns 0x00
+T2610 002:045.361 JLINK_WriteReg(MSP, 0x20002000)
+T2610 002:045.409 - 0.071ms returns 0x00
+T2610 002:045.462 JLINK_WriteReg(PSP, 0x20002000)
+T2610 002:045.509 - 0.070ms returns 0x00
+T2610 002:045.562 JLINK_WriteReg(CFBP, 0x00000000)
+T2610 002:045.610 - 0.071ms returns 0x00
+T2610 002:045.667   JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2)
+T2610 002:045.739 - 0.098ms returns 0x00000020
+T2610 002:045.795 JLINK_Go()
+T2610 002:045.877   CPU_ReadMem(4 bytes @ 0xE0001000)
+T2610 002:051.528 - 5.783ms
+T2610 002:051.606 JLINK_IsHalted()
+T2610 002:052.277 - 0.719ms returns FALSE
+T2610 002:056.413 JLINK_IsHalted()
+T2610 002:057.233 - 0.869ms returns FALSE
+T2610 002:059.220 JLINK_IsHalted()
+T2610 002:059.924 - 0.739ms returns FALSE
+T2610 002:061.266 JLINK_IsHalted()
+T2610 002:061.848 - 0.610ms returns FALSE
+T2610 002:063.264 JLINK_IsHalted()
+T2610 002:063.827 - 0.588ms returns FALSE
+T2610 002:065.275 JLINK_IsHalted()
+T2610 002:065.914 - 0.663ms returns FALSE
+T2610 002:067.259 JLINK_IsHalted()
+T2610 002:067.872 - 0.638ms returns FALSE
+T2610 002:069.263 JLINK_IsHalted()
+T2610 002:069.883 - 0.650ms returns FALSE
+T2610 002:071.261 JLINK_IsHalted()
+T2610 002:071.864 - 0.632ms returns FALSE
+T2610 002:073.242 JLINK_IsHalted()
+T2610 002:073.870 - 0.658ms returns FALSE
+T2610 002:075.906 JLINK_IsHalted()
+T2610 002:076.498 - 0.621ms returns FALSE
+T2610 002:077.904 JLINK_IsHalted()
+T2610 002:078.498 - 0.623ms returns FALSE
+T2610 002:079.909 JLINK_IsHalted()
+T2610 002:080.538 - 0.653ms returns FALSE
+T2610 002:081.882 JLINK_IsHalted()
+T2610 002:082.475 - 0.623ms returns FALSE
+T2610 002:083.880 JLINK_IsHalted()
+T2610 002:084.486 - 0.630ms returns FALSE
+T2610 002:085.876 JLINK_IsHalted()
+T2610 002:086.444 - 0.592ms returns FALSE
+T2610 002:087.868 JLINK_IsHalted()
+T2610 002:088.491 - 0.647ms returns FALSE
+T2610 002:090.573 JLINK_IsHalted()
+T2610 002:091.202 - 0.653ms returns FALSE
+T2610 002:092.484 JLINK_IsHalted()
+T2610 002:093.120 - 0.660ms returns FALSE
+T2610 002:094.509 JLINK_IsHalted()
+T2610 002:095.119 - 0.634ms returns FALSE
+T2610 002:096.501 JLINK_IsHalted()
+T2610 002:097.119 - 0.642ms returns FALSE
+T2610 002:098.501 JLINK_IsHalted()
+T2610 002:099.117 - 0.640ms returns FALSE
+T2610 002:100.499 JLINK_IsHalted()
+T2610 002:101.120 - 0.645ms returns FALSE
+T2610 002:102.489 JLINK_IsHalted()
+T2610 002:103.118 - 0.653ms returns FALSE
+T2610 002:104.483 JLINK_IsHalted()
+T2610 002:105.118 - 0.658ms returns FALSE
+T2610 002:106.449 JLINK_IsHalted()
+T2610 002:107.005 - 0.581ms returns FALSE
+T2610 002:108.495 JLINK_IsHalted()
+T2610 002:109.125 - 0.660ms returns FALSE
+T2610 002:110.472 JLINK_IsHalted()
+T2610 002:111.093 - 0.646ms returns FALSE
+T2610 002:112.472 JLINK_IsHalted()
+T2610 002:113.077 - 0.629ms returns FALSE
+T2610 002:114.458 JLINK_IsHalted()
+T2610 002:115.031 - 0.597ms returns FALSE
+T2610 002:116.452 JLINK_IsHalted()
+T2610 002:117.124 - 0.697ms returns FALSE
+T2610 002:119.153 JLINK_IsHalted()
+T2610 002:119.777 - 0.648ms returns FALSE
+T2610 002:121.158 JLINK_IsHalted()
+T2610 002:121.782 - 0.654ms returns FALSE
+T2610 002:123.178 JLINK_IsHalted()
+T2610 002:128.053   CPU_ReadMem(2 bytes @ 0x20000000)
+T2610 002:129.060 - 5.933ms returns TRUE
+T2610 002:129.139 JLINK_ReadReg(R15 (PC))
+T2610 002:129.175 - 0.051ms returns 0x20000000
+T2610 002:129.208 JLINK_ClrBPEx(BPHandle = 0x00000020)
+T2610 002:129.236 - 0.041ms returns 0x00
+T2610 002:129.267 JLINK_ReadReg(R0)
+T2610 002:129.294 - 0.040ms returns 0x00000000
+T2610 002:130.476 JLINK_WriteMem(0x200005C8, 0x0238 Bytes, ...)
+T2610 002:130.524   Data:  CB 88 1A 44 D2 1C 02 81 42 89 C9 88 51 1A C9 1E ...
+T2610 002:130.581   CPU_WriteMem(568 bytes @ 0x200005C8)
+T2610 002:136.679 - 6.251ms returns 0x238
+T2610 002:136.755 JLINK_WriteMem(0x20000800, 0x0400 Bytes, ...)
+T2610 002:136.785   Data:  C2 08 00 F0 07 03 88 5C 01 24 9C 40 20 43 88 54 ...
+T2610 002:136.843   CPU_WriteMem(1024 bytes @ 0x20000800)
+T2610 002:147.233 - 10.525ms returns 0x400
+T2610 002:147.316 JLINK_WriteMem(0x20000C00, 0x0400 Bytes, ...)
+T2610 002:147.346   Data:  2D E9 F0 47 07 46 20 48 1C 46 15 46 00 78 0E 46 ...
+T2610 002:147.403   CPU_WriteMem(1024 bytes @ 0x20000C00)
+T2610 002:157.812 - 10.542ms returns 0x400
+T2610 002:157.891 JLINK_WriteMem(0x20001000, 0x0400 Bytes, ...)
+T2610 002:157.921   Data:  C8 2C 00 20 9C F6 02 00 70 B5 05 46 88 69 0C 46 ...
+T2610 002:157.979   CPU_WriteMem(1024 bytes @ 0x20001000)
+T2610 002:168.397 - 10.555ms returns 0x400
+T2610 002:168.480 JLINK_WriteMem(0x20001400, 0x01C8 Bytes, ...)
+T2610 002:168.573   Data:  44 50 45 54 49 1C C9 B2 08 2B F6 DB 44 54 49 1C ...
+T2610 002:168.637   CPU_WriteMem(456 bytes @ 0x20001400)
+T2610 002:173.725 - 5.315ms returns 0x1C8
+T2610 002:173.864 JLINK_WriteReg(R0, 0x0002D000)
+T2610 002:173.934 - 0.099ms returns 0x00
+T2610 002:174.006 JLINK_WriteReg(R1, 0x00001000)
+T2610 002:174.062 - 0.078ms returns 0x00
+T2610 002:174.119 JLINK_WriteReg(R2, 0x200005C8)
+T2610 002:174.166 - 0.069ms returns 0x00
+T2610 002:174.222 JLINK_WriteReg(R3, 0x00000000)
+T2610 002:174.269 - 0.069ms returns 0x00
+T2610 002:174.325 JLINK_WriteReg(R4, 0x00000000)
+T2610 002:174.371 - 0.069ms returns 0x00
+T2610 002:174.427 JLINK_WriteReg(R5, 0x00000000)
+T2610 002:174.473 - 0.069ms returns 0x00
+T2610 002:174.530 JLINK_WriteReg(R6, 0x00000000)
+T2610 002:174.577 - 0.069ms returns 0x00
+T2610 002:174.633 JLINK_WriteReg(R7, 0x00000000)
+T2610 002:174.679 - 0.069ms returns 0x00
+T2610 002:174.735 JLINK_WriteReg(R8, 0x00000000)
+T2610 002:174.781 - 0.069ms returns 0x00
+T2610 002:174.837 JLINK_WriteReg(R9, 0x200005B4)
+T2610 002:174.884 - 0.072ms returns 0x00
+T2610 002:174.944 JLINK_WriteReg(R10, 0x00000000)
+T2610 002:174.990 - 0.069ms returns 0x00
+T2610 002:175.047 JLINK_WriteReg(R11, 0x00000000)
+T2610 002:175.094 - 0.069ms returns 0x00
+T2610 002:175.150 JLINK_WriteReg(R12, 0x00000000)
+T2610 002:175.197 - 0.069ms returns 0x00
+T2610 002:175.253 JLINK_WriteReg(R13 (SP), 0x20002000)
+T2610 002:175.302 - 0.072ms returns 0x00
+T2610 002:175.358 JLINK_WriteReg(R14, 0x20000001)
+T2610 002:175.405 - 0.069ms returns 0x00
+T2610 002:175.463 JLINK_WriteReg(R15 (PC), 0x20000154)
+T2610 002:175.510 - 0.069ms returns 0x00
+T2610 002:175.567 JLINK_WriteReg(XPSR, 0x01000000)
+T2610 002:175.613 - 0.069ms returns 0x00
+T2610 002:175.671 JLINK_WriteReg(MSP, 0x20002000)
+T2610 002:175.717 - 0.069ms returns 0x00
+T2610 002:175.774 JLINK_WriteReg(PSP, 0x20002000)
+T2610 002:175.821 - 0.069ms returns 0x00
+T2610 002:175.878 JLINK_WriteReg(CFBP, 0x00000000)
+T2610 002:175.928 - 0.072ms returns 0x00
+T2610 002:175.989   JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2)
+T2610 002:176.060 - 0.096ms returns 0x00000021
+T2610 002:176.119 JLINK_Go()
+T2610 002:176.192   CPU_ReadMem(4 bytes @ 0xE0001000)
+T2610 002:181.926 - 5.882ms
+T2610 002:182.059 JLINK_IsHalted()
+T2610 002:182.919 - 0.930ms returns FALSE
+T2610 002:196.994 JLINK_IsHalted()
+T2610 002:197.931 - 1.009ms returns FALSE
+T2610 002:199.899 JLINK_IsHalted()
+T2610 002:200.636 - 0.786ms returns FALSE
+T2610 002:202.025 JLINK_IsHalted()
+T2610 002:202.919 - 0.965ms returns FALSE
+T2610 002:205.021 JLINK_IsHalted()
+T2610 002:205.915 - 0.969ms returns FALSE
+T2610 002:208.007 JLINK_IsHalted()
+T2610 002:208.904 - 0.968ms returns FALSE
+T2610 002:210.992 JLINK_IsHalted()
+T2610 002:211.916 - 0.994ms returns FALSE
+T2610 002:213.677 JLINK_IsHalted()
+T2610 002:214.442 - 0.819ms returns FALSE
+T2610 002:216.672 JLINK_IsHalted()
+T2610 002:217.445 - 0.822ms returns FALSE
+T2610 002:219.640 JLINK_IsHalted()
+T2610 002:220.440 - 0.870ms returns FALSE
+T2610 002:222.810 JLINK_IsHalted()
+T2610 002:223.721 - 0.981ms returns FALSE
+T2610 002:225.808 JLINK_IsHalted()
+T2610 002:226.672 - 0.935ms returns FALSE
+T2610 002:228.946 JLINK_IsHalted()
+T2610 002:229.730 - 0.844ms returns FALSE
+T2610 002:231.797 JLINK_IsHalted()
+T2610 002:232.668 - 0.944ms returns FALSE
+T2610 002:239.788 JLINK_IsHalted()
+T2610 002:240.660 - 0.941ms returns FALSE
+T2610 002:242.740 JLINK_IsHalted()
+T2610 002:243.552 - 0.862ms returns FALSE
+T2610 002:245.664 JLINK_IsHalted()
+T2610 002:246.424 - 0.810ms returns FALSE
+T2610 002:248.631 JLINK_IsHalted()
+T2610 002:249.331 - 0.753ms returns FALSE
+T2610 002:250.663 JLINK_IsHalted()
+T2610 002:251.352 - 0.751ms returns FALSE
+T2610 002:253.681 JLINK_IsHalted()
+T2610 002:258.583   CPU_ReadMem(2 bytes @ 0x20000000)
+T2610 002:259.370 - 5.744ms returns TRUE
+T2610 002:259.468 JLINK_ReadReg(R15 (PC))
+T2610 002:259.525 - 0.081ms returns 0x20000000
+T2610 002:259.581 JLINK_ClrBPEx(BPHandle = 0x00000021)
+T2610 002:259.667 - 0.112ms returns 0x00
+T2610 002:259.733 JLINK_ReadReg(R0)
+T2610 002:259.781 - 0.071ms returns 0x00000000
+T2610 002:263.755 JLINK_WriteMem(0x200005C8, 0x0238 Bytes, ...)
+T2610 002:263.844   Data:  18 D0 00 25 0E 4F 03 26 08 EB 05 01 22 46 00 20 ...
+T2610 002:263.941   CPU_WriteMem(568 bytes @ 0x200005C8)
+T2610 002:270.149 - 6.448ms returns 0x238
+T2610 002:270.245 JLINK_WriteMem(0x20000800, 0x0400 Bytes, ...)
+T2610 002:270.296   Data:  00 00 01 E0 FD F7 A8 F9 00 28 FB D1 BD E8 F8 8F ...
+T2610 002:270.385   CPU_WriteMem(1024 bytes @ 0x20000800)
+T2610 002:280.871 - 10.695ms returns 0x400
+T2610 002:280.987 JLINK_WriteMem(0x20000C00, 0x0400 Bytes, ...)
+T2610 002:281.037   Data:  64 00 00 00 04 4B 00 20 14 2C 00 20 75 61 72 74 ...
+T2610 002:281.134   CPU_WriteMem(1024 bytes @ 0x20000C00)
+T2610 002:291.746 - 10.830ms returns 0x400
+T2610 002:291.881 JLINK_WriteMem(0x20001000, 0x0400 Bytes, ...)
+T2610 002:291.945   Data:  0C 46 4F F4 92 77 05 46 39 46 FD F7 56 FB 00 26 ...
+T2610 002:292.043   CPU_WriteMem(1024 bytes @ 0x20001000)
+T2610 002:302.629 - 10.818ms returns 0x400
+T2610 002:302.754 JLINK_WriteMem(0x20001400, 0x01C8 Bytes, ...)
+T2610 002:302.806   Data:  74 75 3D 20 25 64 20 00 66 6C 61 73 68 62 75 73 ...
+T2610 002:302.902   CPU_WriteMem(456 bytes @ 0x20001400)
+T2610 002:308.008 - 5.326ms returns 0x1C8
+T2610 002:308.151 JLINK_WriteReg(R0, 0x0002E000)
+T2610 002:308.214 - 0.089ms returns 0x00
+T2610 002:308.274 JLINK_WriteReg(R1, 0x00001000)
+T2610 002:308.325 - 0.075ms returns 0x00
+T2610 002:308.383 JLINK_WriteReg(R2, 0x200005C8)
+T2610 002:308.432 - 0.072ms returns 0x00
+T2610 002:308.489 JLINK_WriteReg(R3, 0x00000000)
+T2610 002:308.538 - 0.077ms returns 0x00
+T2610 002:308.602 JLINK_WriteReg(R4, 0x00000000)
+T2610 002:308.651 - 0.073ms returns 0x00
+T2610 002:308.709 JLINK_WriteReg(R5, 0x00000000)
+T2610 002:308.758 - 0.072ms returns 0x00
+T2610 002:308.816 JLINK_WriteReg(R6, 0x00000000)
+T2610 002:308.864 - 0.072ms returns 0x00
+T2610 002:308.923 JLINK_WriteReg(R7, 0x00000000)
+T2610 002:308.972 - 0.072ms returns 0x00
+T2610 002:309.029 JLINK_WriteReg(R8, 0x00000000)
+T2610 002:309.078 - 0.072ms returns 0x00
+T2610 002:309.136 JLINK_WriteReg(R9, 0x200005B4)
+T2610 002:309.185 - 0.072ms returns 0x00
+T2610 002:309.242 JLINK_WriteReg(R10, 0x00000000)
+T2610 002:309.289 - 0.071ms returns 0x00
+T2610 002:309.348 JLINK_WriteReg(R11, 0x00000000)
+T2610 002:309.396 - 0.071ms returns 0x00
+T2610 002:309.453 JLINK_WriteReg(R12, 0x00000000)
+T2610 002:309.500 - 0.071ms returns 0x00
+T2610 002:309.558 JLINK_WriteReg(R13 (SP), 0x20002000)
+T2610 002:309.612 - 0.076ms returns 0x00
+T2610 002:309.671 JLINK_WriteReg(R14, 0x20000001)
+T2610 002:309.719 - 0.071ms returns 0x00
+T2610 002:309.777 JLINK_WriteReg(R15 (PC), 0x20000154)
+T2610 002:309.825 - 0.072ms returns 0x00
+T2610 002:309.884 JLINK_WriteReg(XPSR, 0x01000000)
+T2610 002:309.932 - 0.071ms returns 0x00
+T2610 002:309.989 JLINK_WriteReg(MSP, 0x20002000)
+T2610 002:310.037 - 0.071ms returns 0x00
+T2610 002:310.094 JLINK_WriteReg(PSP, 0x20002000)
+T2610 002:310.142 - 0.070ms returns 0x00
+T2610 002:310.199 JLINK_WriteReg(CFBP, 0x00000000)
+T2610 002:310.247 - 0.071ms returns 0x00
+T2610 002:310.307   JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2)
+T2610 002:310.379 - 0.098ms returns 0x00000022
+T2610 002:310.438 JLINK_Go()
+T2610 002:310.637   CPU_ReadMem(4 bytes @ 0xE0001000)
+T2610 002:316.086 - 5.719ms
+T2610 002:316.211 JLINK_IsHalted()
+T2610 002:317.010 - 0.876ms returns FALSE
+T2610 002:332.090 JLINK_IsHalted()
+T2610 002:332.947 - 0.929ms returns FALSE
+T2610 002:335.090 JLINK_IsHalted()
+T2610 002:335.964 - 0.946ms returns FALSE
+T2610 002:338.081 JLINK_IsHalted()
+T2610 002:338.970 - 0.961ms returns FALSE
+T2610 002:341.066 JLINK_IsHalted()
+T2610 002:341.958 - 0.962ms returns FALSE
+T2610 002:344.062 JLINK_IsHalted()
+T2610 002:344.960 - 0.969ms returns FALSE
+T2610 002:346.966 JLINK_IsHalted()
+T2610 002:347.719 - 0.803ms returns FALSE
+T2610 002:349.054 JLINK_IsHalted()
+T2610 002:349.934 - 0.951ms returns FALSE
+T2610 002:352.076 JLINK_IsHalted()
+T2610 002:352.972 - 0.966ms returns FALSE
+T2610 002:355.067 JLINK_IsHalted()
+T2610 002:355.824 - 0.834ms returns FALSE
+T2610 002:357.922 JLINK_IsHalted()
+T2610 002:358.665 - 0.800ms returns FALSE
+T2610 002:360.933 JLINK_IsHalted()
+T2610 002:361.662 - 0.779ms returns FALSE
+T2610 002:364.044 JLINK_IsHalted()
+T2610 002:364.933 - 0.959ms returns FALSE
+T2610 002:367.033 JLINK_IsHalted()
+T2610 002:367.924 - 0.964ms returns FALSE
+T2610 002:370.026 JLINK_IsHalted()
+T2610 002:370.828 - 0.868ms returns FALSE
+T2610 002:376.714 JLINK_IsHalted()
+T2610 002:377.379 - 0.715ms returns FALSE
+T2610 002:378.859 JLINK_IsHalted()
+T2610 002:379.947 - 1.161ms returns FALSE
+T2610 002:381.841 JLINK_IsHalted()
+T2610 002:382.713 - 0.945ms returns FALSE
+T2610 002:384.838 JLINK_IsHalted()
+T2610 002:385.707 - 0.939ms returns FALSE
+T2610 002:387.804 JLINK_IsHalted()
+T2610 002:392.733   CPU_ReadMem(2 bytes @ 0x20000000)
+T2610 002:393.450 - 5.687ms returns TRUE
+T2610 002:393.533 JLINK_ReadReg(R15 (PC))
+T2610 002:393.588 - 0.080ms returns 0x20000000
+T2610 002:393.644 JLINK_ClrBPEx(BPHandle = 0x00000022)
+T2610 002:393.707 - 0.086ms returns 0x00
+T2610 002:393.761 JLINK_ReadReg(R0)
+T2610 002:393.808 - 0.070ms returns 0x00000000
+T2610 002:395.707 JLINK_WriteMem(0x200005C8, 0x0238 Bytes, ...)
+T2610 002:395.777   Data:  63 6F 72 64 5F 77 72 69 74 65 20 3D 20 46 44 53 ...
+T2610 002:395.865   CPU_WriteMem(568 bytes @ 0x200005C8)
+T2610 002:401.964 - 6.350ms returns 0x238
+T2610 002:402.107 JLINK_WriteMem(0x20000800, 0x0400 Bytes, ...)
+T2610 002:402.164   Data:  52 1C 90 B2 20 80 09 F8 00 E0 20 88 40 1C 20 80 ...
+T2610 002:402.276   CPU_WriteMem(1024 bytes @ 0x20000800)
+T2610 002:412.758 - 10.743ms returns 0x400
+T2610 002:412.899 JLINK_WriteMem(0x20000C00, 0x0400 Bytes, ...)
+T2610 002:412.952   Data:  00 00 00 00 00 40 02 40 24 01 04 00 1A 11 12 13 ...
+T2610 002:413.054   CPU_WriteMem(1024 bytes @ 0x20000C00)
+T2610 002:423.578 - 10.750ms returns 0x400
+T2610 002:423.705 JLINK_WriteMem(0x20001000, 0x0400 Bytes, ...)
+T2610 002:423.757   Data:  40 00 00 00 B9 F9 02 00 46 44 53 5F 45 56 54 5F ...
+T2610 002:423.862   CPU_WriteMem(1024 bytes @ 0x20001000)
+T2610 002:434.319 - 10.684ms returns 0x400
+T2610 002:434.446 JLINK_WriteMem(0x20001400, 0x01C8 Bytes, ...)
+T2610 002:434.498   Data:  45 5F 4E 4F 54 5F 45 4E 41 42 4C 45 44 00 00 00 ...
+T2610 002:434.595   CPU_WriteMem(456 bytes @ 0x20001400)
+T2610 002:439.778 - 5.384ms returns 0x1C8
+T2610 002:439.893 JLINK_WriteReg(R0, 0x0002F000)
+T2610 002:439.991 - 0.124ms returns 0x00
+T2610 002:440.053 JLINK_WriteReg(R1, 0x00001000)
+T2610 002:440.102 - 0.072ms returns 0x00
+T2610 002:440.160 JLINK_WriteReg(R2, 0x200005C8)
+T2610 002:440.206 - 0.069ms returns 0x00
+T2610 002:440.263 JLINK_WriteReg(R3, 0x00000000)
+T2610 002:440.309 - 0.069ms returns 0x00
+T2610 002:440.366 JLINK_WriteReg(R4, 0x00000000)
+T2610 002:440.413 - 0.068ms returns 0x00
+T2610 002:440.469 JLINK_WriteReg(R5, 0x00000000)
+T2610 002:440.515 - 0.069ms returns 0x00
+T2610 002:440.572 JLINK_WriteReg(R6, 0x00000000)
+T2610 002:440.619 - 0.069ms returns 0x00
+T2610 002:440.676 JLINK_WriteReg(R7, 0x00000000)
+T2610 002:440.723 - 0.069ms returns 0x00
+T2610 002:440.779 JLINK_WriteReg(R8, 0x00000000)
+T2610 002:440.825 - 0.069ms returns 0x00
+T2610 002:440.881 JLINK_WriteReg(R9, 0x200005B4)
+T2610 002:440.928 - 0.071ms returns 0x00
+T2610 002:440.987 JLINK_WriteReg(R10, 0x00000000)
+T2610 002:441.034 - 0.077ms returns 0x00
+T2610 002:441.102 JLINK_WriteReg(R11, 0x00000000)
+T2610 002:441.150 - 0.070ms returns 0x00
+T2610 002:441.206 JLINK_WriteReg(R12, 0x00000000)
+T2610 002:441.253 - 0.069ms returns 0x00
+T2610 002:441.309 JLINK_WriteReg(R13 (SP), 0x20002000)
+T2610 002:441.358 - 0.072ms returns 0x00
+T2610 002:441.414 JLINK_WriteReg(R14, 0x20000001)
+T2610 002:441.461 - 0.069ms returns 0x00
+T2610 002:441.517 JLINK_WriteReg(R15 (PC), 0x20000154)
+T2610 002:441.564 - 0.069ms returns 0x00
+T2610 002:441.620 JLINK_WriteReg(XPSR, 0x01000000)
+T2610 002:441.667 - 0.069ms returns 0x00
+T2610 002:441.723 JLINK_WriteReg(MSP, 0x20002000)
+T2610 002:441.769 - 0.069ms returns 0x00
+T2610 002:441.825 JLINK_WriteReg(PSP, 0x20002000)
+T2610 002:441.872 - 0.069ms returns 0x00
+T2610 002:441.928 JLINK_WriteReg(CFBP, 0x00000000)
+T2610 002:441.979 - 0.074ms returns 0x00
+T2610 002:442.039   JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2)
+T2610 002:442.109 - 0.095ms returns 0x00000023
+T2610 002:442.168 JLINK_Go()
+T2610 002:442.240   CPU_ReadMem(4 bytes @ 0xE0001000)
+T2610 002:447.945 - 5.852ms
+T2610 002:448.079 JLINK_IsHalted()
+T2610 002:448.787 - 0.768ms returns FALSE
+T2610 002:455.838 JLINK_IsHalted()
+T2610 002:456.736 - 0.969ms returns FALSE
+T2610 002:458.840 JLINK_IsHalted()
+T2610 002:459.689 - 0.919ms returns FALSE
+T2610 002:461.832 JLINK_IsHalted()
+T2610 002:462.874 - 1.111ms returns FALSE
+T2610 002:464.800 JLINK_IsHalted()
+T2610 002:465.715 - 0.987ms returns FALSE
+T2610 002:467.685 JLINK_IsHalted()
+T2610 002:468.522 - 0.908ms returns FALSE
+T2610 002:470.841 JLINK_IsHalted()
+T2610 002:471.671 - 0.893ms returns FALSE
+T2610 002:473.692 JLINK_IsHalted()
+T2610 002:474.460 - 0.823ms returns FALSE
+T2610 002:476.700 JLINK_IsHalted()
+T2610 002:477.434 - 0.786ms returns FALSE
+T2610 002:479.685 JLINK_IsHalted()
+T2610 002:480.440 - 0.805ms returns FALSE
+T2610 002:482.658 JLINK_IsHalted()
+T2610 002:483.355 - 0.751ms returns FALSE
+T2610 002:489.646 JLINK_IsHalted()
+T2610 002:490.383 - 0.786ms returns FALSE
+T2610 002:492.627 JLINK_IsHalted()
+T2610 002:493.384 - 0.806ms returns FALSE
+T2610 002:495.654 JLINK_IsHalted()
+T2610 002:496.494 - 0.928ms returns FALSE
+T2610 002:498.617 JLINK_IsHalted()
+T2610 002:499.349 - 0.781ms returns FALSE
+T2610 002:501.602 JLINK_IsHalted()
+T2610 002:502.211 - 0.641ms returns FALSE
+T2610 002:503.708 JLINK_IsHalted()
+T2610 002:504.521 - 0.864ms returns FALSE
+T2610 002:506.682 JLINK_IsHalted()
+T2610 002:507.500 - 0.870ms returns FALSE
+T2610 002:509.658 JLINK_IsHalted()
+T2610 002:510.470 - 0.884ms returns FALSE
+T2610 002:512.504 JLINK_IsHalted()
+T2610 002:513.231 - 0.767ms returns FALSE
+T2610 002:514.531 JLINK_IsHalted()
+T2610 002:515.170 - 0.671ms returns FALSE
+T2610 002:516.633 JLINK_IsHalted()
+T2610 002:517.420 - 0.845ms returns FALSE
+T2610 002:519.624 JLINK_IsHalted()
+T2610 002:524.726   CPU_ReadMem(2 bytes @ 0x20000000)
+T2610 002:525.534 - 5.975ms returns TRUE
+T2610 002:525.631 JLINK_ReadReg(R15 (PC))
+T2610 002:525.670 - 0.055ms returns 0x20000000
+T2610 002:525.710 JLINK_ClrBPEx(BPHandle = 0x00000023)
+T2610 002:525.741 - 0.045ms returns 0x00
+T2610 002:525.778 JLINK_ReadReg(R0)
+T2610 002:525.807 - 0.043ms returns 0x00000000
+T2610 002:528.311 JLINK_WriteMem(0x200005C8, 0x0238 Bytes, ...)
+T2610 002:528.370   Data:  52 5F 49 4F 5F 50 45 4E 44 49 4E 47 00 00 00 00 ...
+T2610 002:528.432   CPU_WriteMem(568 bytes @ 0x200005C8)
+T2610 002:534.546 - 6.282ms returns 0x238
+T2610 002:534.625 JLINK_WriteMem(0x20000800, 0x0400 Bytes, ...)
+T2610 002:534.658   Data:  1B 5B 31 3B 33 30 6D 00 1B 5B 30 6D 00 00 00 00 ...
+T2610 002:534.722   CPU_WriteMem(1024 bytes @ 0x20000800)
+T2610 002:545.020 - 10.435ms returns 0x400
+T2610 002:545.089 JLINK_WriteMem(0x20000C00, 0x0400 Bytes, ...)
+T2610 002:545.121   Data:  51 84 02 00 E4 2B 00 20 DB A9 02 00 68 46 00 20 ...
+T2610 002:545.181   CPU_WriteMem(1024 bytes @ 0x20000C00)
+T2610 002:555.582 - 10.544ms returns 0x400
+T2610 002:555.670 JLINK_WriteMem(0x20001000, 0x0400 Bytes, ...)
+T2610 002:555.703   Data:  FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF ...
+T2610 002:555.775   CPU_WriteMem(1024 bytes @ 0x20001000)
+T2610 002:566.091 - 10.472ms returns 0x400
+T2610 002:566.178 JLINK_WriteMem(0x20001400, 0x01C8 Bytes, ...)
+T2610 002:566.285   Data:  FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF ...
+T2610 002:566.348   CPU_WriteMem(456 bytes @ 0x20001400)
+T2610 002:571.433 - 5.306ms returns 0x1C8
+T2610 002:571.529 JLINK_WriteReg(R0, 0x00030000)
+T2610 002:571.571 - 0.057ms returns 0x00
+T2610 002:571.607 JLINK_WriteReg(R1, 0x00000738)
+T2610 002:571.637 - 0.044ms returns 0x00
+T2610 002:571.670 JLINK_WriteReg(R2, 0x200005C8)
+T2610 002:571.698 - 0.042ms returns 0x00
+T2610 002:571.733 JLINK_WriteReg(R3, 0x00000000)
+T2610 002:571.762 - 0.042ms returns 0x00
+T2610 002:571.798 JLINK_WriteReg(R4, 0x00000000)
+T2610 002:571.826 - 0.042ms returns 0x00
+T2610 002:571.861 JLINK_WriteReg(R5, 0x00000000)
+T2610 002:571.889 - 0.042ms returns 0x00
+T2610 002:571.925 JLINK_WriteReg(R6, 0x00000000)
+T2610 002:571.954 - 0.042ms returns 0x00
+T2610 002:571.989 JLINK_WriteReg(R7, 0x00000000)
+T2610 002:572.017 - 0.042ms returns 0x00
+T2610 002:572.053 JLINK_WriteReg(R8, 0x00000000)
+T2610 002:572.082 - 0.043ms returns 0x00
+T2610 002:572.116 JLINK_WriteReg(R9, 0x200005B4)
+T2610 002:572.145 - 0.042ms returns 0x00
+T2610 002:572.181 JLINK_WriteReg(R10, 0x00000000)
+T2610 002:572.210 - 0.043ms returns 0x00
+T2610 002:572.245 JLINK_WriteReg(R11, 0x00000000)
+T2610 002:572.274 - 0.043ms returns 0x00
+T2610 002:572.310 JLINK_WriteReg(R12, 0x00000000)
+T2610 002:572.338 - 0.042ms returns 0x00
+T2610 002:572.373 JLINK_WriteReg(R13 (SP), 0x20002000)
+T2610 002:572.410 - 0.051ms returns 0x00
+T2610 002:572.447 JLINK_WriteReg(R14, 0x20000001)
+T2610 002:572.476 - 0.043ms returns 0x00
+T2610 002:572.511 JLINK_WriteReg(R15 (PC), 0x20000154)
+T2610 002:572.540 - 0.043ms returns 0x00
+T2610 002:572.577 JLINK_WriteReg(XPSR, 0x01000000)
+T2610 002:572.606 - 0.043ms returns 0x00
+T2610 002:572.642 JLINK_WriteReg(MSP, 0x20002000)
+T2610 002:572.671 - 0.043ms returns 0x00
+T2610 002:572.706 JLINK_WriteReg(PSP, 0x20002000)
+T2610 002:572.735 - 0.043ms returns 0x00
+T2610 002:572.769 JLINK_WriteReg(CFBP, 0x00000000)
+T2610 002:572.798 - 0.043ms returns 0x00
+T2610 002:572.836   JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2)
+T2610 002:572.880 - 0.060ms returns 0x00000024
+T2610 002:572.916 JLINK_Go()
+T2610 002:572.963   CPU_ReadMem(4 bytes @ 0xE0001000)
+T2610 002:578.169 - 5.286ms
+T2610 002:578.233 JLINK_IsHalted()
+T2610 002:578.874 - 0.668ms returns FALSE
+T2610 002:581.082 JLINK_IsHalted()
+T2610 002:581.780 - 0.729ms returns FALSE
+T2610 002:583.566 JLINK_IsHalted()
+T2610 002:584.127 - 0.594ms returns FALSE
+T2610 002:585.561 JLINK_IsHalted()
+T2610 002:586.176 - 0.648ms returns FALSE
+T2610 002:587.699 JLINK_IsHalted()
+T2610 002:588.519 - 0.871ms returns FALSE
+T2610 002:590.640 JLINK_IsHalted()
+T2610 002:591.520 - 0.951ms returns FALSE
+T2610 002:598.680 JLINK_IsHalted()
+T2610 002:599.539 - 0.929ms returns FALSE
+T2610 002:601.669 JLINK_IsHalted()
+T2610 002:602.623 - 1.024ms returns FALSE
+T2610 002:604.596 JLINK_IsHalted()
+T2610 002:605.296 - 0.758ms returns FALSE
+T2610 002:607.456 JLINK_IsHalted()
+T2610 002:608.148 - 0.733ms returns FALSE
+T2610 002:609.464 JLINK_IsHalted()
+T2610 002:614.325   CPU_ReadMem(2 bytes @ 0x20000000)
+T2610 002:615.052 - 5.636ms returns TRUE
+T2610 002:615.143 JLINK_ReadReg(R15 (PC))
+T2610 002:615.199 - 0.080ms returns 0x20000000
+T2610 002:615.254 JLINK_ClrBPEx(BPHandle = 0x00000024)
+T2610 002:615.303 - 0.072ms returns 0x00
+T2610 002:615.356 JLINK_ReadReg(R0)
+T2610 002:615.403 - 0.069ms returns 0x00000000
+T2610 002:615.467 JLINK_WriteReg(R0, 0x00000002)
+T2610 002:615.516 - 0.072ms returns 0x00
+T2610 002:615.569 JLINK_WriteReg(R1, 0x00000738)
+T2610 002:615.621 - 0.074ms returns 0x00
+T2610 002:615.673 JLINK_WriteReg(R2, 0x200005C8)
+T2610 002:615.719 - 0.068ms returns 0x00
+T2610 002:615.771 JLINK_WriteReg(R3, 0x00000000)
+T2610 002:615.817 - 0.068ms returns 0x00
+T2610 002:615.869 JLINK_WriteReg(R4, 0x00000000)
+T2610 002:615.922 - 0.079ms returns 0x00
+T2610 002:615.979 JLINK_WriteReg(R5, 0x00000000)
+T2610 002:616.025 - 0.068ms returns 0x00
+T2610 002:616.077 JLINK_WriteReg(R6, 0x00000000)
+T2610 002:616.122 - 0.068ms returns 0x00
+T2610 002:616.174 JLINK_WriteReg(R7, 0x00000000)
+T2610 002:616.220 - 0.068ms returns 0x00
+T2610 002:616.272 JLINK_WriteReg(R8, 0x00000000)
+T2610 002:616.317 - 0.068ms returns 0x00
+T2610 002:616.369 JLINK_WriteReg(R9, 0x200005B4)
+T2610 002:616.415 - 0.068ms returns 0x00
+T2610 002:616.467 JLINK_WriteReg(R10, 0x00000000)
+T2610 002:616.513 - 0.069ms returns 0x00
+T2610 002:616.565 JLINK_WriteReg(R11, 0x00000000)
+T2610 002:616.615 - 0.071ms returns 0x00
+T2610 002:616.689 JLINK_WriteReg(R12, 0x00000000)
+T2610 002:616.760 - 0.095ms returns 0x00
+T2610 002:616.816 JLINK_WriteReg(R13 (SP), 0x20002000)
+T2610 002:616.867 - 0.074ms returns 0x00
+T2610 002:616.921 JLINK_WriteReg(R14, 0x20000001)
+T2610 002:616.969 - 0.072ms returns 0x00
+T2610 002:617.023 JLINK_WriteReg(R15 (PC), 0x20000060)
+T2610 002:617.072 - 0.072ms returns 0x00
+T2610 002:617.126 JLINK_WriteReg(XPSR, 0x01000000)
+T2610 002:617.174 - 0.071ms returns 0x00
+T2610 002:617.227 JLINK_WriteReg(MSP, 0x20002000)
+T2610 002:617.275 - 0.071ms returns 0x00
+T2610 002:617.328 JLINK_WriteReg(PSP, 0x20002000)
+T2610 002:617.375 - 0.070ms returns 0x00
+T2610 002:617.428 JLINK_WriteReg(CFBP, 0x00000000)
+T2610 002:617.476 - 0.071ms returns 0x00
+T2610 002:617.533   JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2)
+T2610 002:617.609 - 0.102ms returns 0x00000025
+T2610 002:617.664 JLINK_Go()
+T2610 002:617.734   CPU_ReadMem(4 bytes @ 0xE0001000)
+T2610 002:623.167 - 5.557ms
+T2610 002:623.262 JLINK_IsHalted()
+T2610 002:628.374   CPU_ReadMem(2 bytes @ 0x20000000)
+T2610 002:629.198 - 6.001ms returns TRUE
+T2610 002:629.309 JLINK_ReadReg(R15 (PC))
+T2610 002:629.368 - 0.084ms returns 0x20000000
+T2610 002:629.423 JLINK_ClrBPEx(BPHandle = 0x00000025)
+T2610 002:629.478 - 0.077ms returns 0x00
+T2610 002:629.532 JLINK_ReadReg(R0)
+T2610 002:629.580 - 0.070ms returns 0x00000000
+T2610 002:724.936 JLINK_WriteMem(0x20000000, 0x05B8 Bytes, ...)
+T2610 002:724.993   Data:  00 BE 0A E0 0D 78 2D 06 68 40 08 24 40 00 00 D3 ...
+T2610 002:725.056   CPU_WriteMem(1464 bytes @ 0x20000000)
+T2610 002:739.649 - 14.763ms returns 0x5B8
+T2610 002:739.920 JLINK_WriteReg(R0, 0x00000000)
+T2610 002:739.980 - 0.077ms returns 0x00
+T2610 002:740.015 JLINK_WriteReg(R1, 0x01E84800)
+T2610 002:740.045 - 0.044ms returns 0x00
+T2610 002:740.078 JLINK_WriteReg(R2, 0x00000003)
+T2610 002:740.106 - 0.043ms returns 0x00
+T2610 002:740.139 JLINK_WriteReg(R3, 0x00000000)
+T2610 002:740.167 - 0.042ms returns 0x00
+T2610 002:740.199 JLINK_WriteReg(R4, 0x00000000)
+T2610 002:740.228 - 0.042ms returns 0x00
+T2610 002:740.260 JLINK_WriteReg(R5, 0x00000000)
+T2610 002:740.289 - 0.042ms returns 0x00
+T2610 002:740.320 JLINK_WriteReg(R6, 0x00000000)
+T2610 002:740.349 - 0.042ms returns 0x00
+T2610 002:740.381 JLINK_WriteReg(R7, 0x00000000)
+T2610 002:740.409 - 0.042ms returns 0x00
+T2610 002:740.441 JLINK_WriteReg(R8, 0x00000000)
+T2610 002:740.470 - 0.042ms returns 0x00
+T2610 002:740.502 JLINK_WriteReg(R9, 0x200005B4)
+T2610 002:740.534 - 0.046ms returns 0x00
+T2610 002:740.568 JLINK_WriteReg(R10, 0x00000000)
+T2610 002:740.596 - 0.043ms returns 0x00
+T2610 002:740.629 JLINK_WriteReg(R11, 0x00000000)
+T2610 002:740.658 - 0.043ms returns 0x00
+T2610 002:740.690 JLINK_WriteReg(R12, 0x00000000)
+T2610 002:740.719 - 0.042ms returns 0x00
+T2610 002:740.750 JLINK_WriteReg(R13 (SP), 0x20002000)
+T2610 002:740.781 - 0.044ms returns 0x00
+T2610 002:740.813 JLINK_WriteReg(R14, 0x20000001)
+T2610 002:740.842 - 0.042ms returns 0x00
+T2610 002:740.874 JLINK_WriteReg(R15 (PC), 0x20000020)
+T2610 002:740.903 - 0.043ms returns 0x00
+T2610 002:740.940 JLINK_WriteReg(XPSR, 0x01000000)
+T2610 002:740.975 - 0.049ms returns 0x00
+T2610 002:741.007 JLINK_WriteReg(MSP, 0x20002000)
+T2610 002:741.036 - 0.042ms returns 0x00
+T2610 002:741.068 JLINK_WriteReg(PSP, 0x20002000)
+T2610 002:741.096 - 0.042ms returns 0x00
+T2610 002:741.134 JLINK_WriteReg(CFBP, 0x00000000)
+T2610 002:741.167 - 0.046ms returns 0x00
+T2610 002:741.201   JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2)
+T2610 002:741.254   CPU_ReadMem(2 bytes @ 0x20000000)
+T2610 002:742.031 - 0.883ms returns 0x00000026
+T2610 002:742.112 JLINK_Go()
+T2610 002:742.153   CPU_WriteMem(2 bytes @ 0x20000000)
+T2610 002:742.977   CPU_ReadMem(4 bytes @ 0xE0001000)
+T2610 002:748.269 - 6.205ms
+T2610 002:748.345 JLINK_IsHalted()
+T2610 002:753.186   CPU_ReadMem(2 bytes @ 0x20000000)
+T2610 002:753.994 - 5.699ms returns TRUE
+T2610 002:754.074 JLINK_ReadReg(R15 (PC))
+T2610 002:754.113 - 0.053ms returns 0x20000000
+T2610 002:754.148 JLINK_ClrBPEx(BPHandle = 0x00000026)
+T2610 002:754.178 - 0.044ms returns 0x00
+T2610 002:754.211 JLINK_ReadReg(R0)
+T2610 002:754.245 - 0.048ms returns 0x00000000
+T2610 002:754.280 JLINK_WriteMem(0x200005C8, 0x0238 Bytes, ...)
+T2610 002:754.311   Data:  10 84 00 20 C1 63 02 00 C9 63 02 00 CB 63 02 00 ...
+T2610 002:754.365   CPU_WriteMem(568 bytes @ 0x200005C8)
+T2610 002:760.426 - 6.197ms returns 0x238
+T2610 002:760.507 JLINK_WriteMem(0x20000800, 0x0400 Bytes, ...)
+T2610 002:760.539   Data:  02 03 40 E8 01 34 00 2C E9 D1 4F F0 01 00 0A 60 ...
+T2610 002:760.601   CPU_WriteMem(1024 bytes @ 0x20000800)
+T2610 002:771.121 - 10.664ms returns 0x400
+T2610 002:771.208 JLINK_WriteMem(0x20000C00, 0x0400 Bytes, ...)
+T2610 002:771.240   Data:  30 46 04 F0 29 FA 23 4C B5 05 60 B1 30 46 04 F0 ...
+T2610 002:771.302   CPU_WriteMem(1024 bytes @ 0x20000C00)
+T2610 002:781.862 - 10.706ms returns 0x400
+T2610 002:781.950 JLINK_WriteMem(0x20001000, 0x0400 Bytes, ...)
+T2610 002:781.982   Data:  03 2F 7C D0 04 2F 7F D0 05 2F 01 D0 06 2F 7B D1 ...
+T2610 002:782.045   CPU_WriteMem(1024 bytes @ 0x20001000)
+T2610 002:792.573 - 10.675ms returns 0x400
+T2610 002:792.662 JLINK_WriteMem(0x20001400, 0x01C8 Bytes, ...)
+T2610 002:792.694   Data:  00 F0 40 F8 04 46 02 A9 00 20 00 F0 6C FA 20 46 ...
+T2610 002:792.756   CPU_WriteMem(456 bytes @ 0x20001400)
+T2610 002:797.797 - 5.184ms returns 0x1C8
+T2610 002:797.889 JLINK_WriteReg(R0, 0x00026000)
+T2610 002:797.928 - 0.055ms returns 0x00
+T2610 002:797.966 JLINK_WriteReg(R1, 0x00001000)
+T2610 002:797.996 - 0.044ms returns 0x00
+T2610 002:798.031 JLINK_WriteReg(R2, 0x200005C8)
+T2610 002:798.060 - 0.043ms returns 0x00
+T2610 002:798.092 JLINK_WriteReg(R3, 0x00000000)
+T2610 002:798.121 - 0.042ms returns 0x00
+T2610 002:798.155 JLINK_WriteReg(R4, 0x00000000)
+T2610 002:798.184 - 0.042ms returns 0x00
+T2610 002:798.326 JLINK_WriteReg(R5, 0x00000000)
+T2610 002:798.381 - 0.071ms returns 0x00
+T2610 002:798.417 JLINK_WriteReg(R6, 0x00000000)
+T2610 002:798.447 - 0.044ms returns 0x00
+T2610 002:798.479 JLINK_WriteReg(R7, 0x00000000)
+T2610 002:798.508 - 0.042ms returns 0x00
+T2610 002:798.540 JLINK_WriteReg(R8, 0x00000000)
+T2610 002:798.569 - 0.042ms returns 0x00
+T2610 002:798.601 JLINK_WriteReg(R9, 0x200005B4)
+T2610 002:798.629 - 0.042ms returns 0x00
+T2610 002:798.662 JLINK_WriteReg(R10, 0x00000000)
+T2610 002:798.690 - 0.043ms returns 0x00
+T2610 002:798.723 JLINK_WriteReg(R11, 0x00000000)
+T2610 002:798.752 - 0.043ms returns 0x00
+T2610 002:798.794 JLINK_WriteReg(R12, 0x00000000)
+T2610 002:798.823 - 0.043ms returns 0x00
+T2610 002:798.856 JLINK_WriteReg(R13 (SP), 0x20002000)
+T2610 002:798.886 - 0.045ms returns 0x00
+T2610 002:798.919 JLINK_WriteReg(R14, 0x20000001)
+T2610 002:798.947 - 0.042ms returns 0x00
+T2610 002:798.980 JLINK_WriteReg(R15 (PC), 0x20000348)
+T2610 002:799.009 - 0.043ms returns 0x00
+T2610 002:799.041 JLINK_WriteReg(XPSR, 0x01000000)
+T2610 002:799.070 - 0.042ms returns 0x00
+T2610 002:799.102 JLINK_WriteReg(MSP, 0x20002000)
+T2610 002:799.130 - 0.042ms returns 0x00
+T2610 002:799.163 JLINK_WriteReg(PSP, 0x20002000)
+T2610 002:799.191 - 0.042ms returns 0x00
+T2610 002:799.223 JLINK_WriteReg(CFBP, 0x00000000)
+T2610 002:799.252 - 0.042ms returns 0x00
+T2610 002:799.286   JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2)
+T2610 002:799.331 - 0.061ms returns 0x00000027
+T2610 002:799.365 JLINK_Go()
+T2610 002:799.420   CPU_ReadMem(4 bytes @ 0xE0001000)
+T2610 002:805.191 - 5.895ms
+T2610 002:805.306 JLINK_IsHalted()
+T2610 002:810.428   CPU_ReadMem(2 bytes @ 0x20000000)
+T2610 002:811.242 - 5.989ms returns TRUE
+T2610 002:811.339 JLINK_ReadReg(R15 (PC))
+T2610 002:811.398 - 0.083ms returns 0x20000000
+T2610 002:811.454 JLINK_ClrBPEx(BPHandle = 0x00000027)
+T2610 002:811.503 - 0.072ms returns 0x00
+T2610 002:811.557 JLINK_ReadReg(R0)
+T2610 002:811.605 - 0.070ms returns 0x00027000
+T2610 002:814.363 JLINK_WriteMem(0x200005C8, 0x0238 Bytes, ...)
+T2610 002:814.445   Data:  06 D0 03 28 09 D0 04 28 01 CF 09 D0 06 60 45 E1 ...
+T2610 002:814.540   CPU_WriteMem(568 bytes @ 0x200005C8)
+T2610 002:820.775 - 6.481ms returns 0x238
+T2610 002:820.890 JLINK_WriteMem(0x20000800, 0x0400 Bytes, ...)
+T2610 002:820.942   Data:  DD E9 0F 12 90 47 09 F1 01 09 76 1C C1 45 F4 DB ...
+T2610 002:821.038   CPU_WriteMem(1024 bytes @ 0x20000800)
+T2610 002:831.490 - 10.665ms returns 0x400
+T2610 002:831.608 JLINK_WriteMem(0x20000C00, 0x0400 Bytes, ...)
+T2610 002:831.659   Data:  F4 2C 00 20 98 2C 00 20 70 B5 0A 4E 01 46 0A 48 ...
+T2610 002:831.754   CPU_WriteMem(1024 bytes @ 0x20000C00)
+T2610 002:842.344 - 10.806ms returns 0x400
+T2610 002:842.469 JLINK_WriteMem(0x20001000, 0x0400 Bytes, ...)
+T2610 002:842.521   Data:  05 1E 9D D1 30 8A 50 B1 CD E9 00 47 4B 46 07 22 ...
+T2610 002:842.628   CPU_WriteMem(1024 bytes @ 0x20001000)
+T2610 002:853.160 - 10.760ms returns 0x400
+T2610 002:853.284 JLINK_WriteMem(0x20001400, 0x01C8 Bytes, ...)
+T2610 002:853.336   Data:  05 21 84 F8 31 10 21 E0 84 F8 31 B0 1E E0 E0 69 ...
+T2610 002:853.431   CPU_WriteMem(456 bytes @ 0x20001400)
+T2610 002:858.533 - 5.317ms returns 0x1C8
+T2610 002:858.666 JLINK_WriteReg(R0, 0x00027000)
+T2610 002:858.728 - 0.087ms returns 0x00
+T2610 002:858.787 JLINK_WriteReg(R1, 0x00001000)
+T2610 002:858.836 - 0.071ms returns 0x00
+T2610 002:858.893 JLINK_WriteReg(R2, 0x200005C8)
+T2610 002:858.940 - 0.075ms returns 0x00
+T2610 002:859.004 JLINK_WriteReg(R3, 0x00000000)
+T2610 002:859.052 - 0.070ms returns 0x00
+T2610 002:859.108 JLINK_WriteReg(R4, 0x00000000)
+T2610 002:859.154 - 0.069ms returns 0x00
+T2610 002:859.210 JLINK_WriteReg(R5, 0x00000000)
+T2610 002:859.257 - 0.068ms returns 0x00
+T2610 002:859.313 JLINK_WriteReg(R6, 0x00000000)
+T2610 002:859.359 - 0.069ms returns 0x00
+T2610 002:859.415 JLINK_WriteReg(R7, 0x00000000)
+T2610 002:859.461 - 0.069ms returns 0x00
+T2610 002:859.518 JLINK_WriteReg(R8, 0x00000000)
+T2610 002:859.565 - 0.069ms returns 0x00
+T2610 002:859.623 JLINK_WriteReg(R9, 0x200005B4)
+T2610 002:859.669 - 0.069ms returns 0x00
+T2610 002:859.727 JLINK_WriteReg(R10, 0x00000000)
+T2610 002:859.773 - 0.069ms returns 0x00
+T2610 002:859.831 JLINK_WriteReg(R11, 0x00000000)
+T2610 002:859.877 - 0.069ms returns 0x00
+T2610 002:859.935 JLINK_WriteReg(R12, 0x00000000)
+T2610 002:860.022 - 0.110ms returns 0x00
+T2610 002:860.080 JLINK_WriteReg(R13 (SP), 0x20002000)
+T2610 002:860.130 - 0.072ms returns 0x00
+T2610 002:860.187 JLINK_WriteReg(R14, 0x20000001)
+T2610 002:860.234 - 0.069ms returns 0x00
+T2610 002:860.291 JLINK_WriteReg(R15 (PC), 0x20000348)
+T2610 002:860.338 - 0.069ms returns 0x00
+T2610 002:860.395 JLINK_WriteReg(XPSR, 0x01000000)
+T2610 002:860.441 - 0.069ms returns 0x00
+T2610 002:860.499 JLINK_WriteReg(MSP, 0x20002000)
+T2610 002:860.545 - 0.069ms returns 0x00
+T2610 002:860.603 JLINK_WriteReg(PSP, 0x20002000)
+T2610 002:860.649 - 0.069ms returns 0x00
+T2610 002:860.707 JLINK_WriteReg(CFBP, 0x00000000)
+T2610 002:860.754 - 0.069ms returns 0x00
+T2610 002:860.814   JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2)
+T2610 002:860.884 - 0.096ms returns 0x00000028
+T2610 002:860.945 JLINK_Go()
+T2610 002:861.019   CPU_ReadMem(4 bytes @ 0xE0001000)
+T2610 002:866.693 - 5.818ms
+T2610 002:866.817 JLINK_IsHalted()
+T2610 002:872.101   CPU_ReadMem(2 bytes @ 0x20000000)
+T2610 002:872.879 - 6.124ms returns TRUE
+T2610 002:872.998 JLINK_ReadReg(R15 (PC))
+T2610 002:873.062 - 0.088ms returns 0x20000000
+T2610 002:873.123 JLINK_ClrBPEx(BPHandle = 0x00000028)
+T2610 002:873.181 - 0.086ms returns 0x00
+T2610 002:873.245 JLINK_ReadReg(R0)
+T2610 002:873.293 - 0.071ms returns 0x00028000
+T2610 002:875.777 JLINK_WriteMem(0x200005C8, 0x0238 Bytes, ...)
+T2610 002:875.883   Data:  79 FA A1 88 A9 80 18 48 02 F0 CA FC 00 28 0C D0 ...
+T2610 002:875.980   CPU_WriteMem(568 bytes @ 0x200005C8)
+T2610 002:882.119 - 6.416ms returns 0x238
+T2610 002:882.241 JLINK_WriteMem(0x20000800, 0x0400 Bytes, ...)
+T2610 002:882.297   Data:  02 F0 6D FA 0B 99 0C A8 00 F0 72 FE 2C 22 0C A9 ...
+T2610 002:882.402   CPU_WriteMem(1024 bytes @ 0x20000800)
+T2610 002:892.874 - 10.689ms returns 0x400
+T2610 002:892.975 JLINK_WriteMem(0x20000C00, 0x0400 Bytes, ...)
+T2610 002:893.030   Data:  3E 20 47 41 4D 45 4D 4F 44 45 5F 49 4E 54 4F 00 ...
+T2610 002:893.132   CPU_WriteMem(1024 bytes @ 0x20000C00)
+T2610 002:903.587 - 10.682ms returns 0x400
+T2610 002:903.711 JLINK_WriteMem(0x20001000, 0x0400 Bytes, ...)
+T2610 002:903.763   Data:  4F F4 00 51 DF E7 78 68 FE F7 E4 FD 06 46 D5 F1 ...
+T2610 002:903.858   CPU_WriteMem(1024 bytes @ 0x20001000)
+T2610 002:914.412 - 10.768ms returns 0x400
+T2610 002:914.532 JLINK_WriteMem(0x20001400, 0x01C8 Bytes, ...)
+T2610 002:914.584   Data:  40 FB 06 A8 00 F0 7E FD 08 B1 FE F7 57 FB 00 24 ...
+T2610 002:914.679   CPU_WriteMem(456 bytes @ 0x20001400)
+T2610 002:919.783 - 5.318ms returns 0x1C8
+T2610 002:920.033 JLINK_WriteReg(R0, 0x00028000)
+T2610 002:920.113 - 0.105ms returns 0x00
+T2610 002:920.168 JLINK_WriteReg(R1, 0x00001000)
+T2610 002:920.216 - 0.070ms returns 0x00
+T2610 002:920.268 JLINK_WriteReg(R2, 0x200005C8)
+T2610 002:920.315 - 0.090ms returns 0x00
+T2610 002:920.390 JLINK_WriteReg(R3, 0x00000000)
+T2610 002:920.437 - 0.069ms returns 0x00
+T2610 002:920.489 JLINK_WriteReg(R4, 0x00000000)
+T2610 002:920.535 - 0.068ms returns 0x00
+T2610 002:920.587 JLINK_WriteReg(R5, 0x00000000)
+T2610 002:920.633 - 0.068ms returns 0x00
+T2610 002:920.684 JLINK_WriteReg(R6, 0x00000000)
+T2610 002:920.730 - 0.068ms returns 0x00
+T2610 002:920.782 JLINK_WriteReg(R7, 0x00000000)
+T2610 002:920.828 - 0.068ms returns 0x00
+T2610 002:920.880 JLINK_WriteReg(R8, 0x00000000)
+T2610 002:920.926 - 0.068ms returns 0x00
+T2610 002:920.977 JLINK_WriteReg(R9, 0x200005B4)
+T2610 002:921.023 - 0.068ms returns 0x00
+T2610 002:921.075 JLINK_WriteReg(R10, 0x00000000)
+T2610 002:921.121 - 0.069ms returns 0x00
+T2610 002:921.173 JLINK_WriteReg(R11, 0x00000000)
+T2610 002:921.220 - 0.068ms returns 0x00
+T2610 002:921.271 JLINK_WriteReg(R12, 0x00000000)
+T2610 002:921.337 - 0.090ms returns 0x00
+T2610 002:921.391 JLINK_WriteReg(R13 (SP), 0x20002000)
+T2610 002:921.440 - 0.071ms returns 0x00
+T2610 002:921.492 JLINK_WriteReg(R14, 0x20000001)
+T2610 002:921.538 - 0.068ms returns 0x00
+T2610 002:921.590 JLINK_WriteReg(R15 (PC), 0x20000348)
+T2610 002:921.637 - 0.069ms returns 0x00
+T2610 002:921.689 JLINK_WriteReg(XPSR, 0x01000000)
+T2610 002:921.735 - 0.069ms returns 0x00
+T2610 002:921.787 JLINK_WriteReg(MSP, 0x20002000)
+T2610 002:921.833 - 0.068ms returns 0x00
+T2610 002:921.885 JLINK_WriteReg(PSP, 0x20002000)
+T2610 002:921.931 - 0.068ms returns 0x00
+T2610 002:921.983 JLINK_WriteReg(CFBP, 0x00000000)
+T2610 002:922.029 - 0.068ms returns 0x00
+T2610 002:922.084   JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2)
+T2610 002:922.155 - 0.097ms returns 0x00000029
+T2610 002:922.209 JLINK_Go()
+T2610 002:922.283   CPU_ReadMem(4 bytes @ 0xE0001000)
+T2610 002:927.936 - 5.795ms
+T2610 002:928.047 JLINK_IsHalted()
+T2610 002:933.100   CPU_ReadMem(2 bytes @ 0x20000000)
+T2610 002:933.865 - 5.874ms returns TRUE
+T2610 002:933.966 JLINK_ReadReg(R15 (PC))
+T2610 002:934.024 - 0.083ms returns 0x20000000
+T2610 002:934.080 JLINK_ClrBPEx(BPHandle = 0x00000029)
+T2610 002:934.128 - 0.072ms returns 0x00
+T2610 002:934.182 JLINK_ReadReg(R0)
+T2610 002:934.230 - 0.070ms returns 0x00029000
+T2610 002:936.715 JLINK_WriteMem(0x200005C8, 0x0238 Bytes, ...)
+T2610 002:936.799   Data:  59 69 00 29 06 D0 01 22 8D F8 00 20 AD F8 02 00 ...
+T2610 002:936.894   CPU_WriteMem(568 bytes @ 0x200005C8)
+T2610 002:943.107 - 6.444ms returns 0x238
+T2610 002:943.202 JLINK_WriteMem(0x20000800, 0x0400 Bytes, ...)
+T2610 002:943.253   Data:  00 0F 02 D0 28 68 C0 F8 04 43 BD E8 F0 81 00 68 ...
+T2610 002:943.356   CPU_WriteMem(1024 bytes @ 0x20000800)
+T2610 002:953.830 - 10.660ms returns 0x400
+T2610 002:953.893 JLINK_WriteMem(0x20000C00, 0x0400 Bytes, ...)
+T2610 002:953.922   Data:  01 D1 01 20 30 71 BD E8 F0 81 00 00 1C 2C 00 20 ...
+T2610 002:953.974   CPU_WriteMem(1024 bytes @ 0x20000C00)
+T2610 002:964.341 - 10.495ms returns 0x400
+T2610 002:964.421 JLINK_WriteMem(0x20001000, 0x0400 Bytes, ...)
+T2610 002:964.451   Data:  C0 B2 FD F7 6D FE 20 46 10 BD 40 68 03 F0 14 BD ...
+T2610 002:964.509   CPU_WriteMem(1024 bytes @ 0x20001000)
+T2610 002:974.866 - 10.493ms returns 0x400
+T2610 002:974.948 JLINK_WriteMem(0x20001400, 0x01C8 Bytes, ...)
+T2610 002:974.978   Data:  10 B5 0A 49 41 60 0A 48 00 F0 60 FC 58 B9 02 F0 ...
+T2610 002:975.037   CPU_WriteMem(456 bytes @ 0x20001400)
+T2610 002:980.117 - 5.231ms returns 0x1C8
+T2610 002:980.246 JLINK_WriteReg(R0, 0x00029000)
+T2610 002:980.309 - 0.088ms returns 0x00
+T2610 002:980.370 JLINK_WriteReg(R1, 0x00001000)
+T2610 002:980.419 - 0.071ms returns 0x00
+T2610 002:980.476 JLINK_WriteReg(R2, 0x200005C8)
+T2610 002:980.523 - 0.069ms returns 0x00
+T2610 002:980.579 JLINK_WriteReg(R3, 0x00000000)
+T2610 002:980.626 - 0.092ms returns 0x00
+T2610 002:980.708 JLINK_WriteReg(R4, 0x00000000)
+T2610 002:980.755 - 0.070ms returns 0x00
+T2610 002:980.813 JLINK_WriteReg(R5, 0x00000000)
+T2610 002:980.860 - 0.070ms returns 0x00
+T2610 002:980.920 JLINK_WriteReg(R6, 0x00000000)
+T2610 002:980.967 - 0.070ms returns 0x00
+T2610 002:981.025 JLINK_WriteReg(R7, 0x00000000)
+T2610 002:981.073 - 0.071ms returns 0x00
+T2610 002:981.131 JLINK_WriteReg(R8, 0x00000000)
+T2610 002:981.177 - 0.069ms returns 0x00
+T2610 002:981.234 JLINK_WriteReg(R9, 0x200005B4)
+T2610 002:981.280 - 0.069ms returns 0x00
+T2610 002:981.338 JLINK_WriteReg(R10, 0x00000000)
+T2610 002:981.385 - 0.069ms returns 0x00
+T2610 002:981.441 JLINK_WriteReg(R11, 0x00000000)
+T2610 002:981.489 - 0.071ms returns 0x00
+T2610 002:981.546 JLINK_WriteReg(R12, 0x00000000)
+T2610 002:981.594 - 0.070ms returns 0x00
+T2610 002:981.657 JLINK_WriteReg(R13 (SP), 0x20002000)
+T2610 002:981.707 - 0.072ms returns 0x00
+T2610 002:981.763 JLINK_WriteReg(R14, 0x20000001)
+T2610 002:981.810 - 0.070ms returns 0x00
+T2610 002:981.867 JLINK_WriteReg(R15 (PC), 0x20000348)
+T2610 002:981.916 - 0.071ms returns 0x00
+T2610 002:981.973 JLINK_WriteReg(XPSR, 0x01000000)
+T2610 002:982.020 - 0.071ms returns 0x00
+T2610 002:982.078 JLINK_WriteReg(MSP, 0x20002000)
+T2610 002:982.125 - 0.070ms returns 0x00
+T2610 002:982.183 JLINK_WriteReg(PSP, 0x20002000)
+T2610 002:982.230 - 0.070ms returns 0x00
+T2610 002:982.286 JLINK_WriteReg(CFBP, 0x00000000)
+T2610 002:982.333 - 0.069ms returns 0x00
+T2610 002:982.393   JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2)
+T2610 002:982.464 - 0.096ms returns 0x0000002A
+T2610 002:982.522 JLINK_Go()
+T2610 002:982.595   CPU_ReadMem(4 bytes @ 0xE0001000)
+T2610 002:988.010 - 5.559ms
+T2610 002:988.135 JLINK_IsHalted()
+T2610 002:993.184   CPU_ReadMem(2 bytes @ 0x20000000)
+T2610 002:993.933 - 5.850ms returns TRUE
+T2610 002:994.037 JLINK_ReadReg(R15 (PC))
+T2610 002:994.096 - 0.083ms returns 0x20000000
+T2610 002:994.156 JLINK_ClrBPEx(BPHandle = 0x0000002A)
+T2610 002:994.205 - 0.072ms returns 0x00
+T2610 002:994.263 JLINK_ReadReg(R0)
+T2610 002:994.310 - 0.070ms returns 0x0002A000
+T2610 002:996.102 JLINK_WriteMem(0x200005C8, 0x0238 Bytes, ...)
+T2610 002:996.170   Data:  4F F4 90 71 20 68 02 F0 79 F8 4F F4 92 71 20 68 ...
+T2610 002:996.260   CPU_WriteMem(568 bytes @ 0x200005C8)
+T2610 003:002.431 - 6.392ms returns 0x238
+T2610 003:002.539 JLINK_WriteMem(0x20000800, 0x0400 Bytes, ...)
+T2610 003:002.590   Data:  20 30 40 1C 00 91 02 28 F2 D3 01 98 00 F0 03 00 ...
+T2610 003:002.685   CPU_WriteMem(1024 bytes @ 0x20000800)
+T2610 003:013.131 - 10.661ms returns 0x400
+T2610 003:013.245 JLINK_WriteMem(0x20000C00, 0x0400 Bytes, ...)
+T2610 003:013.304   Data:  10 BD 10 B5 31 B1 B2 FB F3 F4 03 FB 14 24 1C B1 ...
+T2610 003:013.521   CPU_WriteMem(1024 bytes @ 0x20000C00)
+T2610 003:024.068 - 10.901ms returns 0x400
+T2610 003:024.204 JLINK_WriteMem(0x20001000, 0x0400 Bytes, ...)
+T2610 003:024.259   Data:  01 91 4F F4 C0 72 02 91 03 91 AD F8 04 20 00 7A ...
+T2610 003:024.356   CPU_WriteMem(1024 bytes @ 0x20001000)
+T2610 003:035.000 - 10.865ms returns 0x400
+T2610 003:035.124 JLINK_WriteMem(0x20001400, 0x01C8 Bytes, ...)
+T2610 003:035.197   Data:  60 47 20 46 17 4B 18 A2 00 97 22 E0 0E 20 00 90 ...
+T2610 003:035.293   CPU_WriteMem(456 bytes @ 0x20001400)
+T2610 003:040.595 - 5.540ms returns 0x1C8
+T2610 003:040.732 JLINK_WriteReg(R0, 0x0002A000)
+T2610 003:040.795 - 0.088ms returns 0x00
+T2610 003:040.855 JLINK_WriteReg(R1, 0x00001000)
+T2610 003:040.904 - 0.071ms returns 0x00
+T2610 003:040.961 JLINK_WriteReg(R2, 0x200005C8)
+T2610 003:041.008 - 0.070ms returns 0x00
+T2610 003:041.064 JLINK_WriteReg(R3, 0x00000000)
+T2610 003:041.111 - 0.069ms returns 0x00
+T2610 003:041.167 JLINK_WriteReg(R4, 0x00000000)
+T2610 003:041.214 - 0.069ms returns 0x00
+T2610 003:041.270 JLINK_WriteReg(R5, 0x00000000)
+T2610 003:041.316 - 0.069ms returns 0x00
+T2610 003:041.372 JLINK_WriteReg(R6, 0x00000000)
+T2610 003:041.419 - 0.069ms returns 0x00
+T2610 003:041.475 JLINK_WriteReg(R7, 0x00000000)
+T2610 003:041.521 - 0.076ms returns 0x00
+T2610 003:041.586 JLINK_WriteReg(R8, 0x00000000)
+T2610 003:041.633 - 0.069ms returns 0x00
+T2610 003:041.689 JLINK_WriteReg(R9, 0x200005B4)
+T2610 003:041.735 - 0.069ms returns 0x00
+T2610 003:041.791 JLINK_WriteReg(R10, 0x00000000)
+T2610 003:041.838 - 0.069ms returns 0x00
+T2610 003:041.894 JLINK_WriteReg(R11, 0x00000000)
+T2610 003:041.941 - 0.069ms returns 0x00
+T2610 003:041.998 JLINK_WriteReg(R12, 0x00000000)
+T2610 003:042.044 - 0.069ms returns 0x00
+T2610 003:042.100 JLINK_WriteReg(R13 (SP), 0x20002000)
+T2610 003:042.149 - 0.071ms returns 0x00
+T2610 003:042.206 JLINK_WriteReg(R14, 0x20000001)
+T2610 003:042.252 - 0.069ms returns 0x00
+T2610 003:042.310 JLINK_WriteReg(R15 (PC), 0x20000348)
+T2610 003:042.357 - 0.070ms returns 0x00
+T2610 003:042.414 JLINK_WriteReg(XPSR, 0x01000000)
+T2610 003:042.461 - 0.069ms returns 0x00
+T2610 003:042.519 JLINK_WriteReg(MSP, 0x20002000)
+T2610 003:042.569 - 0.073ms returns 0x00
+T2610 003:042.627 JLINK_WriteReg(PSP, 0x20002000)
+T2610 003:042.687 - 0.083ms returns 0x00
+T2610 003:042.745 JLINK_WriteReg(CFBP, 0x00000000)
+T2610 003:042.792 - 0.069ms returns 0x00
+T2610 003:042.853   JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2)
+T2610 003:042.923 - 0.096ms returns 0x0000002B
+T2610 003:042.982 JLINK_Go()
+T2610 003:043.055   CPU_ReadMem(4 bytes @ 0xE0001000)
+T2610 003:048.377 - 5.461ms
+T2610 003:048.504 JLINK_IsHalted()
+T2610 003:053.389   CPU_ReadMem(2 bytes @ 0x20000000)
+T2610 003:054.245 - 5.810ms returns TRUE
+T2610 003:054.370 JLINK_ReadReg(R15 (PC))
+T2610 003:054.431 - 0.086ms returns 0x20000000
+T2610 003:054.491 JLINK_ClrBPEx(BPHandle = 0x0000002B)
+T2610 003:054.552 - 0.086ms returns 0x00
+T2610 003:054.621 JLINK_ReadReg(R0)
+T2610 003:054.676 - 0.083ms returns 0x0002B000
+T2610 003:056.582 JLINK_WriteMem(0x200005C8, 0x0238 Bytes, ...)
+T2610 003:056.664   Data:  02 D0 03 2A 2A D1 1B E0 E3 60 01 79 11 B1 01 29 ...
+T2610 003:056.758   CPU_WriteMem(568 bytes @ 0x200005C8)
+T2610 003:062.974 - 6.454ms returns 0x238
+T2610 003:063.080 JLINK_WriteMem(0x20000800, 0x0400 Bytes, ...)
+T2610 003:063.131   Data:  5F 69 73 5F 77 69 74 68 69 6E 5F 62 6F 75 6E 64 ...
+T2610 003:063.227   CPU_WriteMem(1024 bytes @ 0x20000800)
+T2610 003:073.638 - 10.628ms returns 0x400
+T2610 003:073.761 JLINK_WriteMem(0x20000C00, 0x0400 Bytes, ...)
+T2610 003:073.815   Data:  78 D0 00 F0 27 FA 43 46 08 22 05 A9 38 46 00 F0 ...
+T2610 003:073.918   CPU_WriteMem(1024 bytes @ 0x20000C00)
+T2610 003:084.494 - 10.803ms returns 0x400
+T2610 003:084.624 JLINK_WriteMem(0x20001000, 0x0400 Bytes, ...)
+T2610 003:084.677   Data:  49 1C 61 71 28 60 05 46 7F 1C C0 F8 00 80 B7 42 ...
+T2610 003:084.774   CPU_WriteMem(1024 bytes @ 0x20001000)
+T2610 003:095.264 - 10.703ms returns 0x400
+T2610 003:095.381 JLINK_WriteMem(0x20001400, 0x01C8 Bytes, ...)
+T2610 003:095.433   Data:  AD F8 00 52 80 A9 68 46 61 DF 38 B1 05 28 16 D0 ...
+T2610 003:095.529   CPU_WriteMem(456 bytes @ 0x20001400)
+T2610 003:100.950 - 5.639ms returns 0x1C8
+T2610 003:101.087 JLINK_WriteReg(R0, 0x0002B000)
+T2610 003:101.151 - 0.089ms returns 0x00
+T2610 003:101.211 JLINK_WriteReg(R1, 0x00001000)
+T2610 003:101.259 - 0.071ms returns 0x00
+T2610 003:101.316 JLINK_WriteReg(R2, 0x200005C8)
+T2610 003:101.363 - 0.070ms returns 0x00
+T2610 003:101.419 JLINK_WriteReg(R3, 0x00000000)
+T2610 003:101.466 - 0.069ms returns 0x00
+T2610 003:101.522 JLINK_WriteReg(R4, 0x00000000)
+T2610 003:101.568 - 0.069ms returns 0x00
+T2610 003:101.624 JLINK_WriteReg(R5, 0x00000000)
+T2610 003:101.671 - 0.069ms returns 0x00
+T2610 003:101.727 JLINK_WriteReg(R6, 0x00000000)
+T2610 003:101.773 - 0.075ms returns 0x00
+T2610 003:101.841 JLINK_WriteReg(R7, 0x00000000)
+T2610 003:101.889 - 0.070ms returns 0x00
+T2610 003:101.945 JLINK_WriteReg(R8, 0x00000000)
+T2610 003:101.992 - 0.069ms returns 0x00
+T2610 003:102.048 JLINK_WriteReg(R9, 0x200005B4)
+T2610 003:102.095 - 0.069ms returns 0x00
+T2610 003:102.151 JLINK_WriteReg(R10, 0x00000000)
+T2610 003:102.197 - 0.069ms returns 0x00
+T2610 003:102.254 JLINK_WriteReg(R11, 0x00000000)
+T2610 003:102.301 - 0.069ms returns 0x00
+T2610 003:102.357 JLINK_WriteReg(R12, 0x00000000)
+T2610 003:102.404 - 0.069ms returns 0x00
+T2610 003:102.460 JLINK_WriteReg(R13 (SP), 0x20002000)
+T2610 003:102.509 - 0.072ms returns 0x00
+T2610 003:102.565 JLINK_WriteReg(R14, 0x20000001)
+T2610 003:102.612 - 0.069ms returns 0x00
+T2610 003:102.670 JLINK_WriteReg(R15 (PC), 0x20000348)
+T2610 003:102.717 - 0.069ms returns 0x00
+T2610 003:102.777 JLINK_WriteReg(XPSR, 0x01000000)
+T2610 003:102.824 - 0.070ms returns 0x00
+T2610 003:102.882 JLINK_WriteReg(MSP, 0x20002000)
+T2610 003:102.929 - 0.069ms returns 0x00
+T2610 003:102.986 JLINK_WriteReg(PSP, 0x20002000)
+T2610 003:103.033 - 0.069ms returns 0x00
+T2610 003:103.090 JLINK_WriteReg(CFBP, 0x00000000)
+T2610 003:103.136 - 0.069ms returns 0x00
+T2610 003:103.197   JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2)
+T2610 003:103.268 - 0.096ms returns 0x0000002C
+T2610 003:103.327 JLINK_Go()
+T2610 003:103.399   CPU_ReadMem(4 bytes @ 0xE0001000)
+T2610 003:109.108 - 5.852ms
+T2610 003:109.234 JLINK_IsHalted()
+T2610 003:114.345   CPU_ReadMem(2 bytes @ 0x20000000)
+T2610 003:115.260 - 6.097ms returns TRUE
+T2610 003:115.382 JLINK_ReadReg(R15 (PC))
+T2610 003:115.444 - 0.086ms returns 0x20000000
+T2610 003:115.503 JLINK_ClrBPEx(BPHandle = 0x0000002C)
+T2610 003:115.553 - 0.072ms returns 0x00
+T2610 003:115.611 JLINK_ReadReg(R0)
+T2610 003:115.659 - 0.070ms returns 0x0002C000
+T2610 003:117.516 JLINK_WriteMem(0x200005C8, 0x0238 Bytes, ...)
+T2610 003:117.592   Data:  F0 E7 81 68 00 29 0B D0 02 68 92 68 0A 44 82 60 ...
+T2610 003:117.684   CPU_WriteMem(568 bytes @ 0x200005C8)
+T2610 003:123.821 - 6.374ms returns 0x238
+T2610 003:123.934 JLINK_WriteMem(0x20000800, 0x0400 Bytes, ...)
+T2610 003:123.985   Data:  BD E8 F0 81 00 60 00 40 A8 58 00 20 2D E9 FC 41 ...
+T2610 003:124.080   CPU_WriteMem(1024 bytes @ 0x20000800)
+T2610 003:134.641 - 10.777ms returns 0x400
+T2610 003:134.757 JLINK_WriteMem(0x20000C00, 0x0400 Bytes, ...)
+T2610 003:134.808   Data:  30 BD 00 00 BC 2C 00 20 70 B5 0E 46 05 46 4F F4 ...
+T2610 003:134.904   CPU_WriteMem(1024 bytes @ 0x20000C00)
+T2610 003:145.679 - 10.995ms returns 0x400
+T2610 003:145.810 JLINK_WriteMem(0x20001000, 0x0400 Bytes, ...)
+T2610 003:145.869   Data:  2D E9 F0 5F 04 46 00 79 0E 46 00 EB C0 01 DF F8 ...
+T2610 003:145.980   CPU_WriteMem(1024 bytes @ 0x20001000)
+T2610 003:156.421 - 10.680ms returns 0x400
+T2610 003:156.544 JLINK_WriteMem(0x20001400, 0x01C8 Bytes, ...)
+T2610 003:156.595   Data:  CB FC A1 79 E0 79 81 42 08 D9 28 46 BD E8 70 40 ...
+T2610 003:156.690   CPU_WriteMem(456 bytes @ 0x20001400)
+T2610 003:161.817 - 5.332ms returns 0x1C8
+T2610 003:161.939 JLINK_WriteReg(R0, 0x0002C000)
+T2610 003:162.009 - 0.100ms returns 0x00
+T2610 003:162.069 JLINK_WriteReg(R1, 0x00001000)
+T2610 003:162.117 - 0.070ms returns 0x00
+T2610 003:162.170 JLINK_WriteReg(R2, 0x200005C8)
+T2610 003:162.337 - 0.195ms returns 0x00
+T2610 003:162.402 JLINK_WriteReg(R3, 0x00000000)
+T2610 003:162.450 - 0.070ms returns 0x00
+T2610 003:162.506 JLINK_WriteReg(R4, 0x00000000)
+T2610 003:162.554 - 0.071ms returns 0x00
+T2610 003:162.611 JLINK_WriteReg(R5, 0x00000000)
+T2610 003:162.658 - 0.070ms returns 0x00
+T2610 003:162.715 JLINK_WriteReg(R6, 0x00000000)
+T2610 003:162.762 - 0.070ms returns 0x00
+T2610 003:162.819 JLINK_WriteReg(R7, 0x00000000)
+T2610 003:162.866 - 0.069ms returns 0x00
+T2610 003:162.923 JLINK_WriteReg(R8, 0x00000000)
+T2610 003:162.970 - 0.071ms returns 0x00
+T2610 003:163.028 JLINK_WriteReg(R9, 0x200005B4)
+T2610 003:163.076 - 0.071ms returns 0x00
+T2610 003:163.134 JLINK_WriteReg(R10, 0x00000000)
+T2610 003:163.182 - 0.071ms returns 0x00
+T2610 003:163.263 JLINK_WriteReg(R11, 0x00000000)
+T2610 003:163.313 - 0.074ms returns 0x00
+T2610 003:163.374 JLINK_WriteReg(R12, 0x00000000)
+T2610 003:163.422 - 0.072ms returns 0x00
+T2610 003:163.482 JLINK_WriteReg(R13 (SP), 0x20002000)
+T2610 003:163.533 - 0.076ms returns 0x00
+T2610 003:163.594 JLINK_WriteReg(R14, 0x20000001)
+T2610 003:163.644 - 0.073ms returns 0x00
+T2610 003:163.703 JLINK_WriteReg(R15 (PC), 0x20000348)
+T2610 003:163.752 - 0.071ms returns 0x00
+T2610 003:163.809 JLINK_WriteReg(XPSR, 0x01000000)
+T2610 003:163.856 - 0.070ms returns 0x00
+T2610 003:163.915 JLINK_WriteReg(MSP, 0x20002000)
+T2610 003:163.962 - 0.071ms returns 0x00
+T2610 003:164.021 JLINK_WriteReg(PSP, 0x20002000)
+T2610 003:164.071 - 0.073ms returns 0x00
+T2610 003:164.124 JLINK_WriteReg(CFBP, 0x00000000)
+T2610 003:164.173 - 0.073ms returns 0x00
+T2610 003:164.249   JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2)
+T2610 003:164.325 - 0.102ms returns 0x0000002D
+T2610 003:164.384 JLINK_Go()
+T2610 003:164.458   CPU_ReadMem(4 bytes @ 0xE0001000)
+T2610 003:169.883 - 5.559ms
+T2610 003:169.992 JLINK_IsHalted()
+T2610 003:174.866   CPU_ReadMem(2 bytes @ 0x20000000)
+T2610 003:175.600 - 5.662ms returns TRUE
+T2610 003:175.704 JLINK_ReadReg(R15 (PC))
+T2610 003:175.762 - 0.082ms returns 0x20000000
+T2610 003:175.822 JLINK_ClrBPEx(BPHandle = 0x0000002D)
+T2610 003:175.871 - 0.072ms returns 0x00
+T2610 003:175.929 JLINK_ReadReg(R0)
+T2610 003:175.977 - 0.070ms returns 0x0002D000
+T2610 003:178.220 JLINK_WriteMem(0x200005C8, 0x0238 Bytes, ...)
+T2610 003:178.301   Data:  CB 88 1A 44 D2 1C 02 81 42 89 C9 88 51 1A C9 1E ...
+T2610 003:178.394   CPU_WriteMem(568 bytes @ 0x200005C8)
+T2610 003:184.602 - 6.453ms returns 0x238
+T2610 003:184.718 JLINK_WriteMem(0x20000800, 0x0400 Bytes, ...)
+T2610 003:184.769   Data:  C2 08 00 F0 07 03 88 5C 01 24 9C 40 20 43 88 54 ...
+T2610 003:184.864   CPU_WriteMem(1024 bytes @ 0x20000800)
+T2610 003:195.543 - 10.961ms returns 0x400
+T2610 003:195.756 JLINK_WriteMem(0x20000C00, 0x0400 Bytes, ...)
+T2610 003:195.811   Data:  2D E9 F0 47 07 46 20 48 1C 46 15 46 00 78 0E 46 ...
+T2610 003:195.918   CPU_WriteMem(1024 bytes @ 0x20000C00)
+T2610 003:206.446 - 10.760ms returns 0x400
+T2610 003:206.571 JLINK_WriteMem(0x20001000, 0x0400 Bytes, ...)
+T2610 003:206.624   Data:  C8 2C 00 20 9C F6 02 00 70 B5 05 46 88 69 0C 46 ...
+T2610 003:206.720   CPU_WriteMem(1024 bytes @ 0x20001000)
+T2610 003:217.174 - 10.682ms returns 0x400
+T2610 003:217.307 JLINK_WriteMem(0x20001400, 0x01C8 Bytes, ...)
+T2610 003:217.360   Data:  44 50 45 54 49 1C C9 B2 08 2B F6 DB 44 54 49 1C ...
+T2610 003:217.457   CPU_WriteMem(456 bytes @ 0x20001400)
+T2610 003:222.636 - 5.403ms returns 0x1C8
+T2610 003:222.779 JLINK_WriteReg(R0, 0x0002D000)
+T2610 003:222.843 - 0.089ms returns 0x00
+T2610 003:222.903 JLINK_WriteReg(R1, 0x00001000)
+T2610 003:222.952 - 0.071ms returns 0x00
+T2610 003:223.008 JLINK_WriteReg(R2, 0x200005C8)
+T2610 003:223.055 - 0.069ms returns 0x00
+T2610 003:223.111 JLINK_WriteReg(R3, 0x00000000)
+T2610 003:223.172 - 0.084ms returns 0x00
+T2610 003:223.229 JLINK_WriteReg(R4, 0x00000000)
+T2610 003:223.285 - 0.083ms returns 0x00
+T2610 003:223.348 JLINK_WriteReg(R5, 0x00000000)
+T2610 003:223.394 - 0.069ms returns 0x00
+T2610 003:223.452 JLINK_WriteReg(R6, 0x00000000)
+T2610 003:223.499 - 0.069ms returns 0x00
+T2610 003:223.556 JLINK_WriteReg(R7, 0x00000000)
+T2610 003:223.608 - 0.075ms returns 0x00
+T2610 003:223.667 JLINK_WriteReg(R8, 0x00000000)
+T2610 003:223.715 - 0.070ms returns 0x00
+T2610 003:223.771 JLINK_WriteReg(R9, 0x200005B4)
+T2610 003:223.818 - 0.069ms returns 0x00
+T2610 003:223.874 JLINK_WriteReg(R10, 0x00000000)
+T2610 003:223.921 - 0.069ms returns 0x00
+T2610 003:223.977 JLINK_WriteReg(R11, 0x00000000)
+T2610 003:224.024 - 0.069ms returns 0x00
+T2610 003:224.080 JLINK_WriteReg(R12, 0x00000000)
+T2610 003:224.127 - 0.069ms returns 0x00
+T2610 003:224.183 JLINK_WriteReg(R13 (SP), 0x20002000)
+T2610 003:224.233 - 0.072ms returns 0x00
+T2610 003:224.289 JLINK_WriteReg(R14, 0x20000001)
+T2610 003:224.336 - 0.069ms returns 0x00
+T2610 003:224.392 JLINK_WriteReg(R15 (PC), 0x20000348)
+T2610 003:224.439 - 0.069ms returns 0x00
+T2610 003:224.496 JLINK_WriteReg(XPSR, 0x01000000)
+T2610 003:224.542 - 0.072ms returns 0x00
+T2610 003:224.601 JLINK_WriteReg(MSP, 0x20002000)
+T2610 003:224.648 - 0.069ms returns 0x00
+T2610 003:224.704 JLINK_WriteReg(PSP, 0x20002000)
+T2610 003:224.751 - 0.069ms returns 0x00
+T2610 003:224.807 JLINK_WriteReg(CFBP, 0x00000000)
+T2610 003:224.853 - 0.069ms returns 0x00
+T2610 003:224.913   JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2)
+T2610 003:224.984 - 0.096ms returns 0x0000002E
+T2610 003:225.042 JLINK_Go()
+T2610 003:225.114   CPU_ReadMem(4 bytes @ 0xE0001000)
+T2610 003:230.460 - 5.469ms
+T2610 003:230.567 JLINK_IsHalted()
+T2610 003:235.392   CPU_ReadMem(2 bytes @ 0x20000000)
+T2610 003:236.117 - 5.599ms returns TRUE
+T2610 003:236.216 JLINK_ReadReg(R15 (PC))
+T2610 003:236.274 - 0.081ms returns 0x20000000
+T2610 003:236.335 JLINK_ClrBPEx(BPHandle = 0x0000002E)
+T2610 003:236.384 - 0.072ms returns 0x00
+T2610 003:236.443 JLINK_ReadReg(R0)
+T2610 003:236.490 - 0.070ms returns 0x0002E000
+T2610 003:238.254 JLINK_WriteMem(0x200005C8, 0x0238 Bytes, ...)
+T2610 003:238.323   Data:  18 D0 00 25 0E 4F 03 26 08 EB 05 01 22 46 00 20 ...
+T2610 003:238.411   CPU_WriteMem(568 bytes @ 0x200005C8)
+T2610 003:244.715 - 6.532ms returns 0x238
+T2610 003:244.831 JLINK_WriteMem(0x20000800, 0x0400 Bytes, ...)
+T2610 003:244.883   Data:  00 00 01 E0 FD F7 A8 F9 00 28 FB D1 BD E8 F8 8F ...
+T2610 003:244.979   CPU_WriteMem(1024 bytes @ 0x20000800)
+T2610 003:255.544 - 10.783ms returns 0x400
+T2610 003:255.660 JLINK_WriteMem(0x20000C00, 0x0400 Bytes, ...)
+T2610 003:255.711   Data:  64 00 00 00 04 4B 00 20 14 2C 00 20 75 61 72 74 ...
+T2610 003:255.807   CPU_WriteMem(1024 bytes @ 0x20000C00)
+T2610 003:266.389 - 10.804ms returns 0x400
+T2610 003:266.520 JLINK_WriteMem(0x20001000, 0x0400 Bytes, ...)
+T2610 003:266.573   Data:  0C 46 4F F4 92 77 05 46 39 46 FD F7 56 FB 00 26 ...
+T2610 003:266.668   CPU_WriteMem(1024 bytes @ 0x20001000)
+T2610 003:277.130 - 10.679ms returns 0x400
+T2610 003:277.252 JLINK_WriteMem(0x20001400, 0x01C8 Bytes, ...)
+T2610 003:277.304   Data:  74 75 3D 20 25 64 20 00 66 6C 61 73 68 62 75 73 ...
+T2610 003:277.399   CPU_WriteMem(456 bytes @ 0x20001400)
+T2610 003:282.694 - 5.512ms returns 0x1C8
+T2610 003:282.832 JLINK_WriteReg(R0, 0x0002E000)
+T2610 003:282.896 - 0.089ms returns 0x00
+T2610 003:282.955 JLINK_WriteReg(R1, 0x00001000)
+T2610 003:283.003 - 0.071ms returns 0x00
+T2610 003:283.060 JLINK_WriteReg(R2, 0x200005C8)
+T2610 003:283.107 - 0.069ms returns 0x00
+T2610 003:283.163 JLINK_WriteReg(R3, 0x00000000)
+T2610 003:283.210 - 0.069ms returns 0x00
+T2610 003:283.266 JLINK_WriteReg(R4, 0x00000000)
+T2610 003:283.312 - 0.069ms returns 0x00
+T2610 003:283.368 JLINK_WriteReg(R5, 0x00000000)
+T2610 003:283.415 - 0.069ms returns 0x00
+T2610 003:283.471 JLINK_WriteReg(R6, 0x00000000)
+T2610 003:283.518 - 0.069ms returns 0x00
+T2610 003:283.574 JLINK_WriteReg(R7, 0x00000000)
+T2610 003:283.620 - 0.080ms returns 0x00
+T2610 003:283.689 JLINK_WriteReg(R8, 0x00000000)
+T2610 003:283.749 - 0.083ms returns 0x00
+T2610 003:283.806 JLINK_WriteReg(R9, 0x200005B4)
+T2610 003:283.853 - 0.069ms returns 0x00
+T2610 003:283.909 JLINK_WriteReg(R10, 0x00000000)
+T2610 003:283.956 - 0.070ms returns 0x00
+T2610 003:284.012 JLINK_WriteReg(R11, 0x00000000)
+T2610 003:284.059 - 0.069ms returns 0x00
+T2610 003:284.115 JLINK_WriteReg(R12, 0x00000000)
+T2610 003:284.162 - 0.069ms returns 0x00
+T2610 003:284.218 JLINK_WriteReg(R13 (SP), 0x20002000)
+T2610 003:284.268 - 0.072ms returns 0x00
+T2610 003:284.325 JLINK_WriteReg(R14, 0x20000001)
+T2610 003:284.372 - 0.069ms returns 0x00
+T2610 003:284.429 JLINK_WriteReg(R15 (PC), 0x20000348)
+T2610 003:284.476 - 0.069ms returns 0x00
+T2610 003:284.533 JLINK_WriteReg(XPSR, 0x01000000)
+T2610 003:284.580 - 0.069ms returns 0x00
+T2610 003:284.637 JLINK_WriteReg(MSP, 0x20002000)
+T2610 003:284.692 - 0.078ms returns 0x00
+T2610 003:284.750 JLINK_WriteReg(PSP, 0x20002000)
+T2610 003:284.797 - 0.069ms returns 0x00
+T2610 003:284.854 JLINK_WriteReg(CFBP, 0x00000000)
+T2610 003:284.901 - 0.069ms returns 0x00
+T2610 003:284.961   JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2)
+T2610 003:285.032 - 0.096ms returns 0x0000002F
+T2610 003:285.091 JLINK_Go()
+T2610 003:285.165   CPU_ReadMem(4 bytes @ 0xE0001000)
+T2610 003:290.798 - 5.777ms
+T2610 003:290.925 JLINK_IsHalted()
+T2610 003:295.987   CPU_ReadMem(2 bytes @ 0x20000000)
+T2610 003:296.705 - 5.823ms returns TRUE
+T2610 003:296.797 JLINK_ReadReg(R15 (PC))
+T2610 003:296.853 - 0.080ms returns 0x20000000
+T2610 003:296.913 JLINK_ClrBPEx(BPHandle = 0x0000002F)
+T2610 003:296.961 - 0.071ms returns 0x00
+T2610 003:297.019 JLINK_ReadReg(R0)
+T2610 003:297.066 - 0.070ms returns 0x0002F000
+T2610 003:298.864 JLINK_WriteMem(0x200005C8, 0x0238 Bytes, ...)
+T2610 003:298.932   Data:  63 6F 72 64 5F 77 72 69 74 65 20 3D 20 46 44 53 ...
+T2610 003:299.020   CPU_WriteMem(568 bytes @ 0x200005C8)
+T2610 003:305.399 - 6.605ms returns 0x238
+T2610 003:305.515 JLINK_WriteMem(0x20000800, 0x0400 Bytes, ...)
+T2610 003:305.566   Data:  52 1C 90 B2 20 80 09 F8 00 E0 20 88 40 1C 20 80 ...
+T2610 003:305.662   CPU_WriteMem(1024 bytes @ 0x20000800)
+T2610 003:316.142 - 10.689ms returns 0x400
+T2610 003:316.250 JLINK_WriteMem(0x20000C00, 0x0400 Bytes, ...)
+T2610 003:316.300   Data:  00 00 00 00 00 40 02 40 24 01 04 00 1A 11 12 13 ...
+T2610 003:316.397   CPU_WriteMem(1024 bytes @ 0x20000C00)
+T2610 003:326.934 - 10.754ms returns 0x400
+T2610 003:327.060 JLINK_WriteMem(0x20001000, 0x0400 Bytes, ...)
+T2610 003:327.115   Data:  40 00 00 00 B9 F9 02 00 46 44 53 5F 45 56 54 5F ...
+T2610 003:327.212   CPU_WriteMem(1024 bytes @ 0x20001000)
+T2610 003:337.752 - 10.762ms returns 0x400
+T2610 003:337.878 JLINK_WriteMem(0x20001400, 0x01C8 Bytes, ...)
+T2610 003:337.929   Data:  45 5F 4E 4F 54 5F 45 4E 41 42 4C 45 44 00 00 00 ...
+T2610 003:338.033   CPU_WriteMem(456 bytes @ 0x20001400)
+T2610 003:343.123 - 5.317ms returns 0x1C8
+T2610 003:343.261 JLINK_WriteReg(R0, 0x0002F000)
+T2610 003:343.324 - 0.088ms returns 0x00
+T2610 003:343.383 JLINK_WriteReg(R1, 0x00001000)
+T2610 003:343.431 - 0.071ms returns 0x00
+T2610 003:343.487 JLINK_WriteReg(R2, 0x200005C8)
+T2610 003:343.534 - 0.069ms returns 0x00
+T2610 003:343.591 JLINK_WriteReg(R3, 0x00000000)
+T2610 003:343.637 - 0.069ms returns 0x00
+T2610 003:343.693 JLINK_WriteReg(R4, 0x00000000)
+T2610 003:343.740 - 0.069ms returns 0x00
+T2610 003:343.796 JLINK_WriteReg(R5, 0x00000000)
+T2610 003:343.843 - 0.069ms returns 0x00
+T2610 003:343.899 JLINK_WriteReg(R6, 0x00000000)
+T2610 003:343.946 - 0.069ms returns 0x00
+T2610 003:344.002 JLINK_WriteReg(R7, 0x00000000)
+T2610 003:344.048 - 0.069ms returns 0x00
+T2610 003:344.104 JLINK_WriteReg(R8, 0x00000000)
+T2610 003:344.151 - 0.069ms returns 0x00
+T2610 003:344.212 JLINK_WriteReg(R9, 0x200005B4)
+T2610 003:344.259 - 0.069ms returns 0x00
+T2610 003:344.316 JLINK_WriteReg(R10, 0x00000000)
+T2610 003:344.363 - 0.070ms returns 0x00
+T2610 003:344.419 JLINK_WriteReg(R11, 0x00000000)
+T2610 003:344.466 - 0.069ms returns 0x00
+T2610 003:344.530 JLINK_WriteReg(R12, 0x00000000)
+T2610 003:344.582 - 0.075ms returns 0x00
+T2610 003:344.639 JLINK_WriteReg(R13 (SP), 0x20002000)
+T2610 003:344.688 - 0.072ms returns 0x00
+T2610 003:344.745 JLINK_WriteReg(R14, 0x20000001)
+T2610 003:344.792 - 0.069ms returns 0x00
+T2610 003:344.849 JLINK_WriteReg(R15 (PC), 0x20000348)
+T2610 003:344.897 - 0.070ms returns 0x00
+T2610 003:344.954 JLINK_WriteReg(XPSR, 0x01000000)
+T2610 003:345.001 - 0.069ms returns 0x00
+T2610 003:345.059 JLINK_WriteReg(MSP, 0x20002000)
+T2610 003:345.105 - 0.069ms returns 0x00
+T2610 003:345.163 JLINK_WriteReg(PSP, 0x20002000)
+T2610 003:345.210 - 0.073ms returns 0x00
+T2610 003:345.272 JLINK_WriteReg(CFBP, 0x00000000)
+T2610 003:345.318 - 0.069ms returns 0x00
+T2610 003:345.374   JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2)
+T2610 003:345.445 - 0.096ms returns 0x00000030
+T2610 003:345.498 JLINK_Go()
+T2610 003:345.571   CPU_ReadMem(4 bytes @ 0xE0001000)
+T2610 003:351.170 - 5.743ms
+T2610 003:351.296 JLINK_IsHalted()
+T2610 003:356.523   CPU_ReadMem(2 bytes @ 0x20000000)
+T2610 003:357.256 - 6.019ms returns TRUE
+T2610 003:357.369 JLINK_ReadReg(R15 (PC))
+T2610 003:357.431 - 0.085ms returns 0x20000000
+T2610 003:357.490 JLINK_ClrBPEx(BPHandle = 0x00000030)
+T2610 003:357.539 - 0.071ms returns 0x00
+T2610 003:357.718 JLINK_ReadReg(R0)
+T2610 003:357.814 - 0.123ms returns 0x00030000
+T2610 003:360.431 JLINK_WriteMem(0x200005C8, 0x0238 Bytes, ...)
+T2610 003:360.512   Data:  52 5F 49 4F 5F 50 45 4E 44 49 4E 47 00 00 00 00 ...
+T2610 003:360.620   CPU_WriteMem(568 bytes @ 0x200005C8)
+T2610 003:366.976 - 6.616ms returns 0x238
+T2610 003:367.092 JLINK_WriteMem(0x20000800, 0x0400 Bytes, ...)
+T2610 003:367.143   Data:  1B 5B 31 3B 33 30 6D 00 1B 5B 30 6D 00 00 00 00 ...
+T2610 003:367.239   CPU_WriteMem(1024 bytes @ 0x20000800)
+T2610 003:377.729 - 10.698ms returns 0x400
+T2610 003:377.836 JLINK_WriteMem(0x20000C00, 0x0400 Bytes, ...)
+T2610 003:377.888   Data:  51 84 02 00 E4 2B 00 20 DB A9 02 00 68 46 00 20 ...
+T2610 003:377.984   CPU_WriteMem(1024 bytes @ 0x20000C00)
+T2610 003:388.538 - 10.780ms returns 0x400
+T2610 003:388.673 JLINK_WriteMem(0x20001000, 0x0400 Bytes, ...)
+T2610 003:388.725   Data:  00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ...
+T2610 003:388.821   CPU_WriteMem(1024 bytes @ 0x20001000)
+T2610 003:399.322 - 10.705ms returns 0x400
+T2610 003:399.430 JLINK_WriteMem(0x20001400, 0x01C8 Bytes, ...)
+T2610 003:399.489   Data:  00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ...
+T2610 003:399.595   CPU_WriteMem(456 bytes @ 0x20001400)
+T2610 003:404.690 - 5.315ms returns 0x1C8
+T2610 003:404.809 JLINK_WriteReg(R0, 0x00030000)
+T2610 003:404.869 - 0.085ms returns 0x00
+T2610 003:404.928 JLINK_WriteReg(R1, 0x00000738)
+T2610 003:404.976 - 0.071ms returns 0x00
+T2610 003:405.033 JLINK_WriteReg(R2, 0x200005C8)
+T2610 003:405.080 - 0.069ms returns 0x00
+T2610 003:405.136 JLINK_WriteReg(R3, 0x00000000)
+T2610 003:405.182 - 0.069ms returns 0x00
+T2610 003:405.239 JLINK_WriteReg(R4, 0x00000000)
+T2610 003:405.285 - 0.069ms returns 0x00
+T2610 003:405.341 JLINK_WriteReg(R5, 0x00000000)
+T2610 003:405.387 - 0.069ms returns 0x00
+T2610 003:405.443 JLINK_WriteReg(R6, 0x00000000)
+T2610 003:405.496 - 0.074ms returns 0x00
+T2610 003:405.552 JLINK_WriteReg(R7, 0x00000000)
+T2610 003:405.599 - 0.069ms returns 0x00
+T2610 003:405.655 JLINK_WriteReg(R8, 0x00000000)
+T2610 003:405.702 - 0.069ms returns 0x00
+T2610 003:405.758 JLINK_WriteReg(R9, 0x200005B4)
+T2610 003:405.804 - 0.069ms returns 0x00
+T2610 003:405.860 JLINK_WriteReg(R10, 0x00000000)
+T2610 003:405.907 - 0.069ms returns 0x00
+T2610 003:405.963 JLINK_WriteReg(R11, 0x00000000)
+T2610 003:406.010 - 0.069ms returns 0x00
+T2610 003:406.066 JLINK_WriteReg(R12, 0x00000000)
+T2610 003:406.113 - 0.069ms returns 0x00
+T2610 003:406.169 JLINK_WriteReg(R13 (SP), 0x20002000)
+T2610 003:406.219 - 0.072ms returns 0x00
+T2610 003:406.275 JLINK_WriteReg(R14, 0x20000001)
+T2610 003:406.322 - 0.069ms returns 0x00
+T2610 003:406.378 JLINK_WriteReg(R15 (PC), 0x20000348)
+T2610 003:406.426 - 0.078ms returns 0x00
+T2610 003:406.501 JLINK_WriteReg(XPSR, 0x01000000)
+T2610 003:406.550 - 0.071ms returns 0x00
+T2610 003:406.606 JLINK_WriteReg(MSP, 0x20002000)
+T2610 003:406.653 - 0.069ms returns 0x00
+T2610 003:406.709 JLINK_WriteReg(PSP, 0x20002000)
+T2610 003:406.755 - 0.069ms returns 0x00
+T2610 003:406.813 JLINK_WriteReg(CFBP, 0x00000000)
+T2610 003:406.859 - 0.069ms returns 0x00
+T2610 003:406.920   JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2)
+T2610 003:406.991 - 0.096ms returns 0x00000031
+T2610 003:407.050 JLINK_Go()
+T2610 003:407.121   CPU_ReadMem(4 bytes @ 0xE0001000)
+T2610 003:412.542 - 5.571ms
+T2610 003:412.682 JLINK_IsHalted()
+T2610 003:417.888   CPU_ReadMem(2 bytes @ 0x20000000)
+T2610 003:418.656 - 6.041ms returns TRUE
+T2610 003:418.778 JLINK_ReadReg(R15 (PC))
+T2610 003:418.840 - 0.086ms returns 0x20000000
+T2610 003:418.900 JLINK_ClrBPEx(BPHandle = 0x00000031)
+T2610 003:418.949 - 0.071ms returns 0x00
+T2610 003:419.009 JLINK_ReadReg(R0)
+T2610 003:419.057 - 0.071ms returns 0x00030738
+T2610 003:423.245 JLINK_WriteReg(R0, 0x00000003)
+T2610 003:423.343 - 0.124ms returns 0x00
+T2610 003:423.400 JLINK_WriteReg(R1, 0x00000738)
+T2610 003:423.448 - 0.071ms returns 0x00
+T2610 003:423.501 JLINK_WriteReg(R2, 0x200005C8)
+T2610 003:423.548 - 0.069ms returns 0x00
+T2610 003:423.600 JLINK_WriteReg(R3, 0x00000000)
+T2610 003:423.646 - 0.068ms returns 0x00
+T2610 003:423.698 JLINK_WriteReg(R4, 0x00000000)
+T2610 003:423.744 - 0.068ms returns 0x00
+T2610 003:423.796 JLINK_WriteReg(R5, 0x00000000)
+T2610 003:423.842 - 0.069ms returns 0x00
+T2610 003:423.894 JLINK_WriteReg(R6, 0x00000000)
+T2610 003:423.940 - 0.068ms returns 0x00
+T2610 003:424.009 JLINK_WriteReg(R7, 0x00000000)
+T2610 003:424.056 - 0.070ms returns 0x00
+T2610 003:424.108 JLINK_WriteReg(R8, 0x00000000)
+T2610 003:424.155 - 0.069ms returns 0x00
+T2610 003:424.207 JLINK_WriteReg(R9, 0x200005B4)
+T2610 003:424.253 - 0.069ms returns 0x00
+T2610 003:424.306 JLINK_WriteReg(R10, 0x00000000)
+T2610 003:424.353 - 0.070ms returns 0x00
+T2610 003:424.406 JLINK_WriteReg(R11, 0x00000000)
+T2610 003:424.452 - 0.069ms returns 0x00
+T2610 003:424.505 JLINK_WriteReg(R12, 0x00000000)
+T2610 003:424.551 - 0.068ms returns 0x00
+T2610 003:424.603 JLINK_WriteReg(R13 (SP), 0x20002000)
+T2610 003:424.652 - 0.071ms returns 0x00
+T2610 003:424.704 JLINK_WriteReg(R14, 0x20000001)
+T2610 003:424.750 - 0.068ms returns 0x00
+T2610 003:424.802 JLINK_WriteReg(R15 (PC), 0x20000060)
+T2610 003:424.849 - 0.069ms returns 0x00
+T2610 003:424.901 JLINK_WriteReg(XPSR, 0x01000000)
+T2610 003:424.947 - 0.081ms returns 0x00
+T2610 003:425.012 JLINK_WriteReg(MSP, 0x20002000)
+T2610 003:425.061 - 0.071ms returns 0x00
+T2610 003:425.113 JLINK_WriteReg(PSP, 0x20002000)
+T2610 003:425.159 - 0.069ms returns 0x00
+T2610 003:425.211 JLINK_WriteReg(CFBP, 0x00000000)
+T2610 003:425.257 - 0.068ms returns 0x00
+T2610 003:425.312   JLINK_SetBPEx(Addr = 0x20000000, Type = 0xFFFFFFF2)
+T2610 003:425.383 - 0.096ms returns 0x00000032
+T2610 003:425.437 JLINK_Go()
+T2610 003:425.511   CPU_ReadMem(4 bytes @ 0xE0001000)
+T2610 003:431.226 - 5.862ms
+T2610 003:431.344 JLINK_IsHalted()
+T2610 003:436.334   CPU_ReadMem(2 bytes @ 0x20000000)
+T2610 003:437.052 - 5.759ms returns TRUE
+T2610 003:437.146 JLINK_ReadReg(R15 (PC))
+T2610 003:437.205 - 0.082ms returns 0x20000000
+T2610 003:437.260 JLINK_ClrBPEx(BPHandle = 0x00000032)
+T2610 003:437.308 - 0.071ms returns 0x00
+T2610 003:437.362 JLINK_ReadReg(R0)
+T2610 003:437.409 - 0.069ms returns 0x00000000
+T2610 003:523.091 JLINK_WriteMemEx(0x20000000, 0x0002 Bytes, ..., Flags = 0x02000000)
+T2610 003:523.192   Data:  FE E7
+T2610 003:523.300   CPU_WriteMem(2 bytes @ 0x20000000)
+T2610 003:524.122 - 1.101ms returns 0x02
+T2610 003:524.262 JLINK_SetResetType(JLINKARM_CM3_RESET_TYPE_NORMAL)
+T2610 003:524.315 - 0.078ms returns JLINKARM_CM3_RESET_TYPE_NORMAL
+T2610 003:524.371 JLINK_Reset()
+T2610 003:524.445   CPU_WriteMem(4 bytes @ 0xE000EDF0)
+T2610 003:525.335   CPU_WriteMem(4 bytes @ 0xE000EDFC)
+T2610 003:552.841   Reset: Halt core after reset via DEMCR.VC_CORERESET.
+T2610 003:572.739   Reset: Reset device via AIRCR.SYSRESETREQ.
+T2610 003:572.833   CPU_WriteMem(4 bytes @ 0xE000ED0C)
+T2610 003:627.306   CPU_ReadMem(4 bytes @ 0xE000EDF0)
+T2610 003:628.004   CPU_ReadMem(4 bytes @ 0xE000EDF0)
+T2610 003:628.819   CPU_WriteMem(4 bytes @ 0xE000EDF0)
+T2610 003:629.536   CPU_WriteMem(4 bytes @ 0xE000EDFC)
+T2610 003:635.558   CPU_ReadMem(4 bytes @ 0xE000EDF0)
+T2610 003:641.348   CPU_WriteMem(4 bytes @ 0xE0002000)
+T2610 003:642.008   CPU_ReadMem(4 bytes @ 0xE000EDFC)
+T2610 003:642.614   CPU_ReadMem(4 bytes @ 0xE0001000)
+T2610 003:643.212 - 118.871ms
+T2610 003:643.273 JLINK_Go()
+T2610 003:643.321   CPU_ReadMem(4 bytes @ 0xE0001000)
+T2610 003:643.913   CPU_WriteMem(4 bytes @ 0xE0002008)
+T2610 003:643.971   CPU_WriteMem(4 bytes @ 0xE000200C)
+T2610 003:644.011   CPU_WriteMem(4 bytes @ 0xE0002010)
+T2610 003:644.049   CPU_WriteMem(4 bytes @ 0xE0002014)
+T2610 003:644.087   CPU_WriteMem(4 bytes @ 0xE0002018)
+T2610 003:644.125   CPU_WriteMem(4 bytes @ 0xE000201C)
+T2610 003:646.776   CPU_WriteMem(4 bytes @ 0xE0001004)
+T2610 003:648.111 - 4.867ms
+T2610 003:709.348 JLINK_Close()
+T2610 003:710.024   CPU is running
+T2610 003:710.069   CPU_WriteMem(4 bytes @ 0xE0002008)
+T2610 003:710.623   CPU is running
+T2610 003:710.656   CPU_WriteMem(4 bytes @ 0xE000200C)
+T2610 003:711.181   CPU is running
+T2610 003:711.214   CPU_WriteMem(4 bytes @ 0xE0002010)
+T2610 003:711.769   CPU is running
+T2610 003:711.802   CPU_WriteMem(4 bytes @ 0xE0002014)
+T2610 003:712.333   CPU is running
+T2610 003:712.371   CPU_WriteMem(4 bytes @ 0xE0002018)
+T2610 003:712.883   CPU is running
+T2610 003:712.918   CPU_WriteMem(4 bytes @ 0xE000201C)
+T2610 003:720.058 - 10.735ms
+T2610 003:720.093   
+T2610 003:720.109   Closed

smart_shoes/nRF5_SDK_17.0.0_9d13099/examples/Shoes_just_traj_20201208/ble_app_uart_03_link_PC/pca10040/s132/arm5_no_packs/JLinkSettings.ini

@@ -0,0 +1,39 @@
+[BREAKPOINTS]
+ForceImpTypeAny = 0
+ShowInfoWin = 1
+EnableFlashBP = 2
+BPDuringExecution = 0
+[CFI]
+CFISize = 0x00
+CFIAddr = 0x00
+[CPU]
+MonModeVTableAddr = 0xFFFFFFFF
+MonModeDebug = 0
+MaxNumAPs = 0
+LowPowerHandlingMode = 0
+OverrideMemMap = 0
+AllowSimulation = 1
+ScriptFile=""
+[FLASH]
+CacheExcludeSize = 0x00
+CacheExcludeAddr = 0x00
+MinNumBytesFlashDL = 0
+SkipProgOnCRCMatch = 1
+VerifyDownload = 1
+AllowCaching = 1
+EnableFlashDL = 2
+Override = 0
+Device="ARM7"
+[GENERAL]
+WorkRAMSize = 0x00
+WorkRAMAddr = 0x00
+RAMUsageLimit = 0x00
+[SWO]
+SWOLogFile=""
+[MEM]
+RdOverrideOrMask = 0x00
+RdOverrideAndMask = 0xFFFFFFFF
+RdOverrideAddr = 0xFFFFFFFF
+WrOverrideOrMask = 0x00
+WrOverrideAndMask = 0xFFFFFFFF
+WrOverrideAddr = 0xFFFFFFFF

smart_shoes/nRF5_SDK_17.0.0_9d13099/examples/Shoes_just_traj_20201208/ble_app_uart_03_link_PC/pca10040/s132/arm5_no_packs/RTE/Device/nRF52832_xxAA/arm_startup_nrf52.s

@@ -0,0 +1,371 @@
+; Copyright (c) 2009-2020 ARM Limited. All rights reserved.
+; 
+;     SPDX-License-Identifier: Apache-2.0
+; 
+; Licensed under the Apache License, Version 2.0 (the License); you may
+; not use this file except in compliance with the License.
+; You may obtain a copy of the License at
+; 
+;     www.apache.org/licenses/LICENSE-2.0
+; 
+; Unless required by applicable law or agreed to in writing, software
+; distributed under the License is distributed on an AS IS BASIS, WITHOUT
+; WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+; See the License for the specific language governing permissions and
+; limitations under the License.
+; 
+; NOTICE: This file has been modified by Nordic Semiconductor ASA.
+
+                IF :DEF: __STARTUP_CONFIG
+#ifdef  __STARTUP_CONFIG
+#include "startup_config.h"
+#ifndef __STARTUP_CONFIG_STACK_ALIGNEMENT
+#define __STARTUP_CONFIG_STACK_ALIGNEMENT 3
+#endif
+#endif
+                ENDIF
+
+                IF :DEF: __STARTUP_CONFIG
+Stack_Size      EQU __STARTUP_CONFIG_STACK_SIZE
+                ELIF :DEF: __STACK_SIZE
+Stack_Size      EQU __STACK_SIZE
+                ELSE
+Stack_Size      EQU 4096
+                ENDIF
+                
+                IF :DEF: __STARTUP_CONFIG
+Stack_Align     EQU __STARTUP_CONFIG_STACK_ALIGNEMENT
+                ELSE
+Stack_Align     EQU 3
+                ENDIF
+
+                AREA    STACK, NOINIT, READWRITE, ALIGN=Stack_Align
+Stack_Mem       SPACE   Stack_Size
+__initial_sp
+
+                IF :DEF: __STARTUP_CONFIG
+Heap_Size       EQU __STARTUP_CONFIG_HEAP_SIZE
+                ELIF :DEF: __HEAP_SIZE
+Heap_Size       EQU __HEAP_SIZE
+                ELSE
+Heap_Size       EQU 4096
+                ENDIF
+
+                AREA    HEAP, NOINIT, READWRITE, ALIGN=3
+__heap_base
+Heap_Mem        SPACE   Heap_Size
+__heap_limit
+
+                PRESERVE8
+                THUMB
+
+; Vector Table Mapped to Address 0 at Reset
+
+                AREA    RESET, DATA, READONLY
+                EXPORT  __Vectors
+                EXPORT  __Vectors_End
+                EXPORT  __Vectors_Size
+
+__Vectors       DCD     __initial_sp              ; Top of Stack
+                DCD     Reset_Handler
+                DCD     NMI_Handler
+                DCD     HardFault_Handler
+                DCD     MemoryManagement_Handler
+                DCD     BusFault_Handler
+                DCD     UsageFault_Handler
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     SVC_Handler
+                DCD     DebugMon_Handler
+                DCD     0                         ; Reserved
+                DCD     PendSV_Handler
+                DCD     SysTick_Handler
+
+                ; External Interrupts
+                DCD     POWER_CLOCK_IRQHandler
+                DCD     RADIO_IRQHandler
+                DCD     UARTE0_UART0_IRQHandler
+                DCD     SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler
+                DCD     SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler
+                DCD     NFCT_IRQHandler
+                DCD     GPIOTE_IRQHandler
+                DCD     SAADC_IRQHandler
+                DCD     TIMER0_IRQHandler
+                DCD     TIMER1_IRQHandler
+                DCD     TIMER2_IRQHandler
+                DCD     RTC0_IRQHandler
+                DCD     TEMP_IRQHandler
+                DCD     RNG_IRQHandler
+                DCD     ECB_IRQHandler
+                DCD     CCM_AAR_IRQHandler
+                DCD     WDT_IRQHandler
+                DCD     RTC1_IRQHandler
+                DCD     QDEC_IRQHandler
+                DCD     COMP_LPCOMP_IRQHandler
+                DCD     SWI0_EGU0_IRQHandler
+                DCD     SWI1_EGU1_IRQHandler
+                DCD     SWI2_EGU2_IRQHandler
+                DCD     SWI3_EGU3_IRQHandler
+                DCD     SWI4_EGU4_IRQHandler
+                DCD     SWI5_EGU5_IRQHandler
+                DCD     TIMER3_IRQHandler
+                DCD     TIMER4_IRQHandler
+                DCD     PWM0_IRQHandler
+                DCD     PDM_IRQHandler
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     MWU_IRQHandler
+                DCD     PWM1_IRQHandler
+                DCD     PWM2_IRQHandler
+                DCD     SPIM2_SPIS2_SPI2_IRQHandler
+                DCD     RTC2_IRQHandler
+                DCD     I2S_IRQHandler
+                DCD     FPU_IRQHandler
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+                DCD     0                         ; Reserved
+
+__Vectors_End
+
+__Vectors_Size  EQU     __Vectors_End - __Vectors
+
+                AREA    |.text|, CODE, READONLY
+
+; Reset Handler
+
+
+Reset_Handler   PROC
+                EXPORT  Reset_Handler             [WEAK]
+                IMPORT  SystemInit
+                IMPORT  __main
+
+
+                LDR     R0, =SystemInit
+                BLX     R0
+                LDR     R0, =__main
+                BX      R0
+                ENDP
+
+; Dummy Exception Handlers (infinite loops which can be modified)
+
+NMI_Handler     PROC
+                EXPORT  NMI_Handler               [WEAK]
+                B       .
+                ENDP
+HardFault_Handler\
+                PROC
+                EXPORT  HardFault_Handler         [WEAK]
+                B       .
+                ENDP
+MemoryManagement_Handler\
+                PROC
+                EXPORT  MemoryManagement_Handler  [WEAK]
+                B       .
+                ENDP
+BusFault_Handler\
+                PROC
+                EXPORT  BusFault_Handler          [WEAK]
+                B       .
+                ENDP
+UsageFault_Handler\
+                PROC
+                EXPORT  UsageFault_Handler        [WEAK]
+                B       .
+                ENDP
+SVC_Handler     PROC
+                EXPORT  SVC_Handler               [WEAK]
+                B       .
+                ENDP
+DebugMon_Handler\
+                PROC
+                EXPORT  DebugMon_Handler          [WEAK]
+                B       .
+                ENDP
+PendSV_Handler  PROC
+                EXPORT  PendSV_Handler            [WEAK]
+                B       .
+                ENDP
+SysTick_Handler PROC
+                EXPORT  SysTick_Handler           [WEAK]
+                B       .
+                ENDP
+
+Default_Handler PROC
+
+                EXPORT   POWER_CLOCK_IRQHandler [WEAK]
+                EXPORT   RADIO_IRQHandler [WEAK]
+                EXPORT   UARTE0_UART0_IRQHandler [WEAK]
+                EXPORT   SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler [WEAK]
+                EXPORT   SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler [WEAK]
+                EXPORT   NFCT_IRQHandler [WEAK]
+                EXPORT   GPIOTE_IRQHandler [WEAK]
+                EXPORT   SAADC_IRQHandler [WEAK]
+                EXPORT   TIMER0_IRQHandler [WEAK]
+                EXPORT   TIMER1_IRQHandler [WEAK]
+                EXPORT   TIMER2_IRQHandler [WEAK]
+                EXPORT   RTC0_IRQHandler [WEAK]
+                EXPORT   TEMP_IRQHandler [WEAK]
+                EXPORT   RNG_IRQHandler [WEAK]
+                EXPORT   ECB_IRQHandler [WEAK]
+                EXPORT   CCM_AAR_IRQHandler [WEAK]
+                EXPORT   WDT_IRQHandler [WEAK]
+                EXPORT   RTC1_IRQHandler [WEAK]
+                EXPORT   QDEC_IRQHandler [WEAK]
+                EXPORT   COMP_LPCOMP_IRQHandler [WEAK]
+                EXPORT   SWI0_EGU0_IRQHandler [WEAK]
+                EXPORT   SWI1_EGU1_IRQHandler [WEAK]
+                EXPORT   SWI2_EGU2_IRQHandler [WEAK]
+                EXPORT   SWI3_EGU3_IRQHandler [WEAK]
+                EXPORT   SWI4_EGU4_IRQHandler [WEAK]
+                EXPORT   SWI5_EGU5_IRQHandler [WEAK]
+                EXPORT   TIMER3_IRQHandler [WEAK]
+                EXPORT   TIMER4_IRQHandler [WEAK]
+                EXPORT   PWM0_IRQHandler [WEAK]
+                EXPORT   PDM_IRQHandler [WEAK]
+                EXPORT   MWU_IRQHandler [WEAK]
+                EXPORT   PWM1_IRQHandler [WEAK]
+                EXPORT   PWM2_IRQHandler [WEAK]
+                EXPORT   SPIM2_SPIS2_SPI2_IRQHandler [WEAK]
+                EXPORT   RTC2_IRQHandler [WEAK]
+                EXPORT   I2S_IRQHandler [WEAK]
+                EXPORT   FPU_IRQHandler [WEAK]
+POWER_CLOCK_IRQHandler
+RADIO_IRQHandler
+UARTE0_UART0_IRQHandler
+SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler
+SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler
+NFCT_IRQHandler
+GPIOTE_IRQHandler
+SAADC_IRQHandler
+TIMER0_IRQHandler
+TIMER1_IRQHandler
+TIMER2_IRQHandler
+RTC0_IRQHandler
+TEMP_IRQHandler
+RNG_IRQHandler
+ECB_IRQHandler
+CCM_AAR_IRQHandler
+WDT_IRQHandler
+RTC1_IRQHandler
+QDEC_IRQHandler
+COMP_LPCOMP_IRQHandler
+SWI0_EGU0_IRQHandler
+SWI1_EGU1_IRQHandler
+SWI2_EGU2_IRQHandler
+SWI3_EGU3_IRQHandler
+SWI4_EGU4_IRQHandler
+SWI5_EGU5_IRQHandler
+TIMER3_IRQHandler
+TIMER4_IRQHandler
+PWM0_IRQHandler
+PDM_IRQHandler
+MWU_IRQHandler
+PWM1_IRQHandler
+PWM2_IRQHandler
+SPIM2_SPIS2_SPI2_IRQHandler
+RTC2_IRQHandler
+I2S_IRQHandler
+FPU_IRQHandler
+                B .
+                ENDP
+                ALIGN
+
+; User Initial Stack & Heap
+
+                IF      :DEF:__MICROLIB
+
+                EXPORT  __initial_sp
+                EXPORT  __heap_base
+                EXPORT  __heap_limit
+
+                ELSE
+
+                IMPORT  __use_two_region_memory
+                EXPORT  __user_initial_stackheap
+
+__user_initial_stackheap PROC
+
+                LDR     R0, = Heap_Mem
+                LDR     R1, = (Stack_Mem + Stack_Size)
+                LDR     R2, = (Heap_Mem + Heap_Size)
+                LDR     R3, = Stack_Mem
+                BX      LR
+                ENDP
+
+                ALIGN
+
+                ENDIF
+
+                END

smart_shoes/nRF5_SDK_17.0.0_9d13099/examples/Shoes_just_traj_20201208/ble_app_uart_03_link_PC/pca10040/s132/arm5_no_packs/RTE/Device/nRF52832_xxAA/system_nrf52.c

@@ -0,0 +1,207 @@
+/*
+
+Copyright (c) 2009-2020 ARM Limited. All rights reserved.
+
+    SPDX-License-Identifier: Apache-2.0
+
+Licensed under the Apache License, Version 2.0 (the License); you may
+not use this file except in compliance with the License.
+You may obtain a copy of the License at
+
+    www.apache.org/licenses/LICENSE-2.0
+
+Unless required by applicable law or agreed to in writing, software
+distributed under the License is distributed on an AS IS BASIS, WITHOUT
+WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+See the License for the specific language governing permissions and
+limitations under the License.
+
+NOTICE: This file has been modified by Nordic Semiconductor ASA.
+
+*/
+
+/* NOTE: Template files (including this one) are application specific and therefore expected to
+   be copied into the application project folder prior to its use! */
+
+#include <stdint.h>
+#include <stdbool.h>
+#include "nrf.h"
+#include "nrf_erratas.h"
+#include "system_nrf52.h"
+
+/*lint ++flb "Enter library region" */
+
+#define __SYSTEM_CLOCK_64M      (64000000UL)
+
+
+#if defined ( __CC_ARM )
+    uint32_t SystemCoreClock __attribute__((used)) = __SYSTEM_CLOCK_64M;
+#elif defined ( __ICCARM__ )
+    __root uint32_t SystemCoreClock = __SYSTEM_CLOCK_64M;
+#elif defined ( __GNUC__ )
+    uint32_t SystemCoreClock __attribute__((used)) = __SYSTEM_CLOCK_64M;
+#endif
+
+void SystemCoreClockUpdate(void)
+{
+    SystemCoreClock = __SYSTEM_CLOCK_64M;
+}
+
+void SystemInit(void)
+{
+    /* Enable SWO trace functionality. If ENABLE_SWO is not defined, SWO pin will be used as GPIO (see Product
+       Specification to see which one). */
+    #if defined (ENABLE_SWO)
+        CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk;
+        NRF_CLOCK->TRACECONFIG |= CLOCK_TRACECONFIG_TRACEMUX_Serial << CLOCK_TRACECONFIG_TRACEMUX_Pos;
+        NRF_P0->PIN_CNF[18] = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
+    #endif
+
+    /* Enable Trace functionality. If ENABLE_TRACE is not defined, TRACE pins will be used as GPIOs (see Product
+       Specification to see which ones). */
+    #if defined (ENABLE_TRACE)
+        CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk;
+        NRF_CLOCK->TRACECONFIG |= CLOCK_TRACECONFIG_TRACEMUX_Parallel << CLOCK_TRACECONFIG_TRACEMUX_Pos;
+        NRF_P0->PIN_CNF[14] = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
+        NRF_P0->PIN_CNF[15] = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
+        NRF_P0->PIN_CNF[16] = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
+        NRF_P0->PIN_CNF[18] = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
+        NRF_P0->PIN_CNF[20] = (GPIO_PIN_CNF_DRIVE_H0H1 << GPIO_PIN_CNF_DRIVE_Pos) | (GPIO_PIN_CNF_INPUT_Connect << GPIO_PIN_CNF_INPUT_Pos) | (GPIO_PIN_CNF_DIR_Output << GPIO_PIN_CNF_DIR_Pos);
+    #endif
+    
+    /* Workaround for Errata 12 "COMP: Reference ladder not correctly calibrated" found at the Errata document
+       for your device located at https://infocenter.nordicsemi.com/index.jsp */
+    if (nrf52_errata_12()){
+        *(volatile uint32_t *)0x40013540 = (*(uint32_t *)0x10000324 & 0x00001F00) >> 8;
+    }
+    
+    /* Workaround for Errata 16 "System: RAM may be corrupt on wakeup from CPU IDLE" found at the Errata document
+       for your device located at https://infocenter.nordicsemi.com/index.jsp */
+    if (nrf52_errata_16()){
+        *(volatile uint32_t *)0x4007C074 = 3131961357ul;
+    }
+
+    /* Workaround for Errata 31 "CLOCK: Calibration values are not correctly loaded from FICR at reset" found at the Errata document
+       for your device located at https://infocenter.nordicsemi.com/index.jsp */
+    if (nrf52_errata_31()){
+        *(volatile uint32_t *)0x4000053C = ((*(volatile uint32_t *)0x10000244) & 0x0000E000) >> 13;
+    }
+
+    /* Workaround for Errata 32 "DIF: Debug session automatically enables TracePort pins" found at the Errata document
+       for your device located at https://infocenter.nordicsemi.com/index.jsp */
+    if (nrf52_errata_32()){
+        CoreDebug->DEMCR &= ~CoreDebug_DEMCR_TRCENA_Msk;
+    }
+
+    /* Workaround for Errata 36 "CLOCK: Some registers are not reset when expected" found at the Errata document
+       for your device located at https://infocenter.nordicsemi.com/index.jsp  */
+    if (nrf52_errata_36()){
+        NRF_CLOCK->EVENTS_DONE = 0;
+        NRF_CLOCK->EVENTS_CTTO = 0;
+        NRF_CLOCK->CTIV = 0;
+    }
+
+    /* Workaround for Errata 37 "RADIO: Encryption engine is slow by default" found at the Errata document
+       for your device located at https://infocenter.nordicsemi.com/index.jsp  */
+    if (nrf52_errata_37()){
+        *(volatile uint32_t *)0x400005A0 = 0x3;
+    }
+
+    /* Workaround for Errata 57 "NFCT: NFC Modulation amplitude" found at the Errata document
+       for your device located at https://infocenter.nordicsemi.com/index.jsp  */
+    if (nrf52_errata_57()){
+        *(volatile uint32_t *)0x40005610 = 0x00000005;
+        *(volatile uint32_t *)0x40005688 = 0x00000001;
+        *(volatile uint32_t *)0x40005618 = 0x00000000;
+        *(volatile uint32_t *)0x40005614 = 0x0000003F;
+    }
+
+    /* Workaround for Errata 66 "TEMP: Linearity specification not met with default settings" found at the Errata document
+       for your device located at https://infocenter.nordicsemi.com/index.jsp  */
+    if (nrf52_errata_66()){
+        NRF_TEMP->A0 = NRF_FICR->TEMP.A0;
+        NRF_TEMP->A1 = NRF_FICR->TEMP.A1;
+        NRF_TEMP->A2 = NRF_FICR->TEMP.A2;
+        NRF_TEMP->A3 = NRF_FICR->TEMP.A3;
+        NRF_TEMP->A4 = NRF_FICR->TEMP.A4;
+        NRF_TEMP->A5 = NRF_FICR->TEMP.A5;
+        NRF_TEMP->B0 = NRF_FICR->TEMP.B0;
+        NRF_TEMP->B1 = NRF_FICR->TEMP.B1;
+        NRF_TEMP->B2 = NRF_FICR->TEMP.B2;
+        NRF_TEMP->B3 = NRF_FICR->TEMP.B3;
+        NRF_TEMP->B4 = NRF_FICR->TEMP.B4;
+        NRF_TEMP->B5 = NRF_FICR->TEMP.B5;
+        NRF_TEMP->T0 = NRF_FICR->TEMP.T0;
+        NRF_TEMP->T1 = NRF_FICR->TEMP.T1;
+        NRF_TEMP->T2 = NRF_FICR->TEMP.T2;
+        NRF_TEMP->T3 = NRF_FICR->TEMP.T3;
+        NRF_TEMP->T4 = NRF_FICR->TEMP.T4;
+    }
+
+    /* Workaround for Errata 108 "RAM: RAM content cannot be trusted upon waking up from System ON Idle or System OFF mode" found at the Errata document
+       for your device located at https://infocenter.nordicsemi.com/index.jsp  */
+    if (nrf52_errata_108()){
+        *(volatile uint32_t *)0x40000EE4ul = *(volatile uint32_t *)0x10000258ul & 0x0000004Ful;
+    }
+    
+    /* Workaround for Errata 136 "System: Bits in RESETREAS are set when they should not be" found at the Errata document
+       for your device located at https://infocenter.nordicsemi.com/index.jsp  */
+    if (nrf52_errata_136()){
+        if (NRF_POWER->RESETREAS & POWER_RESETREAS_RESETPIN_Msk){
+            NRF_POWER->RESETREAS =  ~POWER_RESETREAS_RESETPIN_Msk;
+        }
+    }
+    
+    /* Workaround for Errata 182 "RADIO: Fixes for anomalies #102, #106, and #107 do not take effect" found at the Errata document
+       for your device located at https://infocenter.nordicsemi.com/index.jsp  */
+    if (nrf52_errata_182()){
+        *(volatile uint32_t *) 0x4000173C |= (0x1 << 10);
+    }
+    
+    /* Enable the FPU if the compiler used floating point unit instructions. __FPU_USED is a MACRO defined by the
+     * compiler. Since the FPU consumes energy, remember to disable FPU use in the compiler if floating point unit
+     * operations are not used in your code. */
+    #if (__FPU_USED == 1)
+        SCB->CPACR |= (3UL << 20) | (3UL << 22);
+        __DSB();
+        __ISB();
+    #endif
+
+    /* Configure NFCT pins as GPIOs if NFCT is not to be used in your code. If CONFIG_NFCT_PINS_AS_GPIOS is not defined,
+       two GPIOs (see Product Specification to see which ones) will be reserved for NFC and will not be available as
+       normal GPIOs. */
+    #if defined (CONFIG_NFCT_PINS_AS_GPIOS)
+        if ((NRF_UICR->NFCPINS & UICR_NFCPINS_PROTECT_Msk) == (UICR_NFCPINS_PROTECT_NFC << UICR_NFCPINS_PROTECT_Pos)){
+            NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Wen << NVMC_CONFIG_WEN_Pos;
+            while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
+            NRF_UICR->NFCPINS &= ~UICR_NFCPINS_PROTECT_Msk;
+            while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
+            NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Ren << NVMC_CONFIG_WEN_Pos;
+            while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
+            NVIC_SystemReset();
+        }
+    #endif
+
+    /* Configure GPIO pads as pPin Reset pin if Pin Reset capabilities desired. If CONFIG_GPIO_AS_PINRESET is not
+      defined, pin reset will not be available. One GPIO (see Product Specification to see which one) will then be
+      reserved for PinReset and not available as normal GPIO. */
+    #if defined (CONFIG_GPIO_AS_PINRESET)
+        if (((NRF_UICR->PSELRESET[0] & UICR_PSELRESET_CONNECT_Msk) != (UICR_PSELRESET_CONNECT_Connected << UICR_PSELRESET_CONNECT_Pos)) ||
+            ((NRF_UICR->PSELRESET[1] & UICR_PSELRESET_CONNECT_Msk) != (UICR_PSELRESET_CONNECT_Connected << UICR_PSELRESET_CONNECT_Pos))){
+            NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Wen << NVMC_CONFIG_WEN_Pos;
+            while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
+            NRF_UICR->PSELRESET[0] = 21;
+            while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
+            NRF_UICR->PSELRESET[1] = 21;
+            while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
+            NRF_NVMC->CONFIG = NVMC_CONFIG_WEN_Ren << NVMC_CONFIG_WEN_Pos;
+            while (NRF_NVMC->READY == NVMC_READY_READY_Busy){}
+            NVIC_SystemReset();
+        }
+    #endif
+
+    SystemCoreClockUpdate();
+}
+
+
+/*lint --flb "Leave library region" */

smart_shoes/nRF5_SDK_17.0.0_9d13099/examples/Shoes_just_traj_20201208/ble_app_uart_03_link_PC/pca10040/s132/arm5_no_packs/RTE/_flash_s132_nrf52_7.0.1_softdevice/RTE_Components.h

@@ -0,0 +1,21 @@
+
+/*
+ * Auto generated Run-Time-Environment Configuration File
+ *      *** Do not modify ! ***
+ *
+ * Project: 'ble_app_uart_pca10040_s132' 
+ * Target:  'flash_s132_nrf52_7.0.1_softdevice' 
+ */
+
+#ifndef RTE_COMPONENTS_H
+#define RTE_COMPONENTS_H
+
+
+/*
+ * Define the Device Header File: 
+ */
+#define CMSIS_device_header "nrf.h"
+
+
+
+#endif /* RTE_COMPONENTS_H */

smart_shoes/nRF5_SDK_17.0.0_9d13099/examples/Shoes_just_traj_20201208/ble_app_uart_03_link_PC/pca10040/s132/arm5_no_packs/RTE/_nrf52832_xxaa/RTE_Components.h

@@ -0,0 +1,21 @@
+
+/*
+ * Auto generated Run-Time-Environment Configuration File
+ *      *** Do not modify ! ***
+ *
+ * Project: 'ble_app_uart_pca10040_s132' 
+ * Target:  'nrf52832_xxaa' 
+ */
+
+#ifndef RTE_COMPONENTS_H
+#define RTE_COMPONENTS_H
+
+
+/*
+ * Define the Device Header File: 
+ */
+#define CMSIS_device_header "nrf.h"
+
+
+
+#endif /* RTE_COMPONENTS_H */

smart_shoes/nRF5_SDK_17.0.0_9d13099/examples/Shoes_just_traj_20201208/ble_app_uart_03_link_PC/pca10040/s132/arm5_no_packs/_build/ExtDll.iex

@@ -0,0 +1,2 @@
+[EXTDLL]
+Count=0

smart_shoes/nRF5_SDK_17.0.0_9d13099/examples/Shoes_just_traj_20201208/ble_app_uart_03_link_PC/pca10040/s132/arm5_no_packs/_build/app.d

@@ -0,0 +1,77 @@
+.\_build\app.o: ..\..\..\app.c
+.\_build\app.o: ..\..\..\app.h
+.\_build\app.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdint.h
+.\_build\app.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\string.h
+.\_build\app.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdbool.h
+.\_build\app.o: ..\..\..\main.h
+.\_build\app.o: ..\..\..\..\..\..\components\libraries\delay\nrf_delay.h
+.\_build\app.o: ..\..\..\..\..\..\modules\nrfx\nrfx.h
+.\_build\app.o: ..\..\..\..\..\..\integration\nrfx\nrfx_config.h
+.\_build\app.o: ..\config\sdk_config.h
+.\_build\app.o: ..\..\..\..\..\..\modules\nrfx\drivers/nrfx_common.h
+.\_build\app.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stddef.h
+.\_build\app.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf.h
+.\_build\app.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf52.h
+.\_build\app.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\core_cm4.h
+.\_build\app.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\cmsis_version.h
+.\_build\app.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\cmsis_compiler.h
+.\_build\app.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\cmsis_armcc.h
+.\_build\app.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\mpu_armv7.h
+.\_build\app.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\system_nrf52.h
+.\_build\app.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf52_bitfields.h
+.\_build\app.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf51_to_nrf52.h
+.\_build\app.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf52_name_change.h
+.\_build\app.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\compiler_abstraction.h
+.\_build\app.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf_peripherals.h
+.\_build\app.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf52832_peripherals.h
+.\_build\app.o: ..\..\..\..\..\..\integration\nrfx\nrfx_glue.h
+.\_build\app.o: ..\..\..\..\..\..\integration\nrfx\legacy/apply_old_config.h
+.\_build\app.o: ..\..\..\..\..\..\modules\nrfx\soc/nrfx_irqs.h
+.\_build\app.o: ..\..\..\..\..\..\modules\nrfx\soc/nrfx_irqs_nrf52832.h
+.\_build\app.o: ..\..\..\..\..\..\components\libraries\util\nrf_assert.h
+.\_build\app.o: ..\..\..\..\..\..\components\libraries\util\app_util.h
+.\_build\app.o: ..\..\..\..\..\..\components\libraries\util\nordic_common.h
+.\_build\app.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf52\nrf_mbr.h
+.\_build\app.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf_svc.h
+.\_build\app.o: ..\..\..\..\..\..\components\libraries\util\app_util_platform.h
+.\_build\app.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf_soc.h
+.\_build\app.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf_error.h
+.\_build\app.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf_error_soc.h
+.\_build\app.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf_nvic.h
+.\_build\app.o: ..\..\..\..\..\..\components\libraries\util\app_error.h
+.\_build\app.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdio.h
+.\_build\app.o: ..\..\..\..\..\..\components\libraries\util\sdk_errors.h
+.\_build\app.o: ..\..\..\..\..\..\components\libraries\util\app_error_weak.h
+.\_build\app.o: ..\..\..\..\..\..\modules\nrfx\soc/nrfx_coredep.h
+.\_build\app.o: ..\..\..\..\..\..\modules\nrfx\soc/nrfx_atomic.h
+.\_build\app.o: ..\..\..\..\..\..\modules\nrfx\nrfx.h
+.\_build\app.o: ..\..\..\..\..\..\components\libraries\util\sdk_resources.h
+.\_build\app.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf_sd_def.h
+.\_build\app.o: ..\..\..\..\..\..\modules\nrfx\drivers/nrfx_errors.h
+.\_build\app.o: ..\..\..\..\..\..\components\drivers_nrf\twi_master\deprecated\twi_master.h
+.\_build\app.o: ..\..\..\..\..\..\user\protocol.h
+.\_build\app.o: ..\..\..\..\..\..\components\libraries\fstorage\nrf_fstorage.h
+.\_build\app.o: ..\..\..\..\..\..\components\libraries\experimental_section_vars\nrf_section.h
+.\_build\app.o: ..\..\..\..\..\..\components\libraries\log\nrf_log.h
+.\_build\app.o: ..\..\..\..\..\..\components\libraries\util\sdk_common.h
+.\_build\app.o: ..\..\..\..\..\..\components\libraries\util\sdk_os.h
+.\_build\app.o: ..\..\..\..\..\..\components\libraries\util\sdk_macros.h
+.\_build\app.o: ..\..\..\..\..\..\components\libraries\strerror\nrf_strerror.h
+.\_build\app.o: ..\..\..\..\..\..\components\libraries\log\src\nrf_log_internal.h
+.\_build\app.o: ..\..\..\..\..\..\components\libraries\log\nrf_log_instance.h
+.\_build\app.o: ..\..\..\..\..\..\components\libraries\log\nrf_log_types.h
+.\_build\app.o: ..\..\..\..\..\..\components\libraries\log\nrf_log_ctrl.h
+.\_build\app.o: ..\..\..\..\..\..\components\libraries\log\src\nrf_log_ctrl_internal.h
+.\_build\app.o: ..\..\..\..\..\..\components\libraries\log\nrf_log_backend_interface.h
+.\_build\app.o: ..\..\..\..\..\..\components\libraries\memobj\nrf_memobj.h
+.\_build\app.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdlib.h
+.\_build\app.o: ..\..\..\..\..\..\components\libraries\balloc\nrf_balloc.h
+.\_build\app.o: ..\..\..\..\..\..\components\libraries\log\nrf_log_default_backends.h
+.\_build\app.o: ..\..\..\..\..\..\components\libraries\fds\fds.h
+.\_build\app.o: ..\..\..\..\..\..\external\segger_rtt\SEGGER_RTT.h
+.\_build\app.o: ..\..\..\..\..\..\external\segger_rtt\SEGGER_RTT_Conf.h
+.\_build\app.o: ..\..\..\User_Sleep.h
+.\_build\app.o: ..\..\..\..\..\..\integration\nrfx\legacy\nrf_drv_gpiote.h
+.\_build\app.o: ..\..\..\..\..\..\modules\nrfx\drivers\include\nrfx_gpiote.h
+.\_build\app.o: ..\..\..\..\..\..\modules\nrfx\hal/nrf_gpiote.h
+.\_build\app.o: ..\..\..\..\..\..\modules\nrfx\hal/nrf_gpio.h

smart_shoes/nRF5_SDK_17.0.0_9d13099/examples/Shoes_just_traj_20201208/ble_app_uart_03_link_PC/pca10040/s132/arm5_no_packs/_build/app_button.d

@@ -0,0 +1,63 @@
+.\_build\app_button.o: ..\..\..\..\..\..\components\libraries\button\app_button.c
+.\_build\app_button.o: ..\..\..\..\..\..\components\libraries\util\sdk_common.h
+.\_build\app_button.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdint.h
+.\_build\app_button.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdbool.h
+.\_build\app_button.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\string.h
+.\_build\app_button.o: ..\config\sdk_config.h
+.\_build\app_button.o: ..\..\..\..\..\..\components\libraries\util\nordic_common.h
+.\_build\app_button.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\compiler_abstraction.h
+.\_build\app_button.o: ..\..\..\..\..\..\components\libraries\util\sdk_os.h
+.\_build\app_button.o: ..\..\..\..\..\..\components\libraries\util\sdk_errors.h
+.\_build\app_button.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf_error.h
+.\_build\app_button.o: ..\..\..\..\..\..\components\libraries\util\app_util.h
+.\_build\app_button.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stddef.h
+.\_build\app_button.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf.h
+.\_build\app_button.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf52.h
+.\_build\app_button.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\core_cm4.h
+.\_build\app_button.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\cmsis_version.h
+.\_build\app_button.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\cmsis_compiler.h
+.\_build\app_button.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\cmsis_armcc.h
+.\_build\app_button.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\mpu_armv7.h
+.\_build\app_button.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\system_nrf52.h
+.\_build\app_button.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf52_bitfields.h
+.\_build\app_button.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf51_to_nrf52.h
+.\_build\app_button.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf52_name_change.h
+.\_build\app_button.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf52\nrf_mbr.h
+.\_build\app_button.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf_svc.h
+.\_build\app_button.o: ..\..\..\..\..\..\components\libraries\util\sdk_macros.h
+.\_build\app_button.o: ..\..\..\..\..\..\components\libraries\util\nrf_assert.h
+.\_build\app_button.o: ..\..\..\..\..\..\components\libraries\button\app_button.h
+.\_build\app_button.o: ..\..\..\..\..\..\components\libraries\util\app_error.h
+.\_build\app_button.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdio.h
+.\_build\app_button.o: ..\..\..\..\..\..\components\libraries\util\app_error_weak.h
+.\_build\app_button.o: ..\..\..\..\..\..\modules\nrfx\hal\nrf_gpio.h
+.\_build\app_button.o: ..\..\..\..\..\..\modules\nrfx\nrfx.h
+.\_build\app_button.o: ..\..\..\..\..\..\integration\nrfx\nrfx_config.h
+.\_build\app_button.o: ..\..\..\..\..\..\modules\nrfx\drivers/nrfx_common.h
+.\_build\app_button.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf_peripherals.h
+.\_build\app_button.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf52832_peripherals.h
+.\_build\app_button.o: ..\..\..\..\..\..\integration\nrfx\nrfx_glue.h
+.\_build\app_button.o: ..\..\..\..\..\..\integration\nrfx\legacy/apply_old_config.h
+.\_build\app_button.o: ..\..\..\..\..\..\modules\nrfx\soc/nrfx_irqs.h
+.\_build\app_button.o: ..\..\..\..\..\..\modules\nrfx\soc/nrfx_irqs_nrf52832.h
+.\_build\app_button.o: ..\..\..\..\..\..\components\libraries\util\app_util_platform.h
+.\_build\app_button.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf_soc.h
+.\_build\app_button.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf_error_soc.h
+.\_build\app_button.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf_nvic.h
+.\_build\app_button.o: ..\..\..\..\..\..\modules\nrfx\soc/nrfx_coredep.h
+.\_build\app_button.o: ..\..\..\..\..\..\modules\nrfx\soc/nrfx_atomic.h
+.\_build\app_button.o: ..\..\..\..\..\..\modules\nrfx\nrfx.h
+.\_build\app_button.o: ..\..\..\..\..\..\components\libraries\util\sdk_resources.h
+.\_build\app_button.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf_sd_def.h
+.\_build\app_button.o: ..\..\..\..\..\..\modules\nrfx\drivers/nrfx_errors.h
+.\_build\app_button.o: ..\..\..\..\..\..\components\libraries\timer\app_timer.h
+.\_build\app_button.o: ..\..\..\..\..\..\components\libraries\log\nrf_log_instance.h
+.\_build\app_button.o: ..\..\..\..\..\..\components\libraries\experimental_section_vars\nrf_section.h
+.\_build\app_button.o: ..\..\..\..\..\..\components\libraries\log\nrf_log_types.h
+.\_build\app_button.o: ..\..\..\..\..\..\components\libraries\sortlist\nrf_sortlist.h
+.\_build\app_button.o: ..\..\..\..\..\..\integration\nrfx\legacy\nrf_drv_gpiote.h
+.\_build\app_button.o: ..\..\..\..\..\..\modules\nrfx\drivers\include\nrfx_gpiote.h
+.\_build\app_button.o: ..\..\..\..\..\..\modules\nrfx\hal/nrf_gpiote.h
+.\_build\app_button.o: ..\..\..\..\..\..\components\libraries\log\nrf_log.h
+.\_build\app_button.o: ..\..\..\..\..\..\components\libraries\strerror\nrf_strerror.h
+.\_build\app_button.o: ..\..\..\..\..\..\components\libraries\log\src\nrf_log_internal.h

smart_shoes/nRF5_SDK_17.0.0_9d13099/examples/Shoes_just_traj_20201208/ble_app_uart_03_link_PC/pca10040/s132/arm5_no_packs/_build/app_error.d

@@ -0,0 +1,21 @@
+.\_build\app_error.o: ..\..\..\..\..\..\components\libraries\util\app_error.c
+.\_build\app_error.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf.h
+.\_build\app_error.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf52.h
+.\_build\app_error.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\core_cm4.h
+.\_build\app_error.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdint.h
+.\_build\app_error.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\cmsis_version.h
+.\_build\app_error.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\cmsis_compiler.h
+.\_build\app_error.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\cmsis_armcc.h
+.\_build\app_error.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\mpu_armv7.h
+.\_build\app_error.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\system_nrf52.h
+.\_build\app_error.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf52_bitfields.h
+.\_build\app_error.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf51_to_nrf52.h
+.\_build\app_error.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf52_name_change.h
+.\_build\app_error.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\compiler_abstraction.h
+.\_build\app_error.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdio.h
+.\_build\app_error.o: ..\..\..\..\..\..\components\libraries\util\app_error.h
+.\_build\app_error.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdbool.h
+.\_build\app_error.o: ..\..\..\..\..\..\components\libraries\util\sdk_errors.h
+.\_build\app_error.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf_error.h
+.\_build\app_error.o: ..\..\..\..\..\..\components\libraries\util\nordic_common.h
+.\_build\app_error.o: ..\..\..\..\..\..\components\libraries\util\app_error_weak.h

smart_shoes/nRF5_SDK_17.0.0_9d13099/examples/Shoes_just_traj_20201208/ble_app_uart_03_link_PC/pca10040/s132/arm5_no_packs/_build/app_error_handler_keil.d

@@ -0,0 +1,31 @@
+.\_build\app_error_handler_keil.o: ..\..\..\..\..\..\components\libraries\util\app_error_handler_keil.c
+.\_build\app_error_handler_keil.o: ..\..\..\..\..\..\components\libraries\util\sdk_common.h
+.\_build\app_error_handler_keil.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdint.h
+.\_build\app_error_handler_keil.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdbool.h
+.\_build\app_error_handler_keil.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\string.h
+.\_build\app_error_handler_keil.o: ..\config\sdk_config.h
+.\_build\app_error_handler_keil.o: ..\..\..\..\..\..\components\libraries\util\nordic_common.h
+.\_build\app_error_handler_keil.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\compiler_abstraction.h
+.\_build\app_error_handler_keil.o: ..\..\..\..\..\..\components\libraries\util\sdk_os.h
+.\_build\app_error_handler_keil.o: ..\..\..\..\..\..\components\libraries\util\sdk_errors.h
+.\_build\app_error_handler_keil.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf_error.h
+.\_build\app_error_handler_keil.o: ..\..\..\..\..\..\components\libraries\util\app_util.h
+.\_build\app_error_handler_keil.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stddef.h
+.\_build\app_error_handler_keil.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf.h
+.\_build\app_error_handler_keil.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf52.h
+.\_build\app_error_handler_keil.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\core_cm4.h
+.\_build\app_error_handler_keil.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\cmsis_version.h
+.\_build\app_error_handler_keil.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\cmsis_compiler.h
+.\_build\app_error_handler_keil.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\cmsis_armcc.h
+.\_build\app_error_handler_keil.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\mpu_armv7.h
+.\_build\app_error_handler_keil.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\system_nrf52.h
+.\_build\app_error_handler_keil.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf52_bitfields.h
+.\_build\app_error_handler_keil.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf51_to_nrf52.h
+.\_build\app_error_handler_keil.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf52_name_change.h
+.\_build\app_error_handler_keil.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf52\nrf_mbr.h
+.\_build\app_error_handler_keil.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf_svc.h
+.\_build\app_error_handler_keil.o: ..\..\..\..\..\..\components\libraries\util\sdk_macros.h
+.\_build\app_error_handler_keil.o: ..\..\..\..\..\..\components\libraries\util\nrf_assert.h
+.\_build\app_error_handler_keil.o: ..\..\..\..\..\..\components\libraries\util\app_error.h
+.\_build\app_error_handler_keil.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdio.h
+.\_build\app_error_handler_keil.o: ..\..\..\..\..\..\components\libraries\util\app_error_weak.h

smart_shoes/nRF5_SDK_17.0.0_9d13099/examples/Shoes_just_traj_20201208/ble_app_uart_03_link_PC/pca10040/s132/arm5_no_packs/_build/app_error_weak.d

@@ -0,0 +1,49 @@
+.\_build\app_error_weak.o: ..\..\..\..\..\..\components\libraries\util\app_error_weak.c
+.\_build\app_error_weak.o: ..\..\..\..\..\..\components\libraries\util\app_error.h
+.\_build\app_error_weak.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdint.h
+.\_build\app_error_weak.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdio.h
+.\_build\app_error_weak.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdbool.h
+.\_build\app_error_weak.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf.h
+.\_build\app_error_weak.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf52.h
+.\_build\app_error_weak.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\core_cm4.h
+.\_build\app_error_weak.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\cmsis_version.h
+.\_build\app_error_weak.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\cmsis_compiler.h
+.\_build\app_error_weak.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\cmsis_armcc.h
+.\_build\app_error_weak.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\mpu_armv7.h
+.\_build\app_error_weak.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\system_nrf52.h
+.\_build\app_error_weak.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf52_bitfields.h
+.\_build\app_error_weak.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf51_to_nrf52.h
+.\_build\app_error_weak.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf52_name_change.h
+.\_build\app_error_weak.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\compiler_abstraction.h
+.\_build\app_error_weak.o: ..\..\..\..\..\..\components\libraries\util\sdk_errors.h
+.\_build\app_error_weak.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf_error.h
+.\_build\app_error_weak.o: ..\..\..\..\..\..\components\libraries\util\nordic_common.h
+.\_build\app_error_weak.o: ..\..\..\..\..\..\components\libraries\util\app_error_weak.h
+.\_build\app_error_weak.o: ..\..\..\..\..\..\components\libraries\log\nrf_log.h
+.\_build\app_error_weak.o: ..\..\..\..\..\..\components\libraries\util\sdk_common.h
+.\_build\app_error_weak.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\string.h
+.\_build\app_error_weak.o: ..\config\sdk_config.h
+.\_build\app_error_weak.o: ..\..\..\..\..\..\components\libraries\util\sdk_os.h
+.\_build\app_error_weak.o: ..\..\..\..\..\..\components\libraries\util\app_util.h
+.\_build\app_error_weak.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stddef.h
+.\_build\app_error_weak.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf52\nrf_mbr.h
+.\_build\app_error_weak.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf_svc.h
+.\_build\app_error_weak.o: ..\..\..\..\..\..\components\libraries\util\sdk_macros.h
+.\_build\app_error_weak.o: ..\..\..\..\..\..\components\libraries\util\nrf_assert.h
+.\_build\app_error_weak.o: ..\..\..\..\..\..\components\libraries\experimental_section_vars\nrf_section.h
+.\_build\app_error_weak.o: ..\..\..\..\..\..\components\libraries\strerror\nrf_strerror.h
+.\_build\app_error_weak.o: ..\..\..\..\..\..\components\libraries\log\src\nrf_log_internal.h
+.\_build\app_error_weak.o: ..\..\..\..\..\..\components\libraries\log\nrf_log_instance.h
+.\_build\app_error_weak.o: ..\..\..\..\..\..\components\libraries\log\nrf_log_types.h
+.\_build\app_error_weak.o: ..\..\..\..\..\..\components\libraries\log\nrf_log_ctrl.h
+.\_build\app_error_weak.o: ..\..\..\..\..\..\components\libraries\log\src\nrf_log_ctrl_internal.h
+.\_build\app_error_weak.o: ..\..\..\..\..\..\components\libraries\log\nrf_log_backend_interface.h
+.\_build\app_error_weak.o: ..\..\..\..\..\..\components\libraries\memobj\nrf_memobj.h
+.\_build\app_error_weak.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdlib.h
+.\_build\app_error_weak.o: ..\..\..\..\..\..\components\libraries\balloc\nrf_balloc.h
+.\_build\app_error_weak.o: ..\..\..\..\..\..\components\libraries\util\app_util_platform.h
+.\_build\app_error_weak.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf_soc.h
+.\_build\app_error_weak.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf_error_soc.h
+.\_build\app_error_weak.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf_nvic.h
+.\_build\app_error_weak.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf_sdm.h
+.\_build\app_error_weak.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf_error_sdm.h

smart_shoes/nRF5_SDK_17.0.0_9d13099/examples/Shoes_just_traj_20201208/ble_app_uart_03_link_PC/pca10040/s132/arm5_no_packs/_build/app_fifo.d

@@ -0,0 +1,30 @@
+.\_build\app_fifo.o: ..\..\..\..\..\..\components\libraries\fifo\app_fifo.c
+.\_build\app_fifo.o: ..\..\..\..\..\..\components\libraries\util\sdk_common.h
+.\_build\app_fifo.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdint.h
+.\_build\app_fifo.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdbool.h
+.\_build\app_fifo.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\string.h
+.\_build\app_fifo.o: ..\config\sdk_config.h
+.\_build\app_fifo.o: ..\..\..\..\..\..\components\libraries\util\nordic_common.h
+.\_build\app_fifo.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\compiler_abstraction.h
+.\_build\app_fifo.o: ..\..\..\..\..\..\components\libraries\util\sdk_os.h
+.\_build\app_fifo.o: ..\..\..\..\..\..\components\libraries\util\sdk_errors.h
+.\_build\app_fifo.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf_error.h
+.\_build\app_fifo.o: ..\..\..\..\..\..\components\libraries\util\app_util.h
+.\_build\app_fifo.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stddef.h
+.\_build\app_fifo.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf.h
+.\_build\app_fifo.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf52.h
+.\_build\app_fifo.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\core_cm4.h
+.\_build\app_fifo.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\cmsis_version.h
+.\_build\app_fifo.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\cmsis_compiler.h
+.\_build\app_fifo.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\cmsis_armcc.h
+.\_build\app_fifo.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\mpu_armv7.h
+.\_build\app_fifo.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\system_nrf52.h
+.\_build\app_fifo.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf52_bitfields.h
+.\_build\app_fifo.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf51_to_nrf52.h
+.\_build\app_fifo.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf52_name_change.h
+.\_build\app_fifo.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf52\nrf_mbr.h
+.\_build\app_fifo.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf_svc.h
+.\_build\app_fifo.o: ..\..\..\..\..\..\components\libraries\util\sdk_macros.h
+.\_build\app_fifo.o: ..\..\..\..\..\..\components\libraries\util\nrf_assert.h
+.\_build\app_fifo.o: ..\..\..\..\..\..\components\libraries\fifo\app_fifo.h
+.\_build\app_fifo.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdlib.h

smart_shoes/nRF5_SDK_17.0.0_9d13099/examples/Shoes_just_traj_20201208/ble_app_uart_03_link_PC/pca10040/s132/arm5_no_packs/_build/app_scheduler.d

@@ -0,0 +1,37 @@
+.\_build\app_scheduler.o: ..\..\..\..\..\..\components\libraries\scheduler\app_scheduler.c
+.\_build\app_scheduler.o: ..\..\..\..\..\..\components\libraries\util\sdk_common.h
+.\_build\app_scheduler.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdint.h
+.\_build\app_scheduler.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdbool.h
+.\_build\app_scheduler.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\string.h
+.\_build\app_scheduler.o: ..\config\sdk_config.h
+.\_build\app_scheduler.o: ..\..\..\..\..\..\components\libraries\util\nordic_common.h
+.\_build\app_scheduler.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\compiler_abstraction.h
+.\_build\app_scheduler.o: ..\..\..\..\..\..\components\libraries\util\sdk_os.h
+.\_build\app_scheduler.o: ..\..\..\..\..\..\components\libraries\util\sdk_errors.h
+.\_build\app_scheduler.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf_error.h
+.\_build\app_scheduler.o: ..\..\..\..\..\..\components\libraries\util\app_util.h
+.\_build\app_scheduler.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stddef.h
+.\_build\app_scheduler.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf.h
+.\_build\app_scheduler.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf52.h
+.\_build\app_scheduler.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\core_cm4.h
+.\_build\app_scheduler.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\cmsis_version.h
+.\_build\app_scheduler.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\cmsis_compiler.h
+.\_build\app_scheduler.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\cmsis_armcc.h
+.\_build\app_scheduler.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\mpu_armv7.h
+.\_build\app_scheduler.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\system_nrf52.h
+.\_build\app_scheduler.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf52_bitfields.h
+.\_build\app_scheduler.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf51_to_nrf52.h
+.\_build\app_scheduler.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf52_name_change.h
+.\_build\app_scheduler.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf52\nrf_mbr.h
+.\_build\app_scheduler.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf_svc.h
+.\_build\app_scheduler.o: ..\..\..\..\..\..\components\libraries\util\sdk_macros.h
+.\_build\app_scheduler.o: ..\..\..\..\..\..\components\libraries\util\nrf_assert.h
+.\_build\app_scheduler.o: ..\..\..\..\..\..\components\libraries\scheduler\app_scheduler.h
+.\_build\app_scheduler.o: ..\..\..\..\..\..\components\libraries\util\app_error.h
+.\_build\app_scheduler.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdio.h
+.\_build\app_scheduler.o: ..\..\..\..\..\..\components\libraries\util\app_error_weak.h
+.\_build\app_scheduler.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdlib.h
+.\_build\app_scheduler.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf_soc.h
+.\_build\app_scheduler.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf_error_soc.h
+.\_build\app_scheduler.o: ..\..\..\..\..\..\components\libraries\util\app_util_platform.h
+.\_build\app_scheduler.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf_nvic.h

smart_shoes/nRF5_SDK_17.0.0_9d13099/examples/Shoes_just_traj_20201208/ble_app_uart_03_link_PC/pca10040/s132/arm5_no_packs/_build/app_timer2.d

@@ -0,0 +1,62 @@
+.\_build\app_timer2.o: ..\..\..\..\..\..\components\libraries\timer\app_timer2.c
+.\_build\app_timer2.o: ..\..\..\..\..\..\components\libraries\timer\app_timer.h
+.\_build\app_timer2.o: ..\config\sdk_config.h
+.\_build\app_timer2.o: ..\..\..\..\..\..\components\libraries\util\app_error.h
+.\_build\app_timer2.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdint.h
+.\_build\app_timer2.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdio.h
+.\_build\app_timer2.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdbool.h
+.\_build\app_timer2.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf.h
+.\_build\app_timer2.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf52.h
+.\_build\app_timer2.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\core_cm4.h
+.\_build\app_timer2.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\cmsis_version.h
+.\_build\app_timer2.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\cmsis_compiler.h
+.\_build\app_timer2.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\cmsis_armcc.h
+.\_build\app_timer2.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\mpu_armv7.h
+.\_build\app_timer2.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\system_nrf52.h
+.\_build\app_timer2.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf52_bitfields.h
+.\_build\app_timer2.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf51_to_nrf52.h
+.\_build\app_timer2.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf52_name_change.h
+.\_build\app_timer2.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\compiler_abstraction.h
+.\_build\app_timer2.o: ..\..\..\..\..\..\components\libraries\util\sdk_errors.h
+.\_build\app_timer2.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf_error.h
+.\_build\app_timer2.o: ..\..\..\..\..\..\components\libraries\util\nordic_common.h
+.\_build\app_timer2.o: ..\..\..\..\..\..\components\libraries\util\app_error_weak.h
+.\_build\app_timer2.o: ..\..\..\..\..\..\components\libraries\util\app_util.h
+.\_build\app_timer2.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stddef.h
+.\_build\app_timer2.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf52\nrf_mbr.h
+.\_build\app_timer2.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf_svc.h
+.\_build\app_timer2.o: ..\..\..\..\..\..\components\libraries\log\nrf_log_instance.h
+.\_build\app_timer2.o: ..\..\..\..\..\..\components\libraries\experimental_section_vars\nrf_section.h
+.\_build\app_timer2.o: ..\..\..\..\..\..\components\libraries\log\nrf_log_types.h
+.\_build\app_timer2.o: ..\..\..\..\..\..\components\libraries\sortlist\nrf_sortlist.h
+.\_build\app_timer2.o: ..\..\..\..\..\..\components\libraries\atomic_fifo\nrf_atfifo.h
+.\_build\app_timer2.o: ..\..\..\..\..\..\components\libraries\util\nrf_assert.h
+.\_build\app_timer2.o: ..\..\..\..\..\..\components\libraries\delay\nrf_delay.h
+.\_build\app_timer2.o: ..\..\..\..\..\..\modules\nrfx\nrfx.h
+.\_build\app_timer2.o: ..\..\..\..\..\..\integration\nrfx\nrfx_config.h
+.\_build\app_timer2.o: ..\..\..\..\..\..\modules\nrfx\drivers/nrfx_common.h
+.\_build\app_timer2.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf_peripherals.h
+.\_build\app_timer2.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf52832_peripherals.h
+.\_build\app_timer2.o: ..\..\..\..\..\..\integration\nrfx\nrfx_glue.h
+.\_build\app_timer2.o: ..\..\..\..\..\..\integration\nrfx\legacy/apply_old_config.h
+.\_build\app_timer2.o: ..\..\..\..\..\..\modules\nrfx\soc/nrfx_irqs.h
+.\_build\app_timer2.o: ..\..\..\..\..\..\modules\nrfx\soc/nrfx_irqs_nrf52832.h
+.\_build\app_timer2.o: ..\..\..\..\..\..\components\libraries\util\app_util_platform.h
+.\_build\app_timer2.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf_soc.h
+.\_build\app_timer2.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf_error_soc.h
+.\_build\app_timer2.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf_nvic.h
+.\_build\app_timer2.o: ..\..\..\..\..\..\modules\nrfx\soc/nrfx_coredep.h
+.\_build\app_timer2.o: ..\..\..\..\..\..\modules\nrfx\soc/nrfx_atomic.h
+.\_build\app_timer2.o: ..\..\..\..\..\..\modules\nrfx\nrfx.h
+.\_build\app_timer2.o: ..\..\..\..\..\..\components\libraries\util\sdk_resources.h
+.\_build\app_timer2.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf_sd_def.h
+.\_build\app_timer2.o: ..\..\..\..\..\..\modules\nrfx\drivers/nrfx_errors.h
+.\_build\app_timer2.o: ..\..\..\..\..\..\components\libraries\log\nrf_log.h
+.\_build\app_timer2.o: ..\..\..\..\..\..\components\libraries\util\sdk_common.h
+.\_build\app_timer2.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\string.h
+.\_build\app_timer2.o: ..\..\..\..\..\..\components\libraries\util\sdk_os.h
+.\_build\app_timer2.o: ..\..\..\..\..\..\components\libraries\util\sdk_macros.h
+.\_build\app_timer2.o: ..\..\..\..\..\..\components\libraries\strerror\nrf_strerror.h
+.\_build\app_timer2.o: ..\..\..\..\..\..\components\libraries\log\src\nrf_log_internal.h
+.\_build\app_timer2.o: ..\..\..\..\..\..\components\libraries\timer\drv_rtc.h
+.\_build\app_timer2.o: ..\..\..\..\..\..\modules\nrfx\hal/nrf_rtc.h

smart_shoes/nRF5_SDK_17.0.0_9d13099/examples/Shoes_just_traj_20201208/ble_app_uart_03_link_PC/pca10040/s132/arm5_no_packs/_build/app_uart_fifo.d

@@ -0,0 +1,58 @@
+.\_build\app_uart_fifo.o: ..\..\..\..\..\..\components\libraries\uart\app_uart_fifo.c
+.\_build\app_uart_fifo.o: ..\..\..\..\..\..\components\libraries\util\sdk_common.h
+.\_build\app_uart_fifo.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdint.h
+.\_build\app_uart_fifo.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdbool.h
+.\_build\app_uart_fifo.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\string.h
+.\_build\app_uart_fifo.o: ..\config\sdk_config.h
+.\_build\app_uart_fifo.o: ..\..\..\..\..\..\components\libraries\util\nordic_common.h
+.\_build\app_uart_fifo.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\compiler_abstraction.h
+.\_build\app_uart_fifo.o: ..\..\..\..\..\..\components\libraries\util\sdk_os.h
+.\_build\app_uart_fifo.o: ..\..\..\..\..\..\components\libraries\util\sdk_errors.h
+.\_build\app_uart_fifo.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf_error.h
+.\_build\app_uart_fifo.o: ..\..\..\..\..\..\components\libraries\util\app_util.h
+.\_build\app_uart_fifo.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stddef.h
+.\_build\app_uart_fifo.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf.h
+.\_build\app_uart_fifo.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf52.h
+.\_build\app_uart_fifo.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\core_cm4.h
+.\_build\app_uart_fifo.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\cmsis_version.h
+.\_build\app_uart_fifo.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\cmsis_compiler.h
+.\_build\app_uart_fifo.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\cmsis_armcc.h
+.\_build\app_uart_fifo.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\mpu_armv7.h
+.\_build\app_uart_fifo.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\system_nrf52.h
+.\_build\app_uart_fifo.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf52_bitfields.h
+.\_build\app_uart_fifo.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf51_to_nrf52.h
+.\_build\app_uart_fifo.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf52_name_change.h
+.\_build\app_uart_fifo.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf52\nrf_mbr.h
+.\_build\app_uart_fifo.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf_svc.h
+.\_build\app_uart_fifo.o: ..\..\..\..\..\..\components\libraries\util\sdk_macros.h
+.\_build\app_uart_fifo.o: ..\..\..\..\..\..\components\libraries\util\nrf_assert.h
+.\_build\app_uart_fifo.o: ..\..\..\..\..\..\components\libraries\uart\app_uart.h
+.\_build\app_uart_fifo.o: ..\..\..\..\..\..\components\libraries\util\app_util_platform.h
+.\_build\app_uart_fifo.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf_soc.h
+.\_build\app_uart_fifo.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf_error_soc.h
+.\_build\app_uart_fifo.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf_nvic.h
+.\_build\app_uart_fifo.o: ..\..\..\..\..\..\components\libraries\util\app_error.h
+.\_build\app_uart_fifo.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdio.h
+.\_build\app_uart_fifo.o: ..\..\..\..\..\..\components\libraries\util\app_error_weak.h
+.\_build\app_uart_fifo.o: ..\..\..\..\..\..\components\libraries\fifo\app_fifo.h
+.\_build\app_uart_fifo.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdlib.h
+.\_build\app_uart_fifo.o: ..\..\..\..\..\..\integration\nrfx\legacy\nrf_drv_uart.h
+.\_build\app_uart_fifo.o: ..\..\..\..\..\..\modules\nrfx\nrfx.h
+.\_build\app_uart_fifo.o: ..\..\..\..\..\..\integration\nrfx\nrfx_config.h
+.\_build\app_uart_fifo.o: ..\..\..\..\..\..\modules\nrfx\drivers/nrfx_common.h
+.\_build\app_uart_fifo.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf_peripherals.h
+.\_build\app_uart_fifo.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf52832_peripherals.h
+.\_build\app_uart_fifo.o: ..\..\..\..\..\..\integration\nrfx\nrfx_glue.h
+.\_build\app_uart_fifo.o: ..\..\..\..\..\..\integration\nrfx\legacy/apply_old_config.h
+.\_build\app_uart_fifo.o: ..\..\..\..\..\..\modules\nrfx\soc/nrfx_irqs.h
+.\_build\app_uart_fifo.o: ..\..\..\..\..\..\modules\nrfx\soc/nrfx_irqs_nrf52832.h
+.\_build\app_uart_fifo.o: ..\..\..\..\..\..\modules\nrfx\soc/nrfx_coredep.h
+.\_build\app_uart_fifo.o: ..\..\..\..\..\..\modules\nrfx\soc/nrfx_atomic.h
+.\_build\app_uart_fifo.o: ..\..\..\..\..\..\modules\nrfx\nrfx.h
+.\_build\app_uart_fifo.o: ..\..\..\..\..\..\components\libraries\util\sdk_resources.h
+.\_build\app_uart_fifo.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf_sd_def.h
+.\_build\app_uart_fifo.o: ..\..\..\..\..\..\modules\nrfx\drivers/nrfx_errors.h
+.\_build\app_uart_fifo.o: ..\..\..\..\..\..\modules\nrfx\drivers\include\nrfx_uarte.h
+.\_build\app_uart_fifo.o: ..\..\..\..\..\..\modules\nrfx\hal/nrf_uarte.h
+.\_build\app_uart_fifo.o: ..\..\..\..\..\..\modules\nrfx\drivers\include\nrfx_uart.h
+.\_build\app_uart_fifo.o: ..\..\..\..\..\..\modules\nrfx\hal/nrf_uart.h

smart_shoes/nRF5_SDK_17.0.0_9d13099/examples/Shoes_just_traj_20201208/ble_app_uart_03_link_PC/pca10040/s132/arm5_no_packs/_build/app_util_platform.d

@@ -0,0 +1,27 @@
+.\_build\app_util_platform.o: ..\..\..\..\..\..\components\libraries\util\app_util_platform.c
+.\_build\app_util_platform.o: ..\..\..\..\..\..\components\libraries\util\app_util_platform.h
+.\_build\app_util_platform.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdint.h
+.\_build\app_util_platform.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\compiler_abstraction.h
+.\_build\app_util_platform.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf.h
+.\_build\app_util_platform.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf52.h
+.\_build\app_util_platform.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\core_cm4.h
+.\_build\app_util_platform.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\cmsis_version.h
+.\_build\app_util_platform.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\cmsis_compiler.h
+.\_build\app_util_platform.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\cmsis_armcc.h
+.\_build\app_util_platform.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\mpu_armv7.h
+.\_build\app_util_platform.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\system_nrf52.h
+.\_build\app_util_platform.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf52_bitfields.h
+.\_build\app_util_platform.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf51_to_nrf52.h
+.\_build\app_util_platform.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf52_name_change.h
+.\_build\app_util_platform.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf_soc.h
+.\_build\app_util_platform.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf_svc.h
+.\_build\app_util_platform.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf_error.h
+.\_build\app_util_platform.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf_error_soc.h
+.\_build\app_util_platform.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf_nvic.h
+.\_build\app_util_platform.o: ..\..\..\..\..\..\components\libraries\util\nrf_assert.h
+.\_build\app_util_platform.o: ..\..\..\..\..\..\components\libraries\util\app_error.h
+.\_build\app_util_platform.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdio.h
+.\_build\app_util_platform.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdbool.h
+.\_build\app_util_platform.o: ..\..\..\..\..\..\components\libraries\util\sdk_errors.h
+.\_build\app_util_platform.o: ..\..\..\..\..\..\components\libraries\util\nordic_common.h
+.\_build\app_util_platform.o: ..\..\..\..\..\..\components\libraries\util\app_error_weak.h

smart_shoes/nRF5_SDK_17.0.0_9d13099/examples/Shoes_just_traj_20201208/ble_app_uart_03_link_PC/pca10040/s132/arm5_no_packs/_build/arm_startup_nrf52.d

@@ -0,0 +1 @@
+.\_build\arm_startup_nrf52.o: RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s

smart_shoes/nRF5_SDK_17.0.0_9d13099/examples/Shoes_just_traj_20201208/ble_app_uart_03_link_PC/pca10040/s132/arm5_no_packs/_build/arm_startup_nrf52.lst

@@ -0,0 +1,1203 @@
+
+
+
+ARM Macro Assembler    Page 1 
+
+
+    1 00000000         ; Copyright (c) 2009-2020 ARM Limited. All rights reserv
+                       ed.
+    2 00000000         ; 
+    3 00000000         ;     SPDX-License-Identifier: Apache-2.0
+    4 00000000         ; 
+    5 00000000         ; Licensed under the Apache License, Version 2.0 (the Li
+                       cense); you may
+    6 00000000         ; not use this file except in compliance with the Licens
+                       e.
+    7 00000000         ; You may obtain a copy of the License at
+    8 00000000         ; 
+    9 00000000         ;     www.apache.org/licenses/LICENSE-2.0
+   10 00000000         ; 
+   11 00000000         ; Unless required by applicable law or agreed to in writ
+                       ing, software
+   12 00000000         ; distributed under the License is distributed on an AS 
+                       IS BASIS, WITHOUT
+   13 00000000         ; WARRANTIES OR CONDITIONS OF ANY KIND, either express o
+                       r implied.
+   14 00000000         ; See the License for the specific language governing pe
+                       rmissions and
+   15 00000000         ; limitations under the License.
+   16 00000000         ; 
+   17 00000000         ; NOTICE: This file has been modified by Nordic Semicond
+                       uctor ASA.
+   18 00000000         
+   19 00000000                 IF               :DEF: __STARTUP_CONFIG
+   26                          ENDIF
+   27 00000000         
+   28 00000000                 IF               :DEF: __STARTUP_CONFIG
+                               ELIF             :DEF: __STACK_SIZE
+   31 00000000 00002000 
+                       Stack_Size
+                               EQU              __STACK_SIZE
+   32 00000000                 ELSE
+   34                          ENDIF
+   35 00000000         
+   36 00000000                 IF               :DEF: __STARTUP_CONFIG
+   39 00000000 00000003 
+                       Stack_Align
+                               EQU              3
+   40 00000000                 ENDIF
+   41 00000000         
+   42 00000000                 AREA             STACK, NOINIT, READWRITE, ALIGN
+=Stack_Align
+   43 00000000         Stack_Mem
+                               SPACE            Stack_Size
+   44 00002000         __initial_sp
+   45 00002000         
+   46 00002000                 IF               :DEF: __STARTUP_CONFIG
+                               ELIF             :DEF: __HEAP_SIZE
+   49 00002000 00002000 
+                       Heap_Size
+                               EQU              __HEAP_SIZE
+   50 00002000                 ELSE
+   52                          ENDIF
+   53 00002000         
+   54 00002000                 AREA             HEAP, NOINIT, READWRITE, ALIGN=
+3
+
+
+
+ARM Macro Assembler    Page 2 
+
+
+   55 00000000         __heap_base
+   56 00000000         Heap_Mem
+                               SPACE            Heap_Size
+   57 00002000         __heap_limit
+   58 00002000         
+   59 00002000                 PRESERVE8
+   60 00002000                 THUMB
+   61 00002000         
+   62 00002000         ; Vector Table Mapped to Address 0 at Reset
+   63 00002000         
+   64 00002000                 AREA             RESET, DATA, READONLY
+   65 00000000                 EXPORT           __Vectors
+   66 00000000                 EXPORT           __Vectors_End
+   67 00000000                 EXPORT           __Vectors_Size
+   68 00000000         
+   69 00000000 00000000 
+                       __Vectors
+                               DCD              __initial_sp ; Top of Stack
+   70 00000004 00000000        DCD              Reset_Handler
+   71 00000008 00000000        DCD              NMI_Handler
+   72 0000000C 00000000        DCD              HardFault_Handler
+   73 00000010 00000000        DCD              MemoryManagement_Handler
+   74 00000014 00000000        DCD              BusFault_Handler
+   75 00000018 00000000        DCD              UsageFault_Handler
+   76 0000001C 00000000        DCD              0           ; Reserved
+   77 00000020 00000000        DCD              0           ; Reserved
+   78 00000024 00000000        DCD              0           ; Reserved
+   79 00000028 00000000        DCD              0           ; Reserved
+   80 0000002C 00000000        DCD              SVC_Handler
+   81 00000030 00000000        DCD              DebugMon_Handler
+   82 00000034 00000000        DCD              0           ; Reserved
+   83 00000038 00000000        DCD              PendSV_Handler
+   84 0000003C 00000000        DCD              SysTick_Handler
+   85 00000040         
+   86 00000040         ; External Interrupts
+   87 00000040 00000000        DCD              POWER_CLOCK_IRQHandler
+   88 00000044 00000000        DCD              RADIO_IRQHandler
+   89 00000048 00000000        DCD              UARTE0_UART0_IRQHandler
+   90 0000004C 00000000        DCD              SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TW
+I0_IRQHandler
+   91 00000050 00000000        DCD              SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TW
+I1_IRQHandler
+   92 00000054 00000000        DCD              NFCT_IRQHandler
+   93 00000058 00000000        DCD              GPIOTE_IRQHandler
+   94 0000005C 00000000        DCD              SAADC_IRQHandler
+   95 00000060 00000000        DCD              TIMER0_IRQHandler
+   96 00000064 00000000        DCD              TIMER1_IRQHandler
+   97 00000068 00000000        DCD              TIMER2_IRQHandler
+   98 0000006C 00000000        DCD              RTC0_IRQHandler
+   99 00000070 00000000        DCD              TEMP_IRQHandler
+  100 00000074 00000000        DCD              RNG_IRQHandler
+  101 00000078 00000000        DCD              ECB_IRQHandler
+  102 0000007C 00000000        DCD              CCM_AAR_IRQHandler
+  103 00000080 00000000        DCD              WDT_IRQHandler
+  104 00000084 00000000        DCD              RTC1_IRQHandler
+  105 00000088 00000000        DCD              QDEC_IRQHandler
+  106 0000008C 00000000        DCD              COMP_LPCOMP_IRQHandler
+  107 00000090 00000000        DCD              SWI0_EGU0_IRQHandler
+  108 00000094 00000000        DCD              SWI1_EGU1_IRQHandler
+
+
+
+ARM Macro Assembler    Page 3 
+
+
+  109 00000098 00000000        DCD              SWI2_EGU2_IRQHandler
+  110 0000009C 00000000        DCD              SWI3_EGU3_IRQHandler
+  111 000000A0 00000000        DCD              SWI4_EGU4_IRQHandler
+  112 000000A4 00000000        DCD              SWI5_EGU5_IRQHandler
+  113 000000A8 00000000        DCD              TIMER3_IRQHandler
+  114 000000AC 00000000        DCD              TIMER4_IRQHandler
+  115 000000B0 00000000        DCD              PWM0_IRQHandler
+  116 000000B4 00000000        DCD              PDM_IRQHandler
+  117 000000B8 00000000        DCD              0           ; Reserved
+  118 000000BC 00000000        DCD              0           ; Reserved
+  119 000000C0 00000000        DCD              MWU_IRQHandler
+  120 000000C4 00000000        DCD              PWM1_IRQHandler
+  121 000000C8 00000000        DCD              PWM2_IRQHandler
+  122 000000CC 00000000        DCD              SPIM2_SPIS2_SPI2_IRQHandler
+  123 000000D0 00000000        DCD              RTC2_IRQHandler
+  124 000000D4 00000000        DCD              I2S_IRQHandler
+  125 000000D8 00000000        DCD              FPU_IRQHandler
+  126 000000DC 00000000        DCD              0           ; Reserved
+  127 000000E0 00000000        DCD              0           ; Reserved
+  128 000000E4 00000000        DCD              0           ; Reserved
+  129 000000E8 00000000        DCD              0           ; Reserved
+  130 000000EC 00000000        DCD              0           ; Reserved
+  131 000000F0 00000000        DCD              0           ; Reserved
+  132 000000F4 00000000        DCD              0           ; Reserved
+  133 000000F8 00000000        DCD              0           ; Reserved
+  134 000000FC 00000000        DCD              0           ; Reserved
+  135 00000100 00000000        DCD              0           ; Reserved
+  136 00000104 00000000        DCD              0           ; Reserved
+  137 00000108 00000000        DCD              0           ; Reserved
+  138 0000010C 00000000        DCD              0           ; Reserved
+  139 00000110 00000000        DCD              0           ; Reserved
+  140 00000114 00000000        DCD              0           ; Reserved
+  141 00000118 00000000        DCD              0           ; Reserved
+  142 0000011C 00000000        DCD              0           ; Reserved
+  143 00000120 00000000        DCD              0           ; Reserved
+  144 00000124 00000000        DCD              0           ; Reserved
+  145 00000128 00000000        DCD              0           ; Reserved
+  146 0000012C 00000000        DCD              0           ; Reserved
+  147 00000130 00000000        DCD              0           ; Reserved
+  148 00000134 00000000        DCD              0           ; Reserved
+  149 00000138 00000000        DCD              0           ; Reserved
+  150 0000013C 00000000        DCD              0           ; Reserved
+  151 00000140 00000000        DCD              0           ; Reserved
+  152 00000144 00000000        DCD              0           ; Reserved
+  153 00000148 00000000        DCD              0           ; Reserved
+  154 0000014C 00000000        DCD              0           ; Reserved
+  155 00000150 00000000        DCD              0           ; Reserved
+  156 00000154 00000000        DCD              0           ; Reserved
+  157 00000158 00000000        DCD              0           ; Reserved
+  158 0000015C 00000000        DCD              0           ; Reserved
+  159 00000160 00000000        DCD              0           ; Reserved
+  160 00000164 00000000        DCD              0           ; Reserved
+  161 00000168 00000000        DCD              0           ; Reserved
+  162 0000016C 00000000        DCD              0           ; Reserved
+  163 00000170 00000000        DCD              0           ; Reserved
+  164 00000174 00000000        DCD              0           ; Reserved
+  165 00000178 00000000        DCD              0           ; Reserved
+  166 0000017C 00000000        DCD              0           ; Reserved
+  167 00000180 00000000        DCD              0           ; Reserved
+
+
+
+ARM Macro Assembler    Page 4 
+
+
+  168 00000184 00000000        DCD              0           ; Reserved
+  169 00000188 00000000        DCD              0           ; Reserved
+  170 0000018C 00000000        DCD              0           ; Reserved
+  171 00000190 00000000        DCD              0           ; Reserved
+  172 00000194 00000000        DCD              0           ; Reserved
+  173 00000198 00000000        DCD              0           ; Reserved
+  174 0000019C 00000000        DCD              0           ; Reserved
+  175 000001A0 00000000        DCD              0           ; Reserved
+  176 000001A4 00000000        DCD              0           ; Reserved
+  177 000001A8 00000000        DCD              0           ; Reserved
+  178 000001AC 00000000        DCD              0           ; Reserved
+  179 000001B0 00000000        DCD              0           ; Reserved
+  180 000001B4 00000000        DCD              0           ; Reserved
+  181 000001B8 00000000        DCD              0           ; Reserved
+  182 000001BC 00000000        DCD              0           ; Reserved
+  183 000001C0 00000000        DCD              0           ; Reserved
+  184 000001C4 00000000        DCD              0           ; Reserved
+  185 000001C8 00000000        DCD              0           ; Reserved
+  186 000001CC 00000000        DCD              0           ; Reserved
+  187 000001D0 00000000        DCD              0           ; Reserved
+  188 000001D4 00000000        DCD              0           ; Reserved
+  189 000001D8 00000000        DCD              0           ; Reserved
+  190 000001DC 00000000        DCD              0           ; Reserved
+  191 000001E0 00000000        DCD              0           ; Reserved
+  192 000001E4 00000000        DCD              0           ; Reserved
+  193 000001E8 00000000        DCD              0           ; Reserved
+  194 000001EC 00000000        DCD              0           ; Reserved
+  195 000001F0 00000000        DCD              0           ; Reserved
+  196 000001F4 00000000        DCD              0           ; Reserved
+  197 000001F8 00000000        DCD              0           ; Reserved
+  198 000001FC 00000000        DCD              0           ; Reserved
+  199 00000200         
+  200 00000200         __Vectors_End
+  201 00000200         
+  202 00000200 00000200 
+                       __Vectors_Size
+                               EQU              __Vectors_End - __Vectors
+  203 00000200         
+  204 00000200                 AREA             |.text|, CODE, READONLY
+  205 00000000         
+  206 00000000         ; Reset Handler
+  207 00000000         
+  208 00000000         
+  209 00000000         Reset_Handler
+                               PROC
+  210 00000000                 EXPORT           Reset_Handler             [WEAK
+]
+  211 00000000                 IMPORT           SystemInit
+  212 00000000                 IMPORT           __main
+  213 00000000         
+  214 00000000         
+  215 00000000 4806            LDR              R0, =SystemInit
+  216 00000002 4780            BLX              R0
+  217 00000004 4806            LDR              R0, =__main
+  218 00000006 4700            BX               R0
+  219 00000008                 ENDP
+  220 00000008         
+  221 00000008         ; Dummy Exception Handlers (infinite loops which can be 
+                       modified)
+
+
+
+ARM Macro Assembler    Page 5 
+
+
+  222 00000008         
+  223 00000008         NMI_Handler
+                               PROC
+  224 00000008                 EXPORT           NMI_Handler               [WEAK
+]
+  225 00000008 E7FE            B                .
+  226 0000000A                 ENDP
+  228 0000000A         HardFault_Handler
+                               PROC
+  229 0000000A                 EXPORT           HardFault_Handler         [WEAK
+]
+  230 0000000A E7FE            B                .
+  231 0000000C                 ENDP
+  233 0000000C         MemoryManagement_Handler
+                               PROC
+  234 0000000C                 EXPORT           MemoryManagement_Handler  [WEAK
+]
+  235 0000000C E7FE            B                .
+  236 0000000E                 ENDP
+  238 0000000E         BusFault_Handler
+                               PROC
+  239 0000000E                 EXPORT           BusFault_Handler          [WEAK
+]
+  240 0000000E E7FE            B                .
+  241 00000010                 ENDP
+  243 00000010         UsageFault_Handler
+                               PROC
+  244 00000010                 EXPORT           UsageFault_Handler        [WEAK
+]
+  245 00000010 E7FE            B                .
+  246 00000012                 ENDP
+  247 00000012         SVC_Handler
+                               PROC
+  248 00000012                 EXPORT           SVC_Handler               [WEAK
+]
+  249 00000012 E7FE            B                .
+  250 00000014                 ENDP
+  252 00000014         DebugMon_Handler
+                               PROC
+  253 00000014                 EXPORT           DebugMon_Handler          [WEAK
+]
+  254 00000014 E7FE            B                .
+  255 00000016                 ENDP
+  256 00000016         PendSV_Handler
+                               PROC
+  257 00000016                 EXPORT           PendSV_Handler            [WEAK
+]
+  258 00000016 E7FE            B                .
+  259 00000018                 ENDP
+  260 00000018         SysTick_Handler
+                               PROC
+  261 00000018                 EXPORT           SysTick_Handler           [WEAK
+]
+  262 00000018 E7FE            B                .
+  263 0000001A                 ENDP
+  264 0000001A         
+  265 0000001A         Default_Handler
+                               PROC
+  266 0000001A         
+
+
+
+ARM Macro Assembler    Page 6 
+
+
+  267 0000001A                 EXPORT           POWER_CLOCK_IRQHandler [WEAK]
+  268 0000001A                 EXPORT           RADIO_IRQHandler [WEAK]
+  269 0000001A                 EXPORT           UARTE0_UART0_IRQHandler [WEAK]
+  270 0000001A                 EXPORT           SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TW
+I0_IRQHandler [WEAK]
+  271 0000001A                 EXPORT           SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TW
+I1_IRQHandler [WEAK]
+  272 0000001A                 EXPORT           NFCT_IRQHandler [WEAK]
+  273 0000001A                 EXPORT           GPIOTE_IRQHandler [WEAK]
+  274 0000001A                 EXPORT           SAADC_IRQHandler [WEAK]
+  275 0000001A                 EXPORT           TIMER0_IRQHandler [WEAK]
+  276 0000001A                 EXPORT           TIMER1_IRQHandler [WEAK]
+  277 0000001A                 EXPORT           TIMER2_IRQHandler [WEAK]
+  278 0000001A                 EXPORT           RTC0_IRQHandler [WEAK]
+  279 0000001A                 EXPORT           TEMP_IRQHandler [WEAK]
+  280 0000001A                 EXPORT           RNG_IRQHandler [WEAK]
+  281 0000001A                 EXPORT           ECB_IRQHandler [WEAK]
+  282 0000001A                 EXPORT           CCM_AAR_IRQHandler [WEAK]
+  283 0000001A                 EXPORT           WDT_IRQHandler [WEAK]
+  284 0000001A                 EXPORT           RTC1_IRQHandler [WEAK]
+  285 0000001A                 EXPORT           QDEC_IRQHandler [WEAK]
+  286 0000001A                 EXPORT           COMP_LPCOMP_IRQHandler [WEAK]
+  287 0000001A                 EXPORT           SWI0_EGU0_IRQHandler [WEAK]
+  288 0000001A                 EXPORT           SWI1_EGU1_IRQHandler [WEAK]
+  289 0000001A                 EXPORT           SWI2_EGU2_IRQHandler [WEAK]
+  290 0000001A                 EXPORT           SWI3_EGU3_IRQHandler [WEAK]
+  291 0000001A                 EXPORT           SWI4_EGU4_IRQHandler [WEAK]
+  292 0000001A                 EXPORT           SWI5_EGU5_IRQHandler [WEAK]
+  293 0000001A                 EXPORT           TIMER3_IRQHandler [WEAK]
+  294 0000001A                 EXPORT           TIMER4_IRQHandler [WEAK]
+  295 0000001A                 EXPORT           PWM0_IRQHandler [WEAK]
+  296 0000001A                 EXPORT           PDM_IRQHandler [WEAK]
+  297 0000001A                 EXPORT           MWU_IRQHandler [WEAK]
+  298 0000001A                 EXPORT           PWM1_IRQHandler [WEAK]
+  299 0000001A                 EXPORT           PWM2_IRQHandler [WEAK]
+  300 0000001A                 EXPORT           SPIM2_SPIS2_SPI2_IRQHandler [WE
+AK]
+  301 0000001A                 EXPORT           RTC2_IRQHandler [WEAK]
+  302 0000001A                 EXPORT           I2S_IRQHandler [WEAK]
+  303 0000001A                 EXPORT           FPU_IRQHandler [WEAK]
+  304 0000001A         POWER_CLOCK_IRQHandler
+  305 0000001A         RADIO_IRQHandler
+  306 0000001A         UARTE0_UART0_IRQHandler
+  307 0000001A         SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler
+  308 0000001A         SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler
+  309 0000001A         NFCT_IRQHandler
+  310 0000001A         GPIOTE_IRQHandler
+  311 0000001A         SAADC_IRQHandler
+  312 0000001A         TIMER0_IRQHandler
+  313 0000001A         TIMER1_IRQHandler
+  314 0000001A         TIMER2_IRQHandler
+  315 0000001A         RTC0_IRQHandler
+  316 0000001A         TEMP_IRQHandler
+  317 0000001A         RNG_IRQHandler
+  318 0000001A         ECB_IRQHandler
+  319 0000001A         CCM_AAR_IRQHandler
+  320 0000001A         WDT_IRQHandler
+  321 0000001A         RTC1_IRQHandler
+  322 0000001A         QDEC_IRQHandler
+
+
+
+ARM Macro Assembler    Page 7 
+
+
+  323 0000001A         COMP_LPCOMP_IRQHandler
+  324 0000001A         SWI0_EGU0_IRQHandler
+  325 0000001A         SWI1_EGU1_IRQHandler
+  326 0000001A         SWI2_EGU2_IRQHandler
+  327 0000001A         SWI3_EGU3_IRQHandler
+  328 0000001A         SWI4_EGU4_IRQHandler
+  329 0000001A         SWI5_EGU5_IRQHandler
+  330 0000001A         TIMER3_IRQHandler
+  331 0000001A         TIMER4_IRQHandler
+  332 0000001A         PWM0_IRQHandler
+  333 0000001A         PDM_IRQHandler
+  334 0000001A         MWU_IRQHandler
+  335 0000001A         PWM1_IRQHandler
+  336 0000001A         PWM2_IRQHandler
+  337 0000001A         SPIM2_SPIS2_SPI2_IRQHandler
+  338 0000001A         RTC2_IRQHandler
+  339 0000001A         I2S_IRQHandler
+  340 0000001A         FPU_IRQHandler
+  341 0000001A E7FE            B                .
+  342 0000001C                 ENDP
+  343 0000001C                 ALIGN
+  344 0000001C         
+  345 0000001C         ; User Initial Stack & Heap
+  346 0000001C         
+  347 0000001C                 IF               :DEF:__MICROLIB
+  348 0000001C         
+  349 0000001C                 EXPORT           __initial_sp
+  350 0000001C                 EXPORT           __heap_base
+  351 0000001C                 EXPORT           __heap_limit
+  352 0000001C         
+  353 0000001C                 ELSE
+  369                          ENDIF
+  370 0000001C         
+  371 0000001C                 END
+              00000000 
+              00000000 
+Command Line: --debug --xref --diag_suppress=9931 --cpu=Cortex-M4.fp.sp --apcs=
+interwork --depend=.\_build\arm_startup_nrf52.d -o.\_build\arm_startup_nrf52.o 
+-I..\..\..\config -I..\..\..\..\..\..\components -I..\..\..\..\..\..\components
+\ble\ble_advertising -I..\..\..\..\..\..\components\ble\ble_dtm -I..\..\..\..\.
+.\..\components\ble\ble_link_ctx_manager -I..\..\..\..\..\..\components\ble\ble
+_racp -I..\..\..\..\..\..\components\ble\ble_services\ble_ancs_c -I..\..\..\..\
+..\..\components\ble\ble_services\ble_ans_c -I..\..\..\..\..\..\components\ble\
+ble_services\ble_bas -I..\..\..\..\..\..\components\ble\ble_services\ble_bas_c 
+-I..\..\..\..\..\..\components\ble\ble_services\ble_cscs -I..\..\..\..\..\..\co
+mponents\ble\ble_services\ble_cts_c -I..\..\..\..\..\..\components\ble\ble_serv
+ices\ble_dfu -I..\..\..\..\..\..\components\ble\ble_services\ble_dis -I..\..\..
+\..\..\..\components\ble\ble_services\ble_gls -I..\..\..\..\..\..\components\bl
+e\ble_services\ble_hids -I..\..\..\..\..\..\components\ble\ble_services\ble_hrs
+ -I..\..\..\..\..\..\components\ble\ble_services\ble_hrs_c -I..\..\..\..\..\..\
+components\ble\ble_services\ble_hts -I..\..\..\..\..\..\components\ble\ble_serv
+ices\ble_ias -I..\..\..\..\..\..\components\ble\ble_services\ble_ias_c -I..\..\
+..\..\..\..\components\ble\ble_services\ble_lbs -I..\..\..\..\..\..\components\
+ble\ble_services\ble_lbs_c -I..\..\..\..\..\..\components\ble\ble_services\ble_
+lls -I..\..\..\..\..\..\components\ble\ble_services\ble_nus -I..\..\..\..\..\..
+\components\ble\ble_services\ble_nus_c -I..\..\..\..\..\..\components\ble\ble_s
+ervices\ble_rscs -I..\..\..\..\..\..\components\ble\ble_services\ble_rscs_c -I.
+.\..\..\..\..\..\components\ble\ble_services\ble_tps -I..\..\..\..\..\..\compon
+ents\ble\common -I..\..\..\..\..\..\components\ble\nrf_ble_gatt -I..\..\..\..\.
+
+
+
+ARM Macro Assembler    Page 8 
+
+
+.\..\components\ble\nrf_ble_qwr -I..\..\..\..\..\..\components\ble\peer_manager
+ -I..\..\..\..\..\..\components\boards -I..\..\..\..\..\..\components\libraries
+\atomic -I..\..\..\..\..\..\components\libraries\atomic_fifo -I..\..\..\..\..\.
+.\components\libraries\atomic_flags -I..\..\..\..\..\..\components\libraries\ba
+lloc -I..\..\..\..\..\..\components\libraries\bootloader\ble_dfu -I..\..\..\..\
+..\..\components\libraries\bsp -I..\..\..\..\..\..\components\libraries\button 
+-I..\..\..\..\..\..\components\libraries\cli -I..\..\..\..\..\..\components\lib
+raries\crc16 -I..\..\..\..\..\..\components\libraries\crc32 -I..\..\..\..\..\..
+\components\libraries\crypto -I..\..\..\..\..\..\components\libraries\csense -I
+..\..\..\..\..\..\components\libraries\csense_drv -I..\..\..\..\..\..\component
+s\libraries\delay -I..\..\..\..\..\..\components\libraries\ecc -I..\..\..\..\..
+\..\components\libraries\experimental_section_vars -I..\..\..\..\..\..\componen
+ts\libraries\experimental_task_manager -I..\..\..\..\..\..\components\libraries
+\fds -I..\..\..\..\..\..\components\libraries\fifo -I..\..\..\..\..\..\componen
+ts\libraries\fstorage -I..\..\..\..\..\..\components\libraries\gfx -I..\..\..\.
+.\..\..\components\libraries\gpiote -I..\..\..\..\..\..\components\libraries\ha
+rdfault -I..\..\..\..\..\..\components\libraries\hci -I..\..\..\..\..\..\compon
+ents\libraries\led_softblink -I..\..\..\..\..\..\components\libraries\log -I..\
+..\..\..\..\..\components\libraries\log\src -I..\..\..\..\..\..\components\libr
+aries\low_power_pwm -I..\..\..\..\..\..\components\libraries\mem_manager -I..\.
+.\..\..\..\..\components\libraries\memobj -I..\..\..\..\..\..\components\librar
+ies\mpu -I..\..\..\..\..\..\components\libraries\mutex -I..\..\..\..\..\..\comp
+onents\libraries\pwm -I..\..\..\..\..\..\components\libraries\pwr_mgmt -I..\..\
+..\..\..\..\components\libraries\queue -I..\..\..\..\..\..\components\libraries
+\ringbuf -I..\..\..\..\..\..\components\libraries\scheduler -I..\..\..\..\..\..
+\components\libraries\sdcard -I..\..\..\..\..\..\components\libraries\slip -I..
+\..\..\..\..\..\components\libraries\sortlist -I..\..\..\..\..\..\components\li
+braries\spi_mngr -I..\..\..\..\..\..\components\libraries\stack_guard -I..\..\.
+.\..\..\..\components\libraries\strerror -I..\..\..\..\..\..\components\librari
+es\svc -I..\..\..\..\..\..\components\libraries\timer -I..\..\..\..\..\..\compo
+nents\libraries\twi_mngr -I..\..\..\..\..\..\components\libraries\twi_sensor -I
+..\..\..\..\..\..\components\libraries\uart -I..\..\..\..\..\..\components\libr
+aries\usbd -I..\..\..\..\..\..\components\libraries\usbd\class\audio -I..\..\..
+\..\..\..\components\libraries\usbd\class\cdc -I..\..\..\..\..\..\components\li
+braries\usbd\class\cdc\acm -I..\..\..\..\..\..\components\libraries\usbd\class\
+hid -I..\..\..\..\..\..\components\libraries\usbd\class\hid\generic -I..\..\..\
+..\..\..\components\libraries\usbd\class\hid\kbd -I..\..\..\..\..\..\components
+\libraries\usbd\class\hid\mouse -I..\..\..\..\..\..\components\libraries\usbd\c
+lass\msc -I..\..\..\..\..\..\components\libraries\util -I..\..\..\..\..\..\comp
+onents\nfc\ndef\conn_hand_parser -I..\..\..\..\..\..\components\nfc\ndef\conn_h
+and_parser\ac_rec_parser -I..\..\..\..\..\..\components\nfc\ndef\conn_hand_pars
+er\ble_oob_advdata_parser -I..\..\..\..\..\..\components\nfc\ndef\conn_hand_par
+ser\le_oob_rec_parser -I..\..\..\..\..\..\components\nfc\ndef\connection_handov
+er\ac_rec -I..\..\..\..\..\..\components\nfc\ndef\connection_handover\ble_oob_a
+dvdata -I..\..\..\..\..\..\components\nfc\ndef\connection_handover\ble_pair_lib
+ -I..\..\..\..\..\..\components\nfc\ndef\connection_handover\ble_pair_msg -I..\
+..\..\..\..\..\components\nfc\ndef\connection_handover\common -I..\..\..\..\..\
+..\components\nfc\ndef\connection_handover\ep_oob_rec -I..\..\..\..\..\..\compo
+nents\nfc\ndef\connection_handover\hs_rec -I..\..\..\..\..\..\components\nfc\nd
+ef\connection_handover\le_oob_rec -I..\..\..\..\..\..\components\nfc\ndef\gener
+ic\message -I..\..\..\..\..\..\components\nfc\ndef\generic\record -I..\..\..\..
+\..\..\components\nfc\ndef\launchapp -I..\..\..\..\..\..\components\nfc\ndef\pa
+rser\message -I..\..\..\..\..\..\components\nfc\ndef\parser\record -I..\..\..\.
+.\..\..\components\nfc\ndef\text -I..\..\..\..\..\..\components\nfc\ndef\uri -I
+..\..\..\..\..\..\components\nfc\platform -I..\..\..\..\..\..\components\nfc\t2
+t_lib -I..\..\..\..\..\..\components\nfc\t2t_parser -I..\..\..\..\..\..\compone
+nts\nfc\t4t_lib -I..\..\..\..\..\..\components\nfc\t4t_parser\apdu -I..\..\..\.
+.\..\..\components\nfc\t4t_parser\cc_file -I..\..\..\..\..\..\components\nfc\t4
+t_parser\hl_detection_procedure -I..\..\..\..\..\..\components\nfc\t4t_parser\t
+
+
+
+ARM Macro Assembler    Page 9 
+
+
+lv -I..\..\..\..\..\..\components\softdevice\common -I..\..\..\..\..\..\compone
+nts\softdevice\s132\headers -I..\..\..\..\..\..\components\softdevice\s132\head
+ers\nrf52 -I..\..\..\..\..\..\external\fprintf -I..\..\..\..\..\..\external\seg
+ger_rtt -I..\..\..\..\..\..\external\utf_converter -I..\..\..\..\..\..\integrat
+ion\nrfx -I..\..\..\..\..\..\integration\nrfx\legacy -I..\..\..\..\..\..\module
+s\nrfx -I..\..\..\..\..\..\modules\nrfx\drivers\include -I..\..\..\..\..\..\mod
+ules\nrfx\hal -I..\config -I.\RTE\_nrf52832_xxaa -IC:\Users\Administrator\AppDa
+ta\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include -IC:\Users\Administrator\
+AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\
+Include --predefine="__MICROLIB SETA 1" --predefine="__UVISION_VERSION SETA 530
+" --predefine="_RTE_ SETA 1" --predefine="NRF52832_XXAA SETA 1" --predefine="_R
+TE_ SETA 1" --predefine="APP_TIMER_V2 SETA 1" --predefine="APP_TIMER_V2_RTC1_EN
+ABLED SETA 1" --predefine="BOARD_PCA10040 SETA 1" --predefine="CONFIG_GPIO_AS_P
+INRESET SETA 1" --predefine="FLOAT_ABI_HARD SETA 1" --predefine="NRF52 SETA 1" 
+--predefine="NRF52832_XXAA SETA 1" --predefine="NRF52_PAN_74 SETA 1" --predefin
+e="NRF_SD_BLE_API_VERSION SETA 7" --predefine="S132 SETA 1" --predefine="SOFTDE
+VICE_PRESENT SETA 1" --predefine="__HEAP_SIZE SETA 8192" --predefine="__STACK_S
+IZE SETA 8192" --cpreproc_opts=-DAPP_TIMER_V2,-DAPP_TIMER_V2_RTC1_ENABLED,-DBOA
+RD_PCA10040,-DCONFIG_GPIO_AS_PINRESET,-DFLOAT_ABI_HARD,-DNRF52,-DNRF52832_XXAA,
+-DNRF52_PAN_74,-DNRF_SD_BLE_API_VERSION=7,-DS132,-DSOFTDEVICE_PRESENT,-D__HEAP_
+SIZE=8192,-D__STACK_SIZE=8192 --list=.\_build\arm_startup_nrf52.lst RTE\Device\
+nRF52832_xxAA\arm_startup_nrf52.s
+
+
+
+ARM Macro Assembler    Page 1 Alphabetic symbol ordering
+Relocatable symbols
+
+STACK 00000000
+
+Symbol: STACK
+   Definitions
+      At line 42 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+   Uses
+      None
+Comment: STACK unused
+Stack_Mem 00000000
+
+Symbol: Stack_Mem
+   Definitions
+      At line 43 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+   Uses
+      None
+Comment: Stack_Mem unused
+__initial_sp 00002000
+
+Symbol: __initial_sp
+   Definitions
+      At line 44 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+   Uses
+      At line 69 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+      At line 349 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+
+3 symbols
+
+
+
+ARM Macro Assembler    Page 1 Alphabetic symbol ordering
+Relocatable symbols
+
+HEAP 00000000
+
+Symbol: HEAP
+   Definitions
+      At line 54 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+   Uses
+      None
+Comment: HEAP unused
+Heap_Mem 00000000
+
+Symbol: Heap_Mem
+   Definitions
+      At line 56 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+   Uses
+      None
+Comment: Heap_Mem unused
+__heap_base 00000000
+
+Symbol: __heap_base
+   Definitions
+      At line 55 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+   Uses
+      At line 350 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+Comment: __heap_base used once
+__heap_limit 00002000
+
+Symbol: __heap_limit
+   Definitions
+      At line 57 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+   Uses
+      At line 351 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+Comment: __heap_limit used once
+4 symbols
+
+
+
+ARM Macro Assembler    Page 1 Alphabetic symbol ordering
+Relocatable symbols
+
+RESET 00000000
+
+Symbol: RESET
+   Definitions
+      At line 64 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+   Uses
+      None
+Comment: RESET unused
+__Vectors 00000000
+
+Symbol: __Vectors
+   Definitions
+      At line 69 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+   Uses
+      At line 65 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+      At line 202 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+
+__Vectors_End 00000200
+
+Symbol: __Vectors_End
+   Definitions
+      At line 200 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+   Uses
+      At line 66 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+      At line 202 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+
+3 symbols
+
+
+
+ARM Macro Assembler    Page 1 Alphabetic symbol ordering
+Relocatable symbols
+
+.text 00000000
+
+Symbol: .text
+   Definitions
+      At line 204 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+   Uses
+      None
+Comment: .text unused
+BusFault_Handler 0000000E
+
+Symbol: BusFault_Handler
+   Definitions
+      At line 238 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+   Uses
+      At line 74 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+      At line 239 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+
+CCM_AAR_IRQHandler 0000001A
+
+Symbol: CCM_AAR_IRQHandler
+   Definitions
+      At line 319 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+   Uses
+      At line 102 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+      At line 282 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+
+COMP_LPCOMP_IRQHandler 0000001A
+
+Symbol: COMP_LPCOMP_IRQHandler
+   Definitions
+      At line 323 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+   Uses
+      At line 106 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+      At line 286 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+
+DebugMon_Handler 00000014
+
+Symbol: DebugMon_Handler
+   Definitions
+      At line 252 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+   Uses
+      At line 81 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+      At line 253 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+
+Default_Handler 0000001A
+
+Symbol: Default_Handler
+   Definitions
+      At line 265 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+   Uses
+      None
+Comment: Default_Handler unused
+ECB_IRQHandler 0000001A
+
+Symbol: ECB_IRQHandler
+   Definitions
+      At line 318 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+   Uses
+      At line 101 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+
+
+
+ARM Macro Assembler    Page 2 Alphabetic symbol ordering
+Relocatable symbols
+
+      At line 281 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+
+FPU_IRQHandler 0000001A
+
+Symbol: FPU_IRQHandler
+   Definitions
+      At line 340 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+   Uses
+      At line 125 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+      At line 303 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+
+GPIOTE_IRQHandler 0000001A
+
+Symbol: GPIOTE_IRQHandler
+   Definitions
+      At line 310 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+   Uses
+      At line 93 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+      At line 273 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+
+HardFault_Handler 0000000A
+
+Symbol: HardFault_Handler
+   Definitions
+      At line 228 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+   Uses
+      At line 72 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+      At line 229 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+
+I2S_IRQHandler 0000001A
+
+Symbol: I2S_IRQHandler
+   Definitions
+      At line 339 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+   Uses
+      At line 124 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+      At line 302 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+
+MWU_IRQHandler 0000001A
+
+Symbol: MWU_IRQHandler
+   Definitions
+      At line 334 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+   Uses
+      At line 119 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+      At line 297 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+
+MemoryManagement_Handler 0000000C
+
+Symbol: MemoryManagement_Handler
+   Definitions
+      At line 233 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+   Uses
+      At line 73 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+      At line 234 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+
+NFCT_IRQHandler 0000001A
+
+Symbol: NFCT_IRQHandler
+
+
+
+ARM Macro Assembler    Page 3 Alphabetic symbol ordering
+Relocatable symbols
+
+   Definitions
+      At line 309 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+   Uses
+      At line 92 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+      At line 272 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+
+NMI_Handler 00000008
+
+Symbol: NMI_Handler
+   Definitions
+      At line 223 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+   Uses
+      At line 71 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+      At line 224 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+
+PDM_IRQHandler 0000001A
+
+Symbol: PDM_IRQHandler
+   Definitions
+      At line 333 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+   Uses
+      At line 116 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+      At line 296 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+
+POWER_CLOCK_IRQHandler 0000001A
+
+Symbol: POWER_CLOCK_IRQHandler
+   Definitions
+      At line 304 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+   Uses
+      At line 87 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+      At line 267 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+
+PWM0_IRQHandler 0000001A
+
+Symbol: PWM0_IRQHandler
+   Definitions
+      At line 332 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+   Uses
+      At line 115 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+      At line 295 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+
+PWM1_IRQHandler 0000001A
+
+Symbol: PWM1_IRQHandler
+   Definitions
+      At line 335 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+   Uses
+      At line 120 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+      At line 298 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+
+PWM2_IRQHandler 0000001A
+
+Symbol: PWM2_IRQHandler
+   Definitions
+      At line 336 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+   Uses
+      At line 121 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+      At line 299 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+
+
+
+ARM Macro Assembler    Page 4 Alphabetic symbol ordering
+Relocatable symbols
+
+
+PendSV_Handler 00000016
+
+Symbol: PendSV_Handler
+   Definitions
+      At line 256 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+   Uses
+      At line 83 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+      At line 257 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+
+QDEC_IRQHandler 0000001A
+
+Symbol: QDEC_IRQHandler
+   Definitions
+      At line 322 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+   Uses
+      At line 105 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+      At line 285 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+
+RADIO_IRQHandler 0000001A
+
+Symbol: RADIO_IRQHandler
+   Definitions
+      At line 305 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+   Uses
+      At line 88 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+      At line 268 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+
+RNG_IRQHandler 0000001A
+
+Symbol: RNG_IRQHandler
+   Definitions
+      At line 317 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+   Uses
+      At line 100 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+      At line 280 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+
+RTC0_IRQHandler 0000001A
+
+Symbol: RTC0_IRQHandler
+   Definitions
+      At line 315 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+   Uses
+      At line 98 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+      At line 278 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+
+RTC1_IRQHandler 0000001A
+
+Symbol: RTC1_IRQHandler
+   Definitions
+      At line 321 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+   Uses
+      At line 104 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+      At line 284 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+
+RTC2_IRQHandler 0000001A
+
+Symbol: RTC2_IRQHandler
+   Definitions
+
+
+
+ARM Macro Assembler    Page 5 Alphabetic symbol ordering
+Relocatable symbols
+
+      At line 338 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+   Uses
+      At line 123 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+      At line 301 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+
+Reset_Handler 00000000
+
+Symbol: Reset_Handler
+   Definitions
+      At line 209 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+   Uses
+      At line 70 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+      At line 210 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+
+SAADC_IRQHandler 0000001A
+
+Symbol: SAADC_IRQHandler
+   Definitions
+      At line 311 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+   Uses
+      At line 94 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+      At line 274 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+
+SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler 0000001A
+
+Symbol: SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0_IRQHandler
+   Definitions
+      At line 307 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+   Uses
+      At line 90 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+      At line 270 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+
+SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler 0000001A
+
+Symbol: SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1_IRQHandler
+   Definitions
+      At line 308 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+   Uses
+      At line 91 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+      At line 271 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+
+SPIM2_SPIS2_SPI2_IRQHandler 0000001A
+
+Symbol: SPIM2_SPIS2_SPI2_IRQHandler
+   Definitions
+      At line 337 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+   Uses
+      At line 122 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+      At line 300 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+
+SVC_Handler 00000012
+
+Symbol: SVC_Handler
+   Definitions
+      At line 247 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+   Uses
+      At line 80 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+      At line 248 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+
+
+
+
+ARM Macro Assembler    Page 6 Alphabetic symbol ordering
+Relocatable symbols
+
+SWI0_EGU0_IRQHandler 0000001A
+
+Symbol: SWI0_EGU0_IRQHandler
+   Definitions
+      At line 324 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+   Uses
+      At line 107 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+      At line 287 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+
+SWI1_EGU1_IRQHandler 0000001A
+
+Symbol: SWI1_EGU1_IRQHandler
+   Definitions
+      At line 325 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+   Uses
+      At line 108 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+      At line 288 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+
+SWI2_EGU2_IRQHandler 0000001A
+
+Symbol: SWI2_EGU2_IRQHandler
+   Definitions
+      At line 326 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+   Uses
+      At line 109 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+      At line 289 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+
+SWI3_EGU3_IRQHandler 0000001A
+
+Symbol: SWI3_EGU3_IRQHandler
+   Definitions
+      At line 327 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+   Uses
+      At line 110 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+      At line 290 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+
+SWI4_EGU4_IRQHandler 0000001A
+
+Symbol: SWI4_EGU4_IRQHandler
+   Definitions
+      At line 328 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+   Uses
+      At line 111 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+      At line 291 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+
+SWI5_EGU5_IRQHandler 0000001A
+
+Symbol: SWI5_EGU5_IRQHandler
+   Definitions
+      At line 329 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+   Uses
+      At line 112 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+      At line 292 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+
+SysTick_Handler 00000018
+
+Symbol: SysTick_Handler
+   Definitions
+      At line 260 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+
+
+
+ARM Macro Assembler    Page 7 Alphabetic symbol ordering
+Relocatable symbols
+
+   Uses
+      At line 84 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+      At line 261 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+
+TEMP_IRQHandler 0000001A
+
+Symbol: TEMP_IRQHandler
+   Definitions
+      At line 316 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+   Uses
+      At line 99 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+      At line 279 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+
+TIMER0_IRQHandler 0000001A
+
+Symbol: TIMER0_IRQHandler
+   Definitions
+      At line 312 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+   Uses
+      At line 95 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+      At line 275 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+
+TIMER1_IRQHandler 0000001A
+
+Symbol: TIMER1_IRQHandler
+   Definitions
+      At line 313 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+   Uses
+      At line 96 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+      At line 276 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+
+TIMER2_IRQHandler 0000001A
+
+Symbol: TIMER2_IRQHandler
+   Definitions
+      At line 314 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+   Uses
+      At line 97 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+      At line 277 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+
+TIMER3_IRQHandler 0000001A
+
+Symbol: TIMER3_IRQHandler
+   Definitions
+      At line 330 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+   Uses
+      At line 113 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+      At line 293 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+
+TIMER4_IRQHandler 0000001A
+
+Symbol: TIMER4_IRQHandler
+   Definitions
+      At line 331 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+   Uses
+      At line 114 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+      At line 294 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+
+UARTE0_UART0_IRQHandler 0000001A
+
+
+
+ARM Macro Assembler    Page 8 Alphabetic symbol ordering
+Relocatable symbols
+
+
+Symbol: UARTE0_UART0_IRQHandler
+   Definitions
+      At line 306 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+   Uses
+      At line 89 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+      At line 269 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+
+UsageFault_Handler 00000010
+
+Symbol: UsageFault_Handler
+   Definitions
+      At line 243 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+   Uses
+      At line 75 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+      At line 244 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+
+WDT_IRQHandler 0000001A
+
+Symbol: WDT_IRQHandler
+   Definitions
+      At line 320 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+   Uses
+      At line 103 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+      At line 283 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+
+49 symbols
+
+
+
+ARM Macro Assembler    Page 1 Alphabetic symbol ordering
+Absolute symbols
+
+Heap_Size 00002000
+
+Symbol: Heap_Size
+   Definitions
+      At line 49 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+   Uses
+      At line 56 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+Comment: Heap_Size used once
+Stack_Align 00000003
+
+Symbol: Stack_Align
+   Definitions
+      At line 39 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+   Uses
+      At line 42 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+Comment: Stack_Align used once
+Stack_Size 00002000
+
+Symbol: Stack_Size
+   Definitions
+      At line 31 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+   Uses
+      At line 43 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+Comment: Stack_Size used once
+__Vectors_Size 00000200
+
+Symbol: __Vectors_Size
+   Definitions
+      At line 202 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+   Uses
+      At line 67 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+Comment: __Vectors_Size used once
+4 symbols
+
+
+
+ARM Macro Assembler    Page 1 Alphabetic symbol ordering
+External symbols
+
+SystemInit 00000000
+
+Symbol: SystemInit
+   Definitions
+      At line 211 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+   Uses
+      At line 215 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+Comment: SystemInit used once
+__main 00000000
+
+Symbol: __main
+   Definitions
+      At line 212 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+   Uses
+      At line 217 in file RTE\Device\nRF52832_xxAA\arm_startup_nrf52.s
+Comment: __main used once
+2 symbols
+422 symbols in table

smart_shoes/nRF5_SDK_17.0.0_9d13099/examples/Shoes_just_traj_20201208/ble_app_uart_03_link_PC/pca10040/s132/arm5_no_packs/_build/ble_advdata.d

@@ -0,0 +1,40 @@
+.\_build\ble_advdata.o: ..\..\..\..\..\..\components\ble\common\ble_advdata.c
+.\_build\ble_advdata.o: ..\..\..\..\..\..\components\ble\common\ble_advdata.h
+.\_build\ble_advdata.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdint.h
+.\_build\ble_advdata.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdbool.h
+.\_build\ble_advdata.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\string.h
+.\_build\ble_advdata.o: ..\..\..\..\..\..\components\softdevice\s132\headers\ble.h
+.\_build\ble_advdata.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf_svc.h
+.\_build\ble_advdata.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf_error.h
+.\_build\ble_advdata.o: ..\..\..\..\..\..\components\softdevice\s132\headers\ble_err.h
+.\_build\ble_advdata.o: ..\..\..\..\..\..\components\softdevice\s132\headers\ble_gap.h
+.\_build\ble_advdata.o: ..\..\..\..\..\..\components\softdevice\s132\headers\ble_hci.h
+.\_build\ble_advdata.o: ..\..\..\..\..\..\components\softdevice\s132\headers\ble_ranges.h
+.\_build\ble_advdata.o: ..\..\..\..\..\..\components\softdevice\s132\headers\ble_types.h
+.\_build\ble_advdata.o: ..\..\..\..\..\..\components\softdevice\s132\headers\ble_l2cap.h
+.\_build\ble_advdata.o: ..\..\..\..\..\..\components\softdevice\s132\headers\ble_gatt.h
+.\_build\ble_advdata.o: ..\..\..\..\..\..\components\softdevice\s132\headers\ble_gattc.h
+.\_build\ble_advdata.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf.h
+.\_build\ble_advdata.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf52.h
+.\_build\ble_advdata.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\core_cm4.h
+.\_build\ble_advdata.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\cmsis_version.h
+.\_build\ble_advdata.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\cmsis_compiler.h
+.\_build\ble_advdata.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\cmsis_armcc.h
+.\_build\ble_advdata.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\mpu_armv7.h
+.\_build\ble_advdata.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\system_nrf52.h
+.\_build\ble_advdata.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf52_bitfields.h
+.\_build\ble_advdata.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf51_to_nrf52.h
+.\_build\ble_advdata.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf52_name_change.h
+.\_build\ble_advdata.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\compiler_abstraction.h
+.\_build\ble_advdata.o: ..\..\..\..\..\..\components\softdevice\s132\headers\ble_gatts.h
+.\_build\ble_advdata.o: ..\..\..\..\..\..\components\libraries\util\sdk_common.h
+.\_build\ble_advdata.o: ..\config\sdk_config.h
+.\_build\ble_advdata.o: ..\..\..\..\..\..\components\libraries\util\nordic_common.h
+.\_build\ble_advdata.o: ..\..\..\..\..\..\components\libraries\util\sdk_os.h
+.\_build\ble_advdata.o: ..\..\..\..\..\..\components\libraries\util\sdk_errors.h
+.\_build\ble_advdata.o: ..\..\..\..\..\..\components\libraries\util\app_util.h
+.\_build\ble_advdata.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stddef.h
+.\_build\ble_advdata.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf52\nrf_mbr.h
+.\_build\ble_advdata.o: ..\..\..\..\..\..\components\libraries\util\sdk_macros.h
+.\_build\ble_advdata.o: ..\..\..\..\..\..\components\libraries\util\nrf_assert.h
+.\_build\ble_advdata.o: ..\..\..\..\..\..\components\ble\common\ble_srv_common.h

smart_shoes/nRF5_SDK_17.0.0_9d13099/examples/Shoes_just_traj_20201208/ble_app_uart_03_link_PC/pca10040/s132/arm5_no_packs/_build/ble_advertising.d

@@ -0,0 +1,50 @@
+.\_build\ble_advertising.o: ..\..\..\..\..\..\components\ble\ble_advertising\ble_advertising.c
+.\_build\ble_advertising.o: ..\..\..\..\..\..\components\libraries\util\sdk_common.h
+.\_build\ble_advertising.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdint.h
+.\_build\ble_advertising.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdbool.h
+.\_build\ble_advertising.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\string.h
+.\_build\ble_advertising.o: ..\config\sdk_config.h
+.\_build\ble_advertising.o: ..\..\..\..\..\..\components\libraries\util\nordic_common.h
+.\_build\ble_advertising.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\compiler_abstraction.h
+.\_build\ble_advertising.o: ..\..\..\..\..\..\components\libraries\util\sdk_os.h
+.\_build\ble_advertising.o: ..\..\..\..\..\..\components\libraries\util\sdk_errors.h
+.\_build\ble_advertising.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf_error.h
+.\_build\ble_advertising.o: ..\..\..\..\..\..\components\libraries\util\app_util.h
+.\_build\ble_advertising.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stddef.h
+.\_build\ble_advertising.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf.h
+.\_build\ble_advertising.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf52.h
+.\_build\ble_advertising.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\core_cm4.h
+.\_build\ble_advertising.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\cmsis_version.h
+.\_build\ble_advertising.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\cmsis_compiler.h
+.\_build\ble_advertising.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\cmsis_armcc.h
+.\_build\ble_advertising.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\mpu_armv7.h
+.\_build\ble_advertising.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\system_nrf52.h
+.\_build\ble_advertising.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf52_bitfields.h
+.\_build\ble_advertising.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf51_to_nrf52.h
+.\_build\ble_advertising.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf52_name_change.h
+.\_build\ble_advertising.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf52\nrf_mbr.h
+.\_build\ble_advertising.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf_svc.h
+.\_build\ble_advertising.o: ..\..\..\..\..\..\components\libraries\util\sdk_macros.h
+.\_build\ble_advertising.o: ..\..\..\..\..\..\components\libraries\util\nrf_assert.h
+.\_build\ble_advertising.o: ..\..\..\..\..\..\components\ble\common\ble_advdata.h
+.\_build\ble_advertising.o: ..\..\..\..\..\..\components\softdevice\s132\headers\ble.h
+.\_build\ble_advertising.o: ..\..\..\..\..\..\components\softdevice\s132\headers\ble_err.h
+.\_build\ble_advertising.o: ..\..\..\..\..\..\components\softdevice\s132\headers\ble_gap.h
+.\_build\ble_advertising.o: ..\..\..\..\..\..\components\softdevice\s132\headers\ble_hci.h
+.\_build\ble_advertising.o: ..\..\..\..\..\..\components\softdevice\s132\headers\ble_ranges.h
+.\_build\ble_advertising.o: ..\..\..\..\..\..\components\softdevice\s132\headers\ble_types.h
+.\_build\ble_advertising.o: ..\..\..\..\..\..\components\softdevice\s132\headers\ble_l2cap.h
+.\_build\ble_advertising.o: ..\..\..\..\..\..\components\softdevice\s132\headers\ble_gatt.h
+.\_build\ble_advertising.o: ..\..\..\..\..\..\components\softdevice\s132\headers\ble_gattc.h
+.\_build\ble_advertising.o: ..\..\..\..\..\..\components\softdevice\s132\headers\ble_gatts.h
+.\_build\ble_advertising.o: ..\..\..\..\..\..\components\ble\ble_advertising\ble_advertising.h
+.\_build\ble_advertising.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf_soc.h
+.\_build\ble_advertising.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf_error_soc.h
+.\_build\ble_advertising.o: ..\..\..\..\..\..\components\libraries\log\nrf_log.h
+.\_build\ble_advertising.o: ..\..\..\..\..\..\components\libraries\experimental_section_vars\nrf_section.h
+.\_build\ble_advertising.o: ..\..\..\..\..\..\components\libraries\strerror\nrf_strerror.h
+.\_build\ble_advertising.o: ..\..\..\..\..\..\components\libraries\log\src\nrf_log_internal.h
+.\_build\ble_advertising.o: ..\..\..\..\..\..\components\libraries\log\nrf_log_instance.h
+.\_build\ble_advertising.o: ..\..\..\..\..\..\components\libraries\log\nrf_log_types.h
+.\_build\ble_advertising.o: ..\..\..\..\..\..\components\softdevice\common\nrf_sdh_ble.h
+.\_build\ble_advertising.o: ..\..\..\..\..\..\components\libraries\experimental_section_vars\nrf_section_iter.h

smart_shoes/nRF5_SDK_17.0.0_9d13099/examples/Shoes_just_traj_20201208/ble_app_uart_03_link_PC/pca10040/s132/arm5_no_packs/_build/ble_conn_params.d

@@ -0,0 +1,53 @@
+.\_build\ble_conn_params.o: ..\..\..\..\..\..\components\ble\common\ble_conn_params.c
+.\_build\ble_conn_params.o: ..\..\..\..\..\..\components\libraries\util\sdk_common.h
+.\_build\ble_conn_params.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdint.h
+.\_build\ble_conn_params.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdbool.h
+.\_build\ble_conn_params.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\string.h
+.\_build\ble_conn_params.o: ..\config\sdk_config.h
+.\_build\ble_conn_params.o: ..\..\..\..\..\..\components\libraries\util\nordic_common.h
+.\_build\ble_conn_params.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\compiler_abstraction.h
+.\_build\ble_conn_params.o: ..\..\..\..\..\..\components\libraries\util\sdk_os.h
+.\_build\ble_conn_params.o: ..\..\..\..\..\..\components\libraries\util\sdk_errors.h
+.\_build\ble_conn_params.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf_error.h
+.\_build\ble_conn_params.o: ..\..\..\..\..\..\components\libraries\util\app_util.h
+.\_build\ble_conn_params.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stddef.h
+.\_build\ble_conn_params.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf.h
+.\_build\ble_conn_params.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf52.h
+.\_build\ble_conn_params.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\core_cm4.h
+.\_build\ble_conn_params.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\cmsis_version.h
+.\_build\ble_conn_params.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\cmsis_compiler.h
+.\_build\ble_conn_params.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\cmsis_armcc.h
+.\_build\ble_conn_params.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\mpu_armv7.h
+.\_build\ble_conn_params.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\system_nrf52.h
+.\_build\ble_conn_params.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf52_bitfields.h
+.\_build\ble_conn_params.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf51_to_nrf52.h
+.\_build\ble_conn_params.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf52_name_change.h
+.\_build\ble_conn_params.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf52\nrf_mbr.h
+.\_build\ble_conn_params.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf_svc.h
+.\_build\ble_conn_params.o: ..\..\..\..\..\..\components\libraries\util\sdk_macros.h
+.\_build\ble_conn_params.o: ..\..\..\..\..\..\components\libraries\util\nrf_assert.h
+.\_build\ble_conn_params.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdlib.h
+.\_build\ble_conn_params.o: ..\..\..\..\..\..\components\softdevice\s132\headers\ble_hci.h
+.\_build\ble_conn_params.o: ..\..\..\..\..\..\components\softdevice\s132\headers\ble_err.h
+.\_build\ble_conn_params.o: ..\..\..\..\..\..\components\ble\common\ble_conn_params.h
+.\_build\ble_conn_params.o: ..\..\..\..\..\..\components\softdevice\s132\headers\ble.h
+.\_build\ble_conn_params.o: ..\..\..\..\..\..\components\softdevice\s132\headers\ble_gap.h
+.\_build\ble_conn_params.o: ..\..\..\..\..\..\components\softdevice\s132\headers\ble_ranges.h
+.\_build\ble_conn_params.o: ..\..\..\..\..\..\components\softdevice\s132\headers\ble_types.h
+.\_build\ble_conn_params.o: ..\..\..\..\..\..\components\softdevice\s132\headers\ble_l2cap.h
+.\_build\ble_conn_params.o: ..\..\..\..\..\..\components\softdevice\s132\headers\ble_gatt.h
+.\_build\ble_conn_params.o: ..\..\..\..\..\..\components\softdevice\s132\headers\ble_gattc.h
+.\_build\ble_conn_params.o: ..\..\..\..\..\..\components\softdevice\s132\headers\ble_gatts.h
+.\_build\ble_conn_params.o: ..\..\..\..\..\..\components\ble\common\ble_srv_common.h
+.\_build\ble_conn_params.o: ..\..\..\..\..\..\components\ble\common\ble_conn_state.h
+.\_build\ble_conn_params.o: ..\..\..\..\..\..\components\libraries\atomic\nrf_atomic.h
+.\_build\ble_conn_params.o: ..\..\..\..\..\..\components\softdevice\common\nrf_sdh_ble.h
+.\_build\ble_conn_params.o: ..\..\..\..\..\..\components\libraries\experimental_section_vars\nrf_section_iter.h
+.\_build\ble_conn_params.o: ..\..\..\..\..\..\components\libraries\experimental_section_vars\nrf_section.h
+.\_build\ble_conn_params.o: ..\..\..\..\..\..\components\libraries\timer\app_timer.h
+.\_build\ble_conn_params.o: ..\..\..\..\..\..\components\libraries\util\app_error.h
+.\_build\ble_conn_params.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdio.h
+.\_build\ble_conn_params.o: ..\..\..\..\..\..\components\libraries\util\app_error_weak.h
+.\_build\ble_conn_params.o: ..\..\..\..\..\..\components\libraries\log\nrf_log_instance.h
+.\_build\ble_conn_params.o: ..\..\..\..\..\..\components\libraries\log\nrf_log_types.h
+.\_build\ble_conn_params.o: ..\..\..\..\..\..\components\libraries\sortlist\nrf_sortlist.h

smart_shoes/nRF5_SDK_17.0.0_9d13099/examples/Shoes_just_traj_20201208/ble_app_uart_03_link_PC/pca10040/s132/arm5_no_packs/_build/ble_conn_state.d

@@ -0,0 +1,51 @@
+.\_build\ble_conn_state.o: ..\..\..\..\..\..\components\ble\common\ble_conn_state.c
+.\_build\ble_conn_state.o: ..\..\..\..\..\..\components\ble\common\ble_conn_state.h
+.\_build\ble_conn_state.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdbool.h
+.\_build\ble_conn_state.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdint.h
+.\_build\ble_conn_state.o: ..\..\..\..\..\..\components\softdevice\s132\headers\ble.h
+.\_build\ble_conn_state.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf_svc.h
+.\_build\ble_conn_state.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf_error.h
+.\_build\ble_conn_state.o: ..\..\..\..\..\..\components\softdevice\s132\headers\ble_err.h
+.\_build\ble_conn_state.o: ..\..\..\..\..\..\components\softdevice\s132\headers\ble_gap.h
+.\_build\ble_conn_state.o: ..\..\..\..\..\..\components\softdevice\s132\headers\ble_hci.h
+.\_build\ble_conn_state.o: ..\..\..\..\..\..\components\softdevice\s132\headers\ble_ranges.h
+.\_build\ble_conn_state.o: ..\..\..\..\..\..\components\softdevice\s132\headers\ble_types.h
+.\_build\ble_conn_state.o: ..\..\..\..\..\..\components\softdevice\s132\headers\ble_l2cap.h
+.\_build\ble_conn_state.o: ..\..\..\..\..\..\components\softdevice\s132\headers\ble_gatt.h
+.\_build\ble_conn_state.o: ..\..\..\..\..\..\components\softdevice\s132\headers\ble_gattc.h
+.\_build\ble_conn_state.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf.h
+.\_build\ble_conn_state.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf52.h
+.\_build\ble_conn_state.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\core_cm4.h
+.\_build\ble_conn_state.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\cmsis_version.h
+.\_build\ble_conn_state.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\cmsis_compiler.h
+.\_build\ble_conn_state.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\cmsis_armcc.h
+.\_build\ble_conn_state.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\mpu_armv7.h
+.\_build\ble_conn_state.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\system_nrf52.h
+.\_build\ble_conn_state.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf52_bitfields.h
+.\_build\ble_conn_state.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf51_to_nrf52.h
+.\_build\ble_conn_state.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf52_name_change.h
+.\_build\ble_conn_state.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\compiler_abstraction.h
+.\_build\ble_conn_state.o: ..\..\..\..\..\..\components\softdevice\s132\headers\ble_gatts.h
+.\_build\ble_conn_state.o: ..\..\..\..\..\..\components\libraries\atomic\nrf_atomic.h
+.\_build\ble_conn_state.o: ..\..\..\..\..\..\components\libraries\util\sdk_common.h
+.\_build\ble_conn_state.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\string.h
+.\_build\ble_conn_state.o: ..\config\sdk_config.h
+.\_build\ble_conn_state.o: ..\..\..\..\..\..\components\libraries\util\nordic_common.h
+.\_build\ble_conn_state.o: ..\..\..\..\..\..\components\libraries\util\sdk_os.h
+.\_build\ble_conn_state.o: ..\..\..\..\..\..\components\libraries\util\sdk_errors.h
+.\_build\ble_conn_state.o: ..\..\..\..\..\..\components\libraries\util\app_util.h
+.\_build\ble_conn_state.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stddef.h
+.\_build\ble_conn_state.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf52\nrf_mbr.h
+.\_build\ble_conn_state.o: ..\..\..\..\..\..\components\libraries\util\sdk_macros.h
+.\_build\ble_conn_state.o: ..\..\..\..\..\..\components\libraries\util\nrf_assert.h
+.\_build\ble_conn_state.o: ..\..\..\..\..\..\components\libraries\atomic_flags\nrf_atflags.h
+.\_build\ble_conn_state.o: ..\..\..\..\..\..\components\libraries\util\app_error.h
+.\_build\ble_conn_state.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdio.h
+.\_build\ble_conn_state.o: ..\..\..\..\..\..\components\libraries\util\app_error_weak.h
+.\_build\ble_conn_state.o: ..\..\..\..\..\..\components\softdevice\common\nrf_sdh_ble.h
+.\_build\ble_conn_state.o: ..\..\..\..\..\..\components\libraries\experimental_section_vars\nrf_section_iter.h
+.\_build\ble_conn_state.o: ..\..\..\..\..\..\components\libraries\experimental_section_vars\nrf_section.h
+.\_build\ble_conn_state.o: ..\..\..\..\..\..\components\libraries\util\app_util_platform.h
+.\_build\ble_conn_state.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf_soc.h
+.\_build\ble_conn_state.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf_error_soc.h
+.\_build\ble_conn_state.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf_nvic.h

smart_shoes/nRF5_SDK_17.0.0_9d13099/examples/Shoes_just_traj_20201208/ble_app_uart_03_link_PC/pca10040/s132/arm5_no_packs/_build/ble_link_ctx_manager.d

@@ -0,0 +1,41 @@
+.\_build\ble_link_ctx_manager.o: ..\..\..\..\..\..\components\ble\ble_link_ctx_manager\ble_link_ctx_manager.c
+.\_build\ble_link_ctx_manager.o: ..\..\..\..\..\..\components\ble\ble_link_ctx_manager\ble_link_ctx_manager.h
+.\_build\ble_link_ctx_manager.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdint.h
+.\_build\ble_link_ctx_manager.o: ..\..\..\..\..\..\components\ble\common\ble_conn_state.h
+.\_build\ble_link_ctx_manager.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdbool.h
+.\_build\ble_link_ctx_manager.o: ..\..\..\..\..\..\components\softdevice\s132\headers\ble.h
+.\_build\ble_link_ctx_manager.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf_svc.h
+.\_build\ble_link_ctx_manager.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf_error.h
+.\_build\ble_link_ctx_manager.o: ..\..\..\..\..\..\components\softdevice\s132\headers\ble_err.h
+.\_build\ble_link_ctx_manager.o: ..\..\..\..\..\..\components\softdevice\s132\headers\ble_gap.h
+.\_build\ble_link_ctx_manager.o: ..\..\..\..\..\..\components\softdevice\s132\headers\ble_hci.h
+.\_build\ble_link_ctx_manager.o: ..\..\..\..\..\..\components\softdevice\s132\headers\ble_ranges.h
+.\_build\ble_link_ctx_manager.o: ..\..\..\..\..\..\components\softdevice\s132\headers\ble_types.h
+.\_build\ble_link_ctx_manager.o: ..\..\..\..\..\..\components\softdevice\s132\headers\ble_l2cap.h
+.\_build\ble_link_ctx_manager.o: ..\..\..\..\..\..\components\softdevice\s132\headers\ble_gatt.h
+.\_build\ble_link_ctx_manager.o: ..\..\..\..\..\..\components\softdevice\s132\headers\ble_gattc.h
+.\_build\ble_link_ctx_manager.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf.h
+.\_build\ble_link_ctx_manager.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf52.h
+.\_build\ble_link_ctx_manager.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\core_cm4.h
+.\_build\ble_link_ctx_manager.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\cmsis_version.h
+.\_build\ble_link_ctx_manager.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\cmsis_compiler.h
+.\_build\ble_link_ctx_manager.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\cmsis_armcc.h
+.\_build\ble_link_ctx_manager.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\mpu_armv7.h
+.\_build\ble_link_ctx_manager.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\system_nrf52.h
+.\_build\ble_link_ctx_manager.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf52_bitfields.h
+.\_build\ble_link_ctx_manager.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf51_to_nrf52.h
+.\_build\ble_link_ctx_manager.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf52_name_change.h
+.\_build\ble_link_ctx_manager.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\compiler_abstraction.h
+.\_build\ble_link_ctx_manager.o: ..\..\..\..\..\..\components\softdevice\s132\headers\ble_gatts.h
+.\_build\ble_link_ctx_manager.o: ..\..\..\..\..\..\components\libraries\atomic\nrf_atomic.h
+.\_build\ble_link_ctx_manager.o: ..\..\..\..\..\..\components\libraries\util\sdk_common.h
+.\_build\ble_link_ctx_manager.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\string.h
+.\_build\ble_link_ctx_manager.o: ..\config\sdk_config.h
+.\_build\ble_link_ctx_manager.o: ..\..\..\..\..\..\components\libraries\util\nordic_common.h
+.\_build\ble_link_ctx_manager.o: ..\..\..\..\..\..\components\libraries\util\sdk_os.h
+.\_build\ble_link_ctx_manager.o: ..\..\..\..\..\..\components\libraries\util\sdk_errors.h
+.\_build\ble_link_ctx_manager.o: ..\..\..\..\..\..\components\libraries\util\app_util.h
+.\_build\ble_link_ctx_manager.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stddef.h
+.\_build\ble_link_ctx_manager.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf52\nrf_mbr.h
+.\_build\ble_link_ctx_manager.o: ..\..\..\..\..\..\components\libraries\util\sdk_macros.h
+.\_build\ble_link_ctx_manager.o: ..\..\..\..\..\..\components\libraries\util\nrf_assert.h

smart_shoes/nRF5_SDK_17.0.0_9d13099/examples/Shoes_just_traj_20201208/ble_app_uart_03_link_PC/pca10040/s132/arm5_no_packs/_build/ble_nus.d

@@ -0,0 +1,51 @@
+.\_build\ble_nus.o: ..\..\..\..\..\..\components\ble\ble_services\ble_nus\ble_nus.c
+.\_build\ble_nus.o: ..\..\..\..\..\..\components\libraries\util\sdk_common.h
+.\_build\ble_nus.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdint.h
+.\_build\ble_nus.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdbool.h
+.\_build\ble_nus.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\string.h
+.\_build\ble_nus.o: ..\config\sdk_config.h
+.\_build\ble_nus.o: ..\..\..\..\..\..\components\libraries\util\nordic_common.h
+.\_build\ble_nus.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\compiler_abstraction.h
+.\_build\ble_nus.o: ..\..\..\..\..\..\components\libraries\util\sdk_os.h
+.\_build\ble_nus.o: ..\..\..\..\..\..\components\libraries\util\sdk_errors.h
+.\_build\ble_nus.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf_error.h
+.\_build\ble_nus.o: ..\..\..\..\..\..\components\libraries\util\app_util.h
+.\_build\ble_nus.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stddef.h
+.\_build\ble_nus.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf.h
+.\_build\ble_nus.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf52.h
+.\_build\ble_nus.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\core_cm4.h
+.\_build\ble_nus.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\cmsis_version.h
+.\_build\ble_nus.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\cmsis_compiler.h
+.\_build\ble_nus.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\cmsis_armcc.h
+.\_build\ble_nus.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\mpu_armv7.h
+.\_build\ble_nus.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\system_nrf52.h
+.\_build\ble_nus.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf52_bitfields.h
+.\_build\ble_nus.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf51_to_nrf52.h
+.\_build\ble_nus.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf52_name_change.h
+.\_build\ble_nus.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf52\nrf_mbr.h
+.\_build\ble_nus.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf_svc.h
+.\_build\ble_nus.o: ..\..\..\..\..\..\components\libraries\util\sdk_macros.h
+.\_build\ble_nus.o: ..\..\..\..\..\..\components\libraries\util\nrf_assert.h
+.\_build\ble_nus.o: ..\..\..\..\..\..\components\softdevice\s132\headers\ble.h
+.\_build\ble_nus.o: ..\..\..\..\..\..\components\softdevice\s132\headers\ble_err.h
+.\_build\ble_nus.o: ..\..\..\..\..\..\components\softdevice\s132\headers\ble_gap.h
+.\_build\ble_nus.o: ..\..\..\..\..\..\components\softdevice\s132\headers\ble_hci.h
+.\_build\ble_nus.o: ..\..\..\..\..\..\components\softdevice\s132\headers\ble_ranges.h
+.\_build\ble_nus.o: ..\..\..\..\..\..\components\softdevice\s132\headers\ble_types.h
+.\_build\ble_nus.o: ..\..\..\..\..\..\components\softdevice\s132\headers\ble_l2cap.h
+.\_build\ble_nus.o: ..\..\..\..\..\..\components\softdevice\s132\headers\ble_gatt.h
+.\_build\ble_nus.o: ..\..\..\..\..\..\components\softdevice\s132\headers\ble_gattc.h
+.\_build\ble_nus.o: ..\..\..\..\..\..\components\softdevice\s132\headers\ble_gatts.h
+.\_build\ble_nus.o: ..\..\..\..\..\..\components\ble\ble_services\ble_nus\ble_nus.h
+.\_build\ble_nus.o: ..\..\..\..\..\..\components\ble\common\ble_srv_common.h
+.\_build\ble_nus.o: ..\..\..\..\..\..\components\softdevice\common\nrf_sdh_ble.h
+.\_build\ble_nus.o: ..\..\..\..\..\..\components\libraries\experimental_section_vars\nrf_section_iter.h
+.\_build\ble_nus.o: ..\..\..\..\..\..\components\libraries\experimental_section_vars\nrf_section.h
+.\_build\ble_nus.o: ..\..\..\..\..\..\components\ble\ble_link_ctx_manager\ble_link_ctx_manager.h
+.\_build\ble_nus.o: ..\..\..\..\..\..\components\ble\common\ble_conn_state.h
+.\_build\ble_nus.o: ..\..\..\..\..\..\components\libraries\atomic\nrf_atomic.h
+.\_build\ble_nus.o: ..\..\..\..\..\..\components\libraries\log\nrf_log.h
+.\_build\ble_nus.o: ..\..\..\..\..\..\components\libraries\strerror\nrf_strerror.h
+.\_build\ble_nus.o: ..\..\..\..\..\..\components\libraries\log\src\nrf_log_internal.h
+.\_build\ble_nus.o: ..\..\..\..\..\..\components\libraries\log\nrf_log_instance.h
+.\_build\ble_nus.o: ..\..\..\..\..\..\components\libraries\log\nrf_log_types.h

smart_shoes/nRF5_SDK_17.0.0_9d13099/examples/Shoes_just_traj_20201208/ble_app_uart_03_link_PC/pca10040/s132/arm5_no_packs/_build/ble_srv_common.d

@@ -0,0 +1,37 @@
+.\_build\ble_srv_common.o: ..\..\..\..\..\..\components\ble\common\ble_srv_common.c
+.\_build\ble_srv_common.o: ..\..\..\..\..\..\components\ble\common\ble_srv_common.h
+.\_build\ble_srv_common.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdint.h
+.\_build\ble_srv_common.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdbool.h
+.\_build\ble_srv_common.o: ..\..\..\..\..\..\components\softdevice\s132\headers\ble_types.h
+.\_build\ble_srv_common.o: ..\..\..\..\..\..\components\libraries\util\app_util.h
+.\_build\ble_srv_common.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stddef.h
+.\_build\ble_srv_common.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\compiler_abstraction.h
+.\_build\ble_srv_common.o: ..\..\..\..\..\..\components\libraries\util\nordic_common.h
+.\_build\ble_srv_common.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf.h
+.\_build\ble_srv_common.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf52.h
+.\_build\ble_srv_common.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\core_cm4.h
+.\_build\ble_srv_common.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\cmsis_version.h
+.\_build\ble_srv_common.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\cmsis_compiler.h
+.\_build\ble_srv_common.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\cmsis_armcc.h
+.\_build\ble_srv_common.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\mpu_armv7.h
+.\_build\ble_srv_common.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\system_nrf52.h
+.\_build\ble_srv_common.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf52_bitfields.h
+.\_build\ble_srv_common.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf51_to_nrf52.h
+.\_build\ble_srv_common.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf52_name_change.h
+.\_build\ble_srv_common.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf52\nrf_mbr.h
+.\_build\ble_srv_common.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf_svc.h
+.\_build\ble_srv_common.o: ..\..\..\..\..\..\components\softdevice\s132\headers\ble.h
+.\_build\ble_srv_common.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf_error.h
+.\_build\ble_srv_common.o: ..\..\..\..\..\..\components\softdevice\s132\headers\ble_err.h
+.\_build\ble_srv_common.o: ..\..\..\..\..\..\components\softdevice\s132\headers\ble_gap.h
+.\_build\ble_srv_common.o: ..\..\..\..\..\..\components\softdevice\s132\headers\ble_hci.h
+.\_build\ble_srv_common.o: ..\..\..\..\..\..\components\softdevice\s132\headers\ble_ranges.h
+.\_build\ble_srv_common.o: ..\..\..\..\..\..\components\softdevice\s132\headers\ble_l2cap.h
+.\_build\ble_srv_common.o: ..\..\..\..\..\..\components\softdevice\s132\headers\ble_gatt.h
+.\_build\ble_srv_common.o: ..\..\..\..\..\..\components\softdevice\s132\headers\ble_gattc.h
+.\_build\ble_srv_common.o: ..\..\..\..\..\..\components\softdevice\s132\headers\ble_gatts.h
+.\_build\ble_srv_common.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\string.h
+.\_build\ble_srv_common.o: ..\..\..\..\..\..\components\libraries\util\app_error.h
+.\_build\ble_srv_common.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdio.h
+.\_build\ble_srv_common.o: ..\..\..\..\..\..\components\libraries\util\sdk_errors.h
+.\_build\ble_srv_common.o: ..\..\..\..\..\..\components\libraries\util\app_error_weak.h

smart_shoes/nRF5_SDK_17.0.0_9d13099/examples/Shoes_just_traj_20201208/ble_app_uart_03_link_PC/pca10040/s132/arm5_no_packs/_build/boards.d

@@ -0,0 +1,49 @@
+.\_build\boards.o: ..\..\..\..\..\..\components\boards\boards.c
+.\_build\boards.o: ..\..\..\..\..\..\components\boards\boards.h
+.\_build\boards.o: ..\..\..\..\..\..\modules\nrfx\hal\nrf_gpio.h
+.\_build\boards.o: ..\..\..\..\..\..\modules\nrfx\nrfx.h
+.\_build\boards.o: ..\..\..\..\..\..\integration\nrfx\nrfx_config.h
+.\_build\boards.o: ..\config\sdk_config.h
+.\_build\boards.o: ..\..\..\..\..\..\modules\nrfx\drivers/nrfx_common.h
+.\_build\boards.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdint.h
+.\_build\boards.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stddef.h
+.\_build\boards.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdbool.h
+.\_build\boards.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf.h
+.\_build\boards.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf52.h
+.\_build\boards.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\core_cm4.h
+.\_build\boards.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\cmsis_version.h
+.\_build\boards.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\cmsis_compiler.h
+.\_build\boards.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\cmsis_armcc.h
+.\_build\boards.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\mpu_armv7.h
+.\_build\boards.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\system_nrf52.h
+.\_build\boards.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf52_bitfields.h
+.\_build\boards.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf51_to_nrf52.h
+.\_build\boards.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf52_name_change.h
+.\_build\boards.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\compiler_abstraction.h
+.\_build\boards.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf_peripherals.h
+.\_build\boards.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf52832_peripherals.h
+.\_build\boards.o: ..\..\..\..\..\..\integration\nrfx\nrfx_glue.h
+.\_build\boards.o: ..\..\..\..\..\..\integration\nrfx\legacy/apply_old_config.h
+.\_build\boards.o: ..\..\..\..\..\..\modules\nrfx\soc/nrfx_irqs.h
+.\_build\boards.o: ..\..\..\..\..\..\modules\nrfx\soc/nrfx_irqs_nrf52832.h
+.\_build\boards.o: ..\..\..\..\..\..\components\libraries\util\nrf_assert.h
+.\_build\boards.o: ..\..\..\..\..\..\components\libraries\util\app_util.h
+.\_build\boards.o: ..\..\..\..\..\..\components\libraries\util\nordic_common.h
+.\_build\boards.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf52\nrf_mbr.h
+.\_build\boards.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf_svc.h
+.\_build\boards.o: ..\..\..\..\..\..\components\libraries\util\app_util_platform.h
+.\_build\boards.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf_soc.h
+.\_build\boards.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf_error.h
+.\_build\boards.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf_error_soc.h
+.\_build\boards.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf_nvic.h
+.\_build\boards.o: ..\..\..\..\..\..\components\libraries\util\app_error.h
+.\_build\boards.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdio.h
+.\_build\boards.o: ..\..\..\..\..\..\components\libraries\util\sdk_errors.h
+.\_build\boards.o: ..\..\..\..\..\..\components\libraries\util\app_error_weak.h
+.\_build\boards.o: ..\..\..\..\..\..\modules\nrfx\soc/nrfx_coredep.h
+.\_build\boards.o: ..\..\..\..\..\..\modules\nrfx\soc/nrfx_atomic.h
+.\_build\boards.o: ..\..\..\..\..\..\modules\nrfx\nrfx.h
+.\_build\boards.o: ..\..\..\..\..\..\components\libraries\util\sdk_resources.h
+.\_build\boards.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf_sd_def.h
+.\_build\boards.o: ..\..\..\..\..\..\modules\nrfx\drivers/nrfx_errors.h
+.\_build\boards.o: ..\..\..\..\..\..\components\boards\pca10040.h

smart_shoes/nRF5_SDK_17.0.0_9d13099/examples/Shoes_just_traj_20201208/ble_app_uart_03_link_PC/pca10040/s132/arm5_no_packs/_build/bsp.d

@@ -0,0 +1,57 @@
+.\_build\bsp.o: ..\..\..\..\..\..\components\libraries\bsp\bsp.c
+.\_build\bsp.o: ..\..\..\..\..\..\components\libraries\bsp\bsp.h
+.\_build\bsp.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdint.h
+.\_build\bsp.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdbool.h
+.\_build\bsp.o: ..\..\..\..\..\..\components\boards\boards.h
+.\_build\bsp.o: ..\..\..\..\..\..\modules\nrfx\hal\nrf_gpio.h
+.\_build\bsp.o: ..\..\..\..\..\..\modules\nrfx\nrfx.h
+.\_build\bsp.o: ..\..\..\..\..\..\integration\nrfx\nrfx_config.h
+.\_build\bsp.o: ..\config\sdk_config.h
+.\_build\bsp.o: ..\..\..\..\..\..\modules\nrfx\drivers/nrfx_common.h
+.\_build\bsp.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stddef.h
+.\_build\bsp.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf.h
+.\_build\bsp.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf52.h
+.\_build\bsp.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\core_cm4.h
+.\_build\bsp.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\cmsis_version.h
+.\_build\bsp.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\cmsis_compiler.h
+.\_build\bsp.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\cmsis_armcc.h
+.\_build\bsp.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\mpu_armv7.h
+.\_build\bsp.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\system_nrf52.h
+.\_build\bsp.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf52_bitfields.h
+.\_build\bsp.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf51_to_nrf52.h
+.\_build\bsp.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf52_name_change.h
+.\_build\bsp.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\compiler_abstraction.h
+.\_build\bsp.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf_peripherals.h
+.\_build\bsp.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf52832_peripherals.h
+.\_build\bsp.o: ..\..\..\..\..\..\integration\nrfx\nrfx_glue.h
+.\_build\bsp.o: ..\..\..\..\..\..\integration\nrfx\legacy/apply_old_config.h
+.\_build\bsp.o: ..\..\..\..\..\..\modules\nrfx\soc/nrfx_irqs.h
+.\_build\bsp.o: ..\..\..\..\..\..\modules\nrfx\soc/nrfx_irqs_nrf52832.h
+.\_build\bsp.o: ..\..\..\..\..\..\components\libraries\util\nrf_assert.h
+.\_build\bsp.o: ..\..\..\..\..\..\components\libraries\util\app_util.h
+.\_build\bsp.o: ..\..\..\..\..\..\components\libraries\util\nordic_common.h
+.\_build\bsp.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf52\nrf_mbr.h
+.\_build\bsp.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf_svc.h
+.\_build\bsp.o: ..\..\..\..\..\..\components\libraries\util\app_util_platform.h
+.\_build\bsp.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf_soc.h
+.\_build\bsp.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf_error.h
+.\_build\bsp.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf_error_soc.h
+.\_build\bsp.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf_nvic.h
+.\_build\bsp.o: ..\..\..\..\..\..\components\libraries\util\app_error.h
+.\_build\bsp.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdio.h
+.\_build\bsp.o: ..\..\..\..\..\..\components\libraries\util\sdk_errors.h
+.\_build\bsp.o: ..\..\..\..\..\..\components\libraries\util\app_error_weak.h
+.\_build\bsp.o: ..\..\..\..\..\..\modules\nrfx\soc/nrfx_coredep.h
+.\_build\bsp.o: ..\..\..\..\..\..\modules\nrfx\soc/nrfx_atomic.h
+.\_build\bsp.o: ..\..\..\..\..\..\modules\nrfx\nrfx.h
+.\_build\bsp.o: ..\..\..\..\..\..\components\libraries\util\sdk_resources.h
+.\_build\bsp.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf_sd_def.h
+.\_build\bsp.o: ..\..\..\..\..\..\modules\nrfx\drivers/nrfx_errors.h
+.\_build\bsp.o: ..\..\..\..\..\..\components\boards\pca10040.h
+.\_build\bsp.o: ..\..\..\..\..\..\components\libraries\button\app_button.h
+.\_build\bsp.o: ..\..\..\..\..\..\components\libraries\bsp\bsp_config.h
+.\_build\bsp.o: ..\..\..\..\..\..\components\libraries\timer\app_timer.h
+.\_build\bsp.o: ..\..\..\..\..\..\components\libraries\log\nrf_log_instance.h
+.\_build\bsp.o: ..\..\..\..\..\..\components\libraries\experimental_section_vars\nrf_section.h
+.\_build\bsp.o: ..\..\..\..\..\..\components\libraries\log\nrf_log_types.h
+.\_build\bsp.o: ..\..\..\..\..\..\components\libraries\sortlist\nrf_sortlist.h

smart_shoes/nRF5_SDK_17.0.0_9d13099/examples/Shoes_just_traj_20201208/ble_app_uart_03_link_PC/pca10040/s132/arm5_no_packs/_build/bsp_btn_ble.d

@@ -0,0 +1,65 @@
+.\_build\bsp_btn_ble.o: ..\..\..\..\..\..\components\libraries\bsp\bsp_btn_ble.c
+.\_build\bsp_btn_ble.o: ..\..\..\..\..\..\components\libraries\bsp\bsp_btn_ble.h
+.\_build\bsp_btn_ble.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdint.h
+.\_build\bsp_btn_ble.o: ..\..\..\..\..\..\components\softdevice\s132\headers\ble.h
+.\_build\bsp_btn_ble.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf_svc.h
+.\_build\bsp_btn_ble.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf_error.h
+.\_build\bsp_btn_ble.o: ..\..\..\..\..\..\components\softdevice\s132\headers\ble_err.h
+.\_build\bsp_btn_ble.o: ..\..\..\..\..\..\components\softdevice\s132\headers\ble_gap.h
+.\_build\bsp_btn_ble.o: ..\..\..\..\..\..\components\softdevice\s132\headers\ble_hci.h
+.\_build\bsp_btn_ble.o: ..\..\..\..\..\..\components\softdevice\s132\headers\ble_ranges.h
+.\_build\bsp_btn_ble.o: ..\..\..\..\..\..\components\softdevice\s132\headers\ble_types.h
+.\_build\bsp_btn_ble.o: ..\..\..\..\..\..\components\softdevice\s132\headers\ble_l2cap.h
+.\_build\bsp_btn_ble.o: ..\..\..\..\..\..\components\softdevice\s132\headers\ble_gatt.h
+.\_build\bsp_btn_ble.o: ..\..\..\..\..\..\components\softdevice\s132\headers\ble_gattc.h
+.\_build\bsp_btn_ble.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf.h
+.\_build\bsp_btn_ble.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf52.h
+.\_build\bsp_btn_ble.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\core_cm4.h
+.\_build\bsp_btn_ble.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\cmsis_version.h
+.\_build\bsp_btn_ble.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\cmsis_compiler.h
+.\_build\bsp_btn_ble.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\cmsis_armcc.h
+.\_build\bsp_btn_ble.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\mpu_armv7.h
+.\_build\bsp_btn_ble.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\system_nrf52.h
+.\_build\bsp_btn_ble.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf52_bitfields.h
+.\_build\bsp_btn_ble.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf51_to_nrf52.h
+.\_build\bsp_btn_ble.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf52_name_change.h
+.\_build\bsp_btn_ble.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\compiler_abstraction.h
+.\_build\bsp_btn_ble.o: ..\..\..\..\..\..\components\softdevice\s132\headers\ble_gatts.h
+.\_build\bsp_btn_ble.o: ..\..\..\..\..\..\components\libraries\bsp\bsp.h
+.\_build\bsp_btn_ble.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdbool.h
+.\_build\bsp_btn_ble.o: ..\..\..\..\..\..\components\boards\boards.h
+.\_build\bsp_btn_ble.o: ..\..\..\..\..\..\modules\nrfx\hal\nrf_gpio.h
+.\_build\bsp_btn_ble.o: ..\..\..\..\..\..\modules\nrfx\nrfx.h
+.\_build\bsp_btn_ble.o: ..\..\..\..\..\..\integration\nrfx\nrfx_config.h
+.\_build\bsp_btn_ble.o: ..\config\sdk_config.h
+.\_build\bsp_btn_ble.o: ..\..\..\..\..\..\modules\nrfx\drivers/nrfx_common.h
+.\_build\bsp_btn_ble.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stddef.h
+.\_build\bsp_btn_ble.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf_peripherals.h
+.\_build\bsp_btn_ble.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf52832_peripherals.h
+.\_build\bsp_btn_ble.o: ..\..\..\..\..\..\integration\nrfx\nrfx_glue.h
+.\_build\bsp_btn_ble.o: ..\..\..\..\..\..\integration\nrfx\legacy/apply_old_config.h
+.\_build\bsp_btn_ble.o: ..\..\..\..\..\..\modules\nrfx\soc/nrfx_irqs.h
+.\_build\bsp_btn_ble.o: ..\..\..\..\..\..\modules\nrfx\soc/nrfx_irqs_nrf52832.h
+.\_build\bsp_btn_ble.o: ..\..\..\..\..\..\components\libraries\util\nrf_assert.h
+.\_build\bsp_btn_ble.o: ..\..\..\..\..\..\components\libraries\util\app_util.h
+.\_build\bsp_btn_ble.o: ..\..\..\..\..\..\components\libraries\util\nordic_common.h
+.\_build\bsp_btn_ble.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf52\nrf_mbr.h
+.\_build\bsp_btn_ble.o: ..\..\..\..\..\..\components\libraries\util\app_util_platform.h
+.\_build\bsp_btn_ble.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf_soc.h
+.\_build\bsp_btn_ble.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf_error_soc.h
+.\_build\bsp_btn_ble.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf_nvic.h
+.\_build\bsp_btn_ble.o: ..\..\..\..\..\..\components\libraries\util\app_error.h
+.\_build\bsp_btn_ble.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdio.h
+.\_build\bsp_btn_ble.o: ..\..\..\..\..\..\components\libraries\util\sdk_errors.h
+.\_build\bsp_btn_ble.o: ..\..\..\..\..\..\components\libraries\util\app_error_weak.h
+.\_build\bsp_btn_ble.o: ..\..\..\..\..\..\modules\nrfx\soc/nrfx_coredep.h
+.\_build\bsp_btn_ble.o: ..\..\..\..\..\..\modules\nrfx\soc/nrfx_atomic.h
+.\_build\bsp_btn_ble.o: ..\..\..\..\..\..\modules\nrfx\nrfx.h
+.\_build\bsp_btn_ble.o: ..\..\..\..\..\..\components\libraries\util\sdk_resources.h
+.\_build\bsp_btn_ble.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf_sd_def.h
+.\_build\bsp_btn_ble.o: ..\..\..\..\..\..\modules\nrfx\drivers/nrfx_errors.h
+.\_build\bsp_btn_ble.o: ..\..\..\..\..\..\components\boards\pca10040.h
+.\_build\bsp_btn_ble.o: ..\..\..\..\..\..\components\libraries\button\app_button.h
+.\_build\bsp_btn_ble.o: ..\..\..\..\..\..\components\softdevice\common\nrf_sdh_ble.h
+.\_build\bsp_btn_ble.o: ..\..\..\..\..\..\components\libraries\experimental_section_vars\nrf_section_iter.h
+.\_build\bsp_btn_ble.o: ..\..\..\..\..\..\components\libraries\experimental_section_vars\nrf_section.h

smart_shoes/nRF5_SDK_17.0.0_9d13099/examples/Shoes_just_traj_20201208/ble_app_uart_03_link_PC/pca10040/s132/arm5_no_packs/_build/chenyj.d

@@ -0,0 +1,71 @@
+.\_build\chenyj.o: ..\..\..\chenYJ.c
+.\_build\chenyj.o: ..\..\..\chenYJ.h
+.\_build\chenyj.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdint.h
+.\_build\chenyj.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\string.h
+.\_build\chenyj.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdbool.h
+.\_build\chenyj.o: ..\..\..\main.h
+.\_build\chenyj.o: ..\..\..\..\..\..\components\libraries\delay\nrf_delay.h
+.\_build\chenyj.o: ..\..\..\..\..\..\modules\nrfx\nrfx.h
+.\_build\chenyj.o: ..\..\..\..\..\..\integration\nrfx\nrfx_config.h
+.\_build\chenyj.o: ..\config\sdk_config.h
+.\_build\chenyj.o: ..\..\..\..\..\..\modules\nrfx\drivers/nrfx_common.h
+.\_build\chenyj.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stddef.h
+.\_build\chenyj.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf.h
+.\_build\chenyj.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf52.h
+.\_build\chenyj.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\core_cm4.h
+.\_build\chenyj.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\cmsis_version.h
+.\_build\chenyj.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\cmsis_compiler.h
+.\_build\chenyj.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\cmsis_armcc.h
+.\_build\chenyj.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\mpu_armv7.h
+.\_build\chenyj.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\system_nrf52.h
+.\_build\chenyj.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf52_bitfields.h
+.\_build\chenyj.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf51_to_nrf52.h
+.\_build\chenyj.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf52_name_change.h
+.\_build\chenyj.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\compiler_abstraction.h
+.\_build\chenyj.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf_peripherals.h
+.\_build\chenyj.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf52832_peripherals.h
+.\_build\chenyj.o: ..\..\..\..\..\..\integration\nrfx\nrfx_glue.h
+.\_build\chenyj.o: ..\..\..\..\..\..\integration\nrfx\legacy/apply_old_config.h
+.\_build\chenyj.o: ..\..\..\..\..\..\modules\nrfx\soc/nrfx_irqs.h
+.\_build\chenyj.o: ..\..\..\..\..\..\modules\nrfx\soc/nrfx_irqs_nrf52832.h
+.\_build\chenyj.o: ..\..\..\..\..\..\components\libraries\util\nrf_assert.h
+.\_build\chenyj.o: ..\..\..\..\..\..\components\libraries\util\app_util.h
+.\_build\chenyj.o: ..\..\..\..\..\..\components\libraries\util\nordic_common.h
+.\_build\chenyj.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf52\nrf_mbr.h
+.\_build\chenyj.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf_svc.h
+.\_build\chenyj.o: ..\..\..\..\..\..\components\libraries\util\app_util_platform.h
+.\_build\chenyj.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf_soc.h
+.\_build\chenyj.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf_error.h
+.\_build\chenyj.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf_error_soc.h
+.\_build\chenyj.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf_nvic.h
+.\_build\chenyj.o: ..\..\..\..\..\..\components\libraries\util\app_error.h
+.\_build\chenyj.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdio.h
+.\_build\chenyj.o: ..\..\..\..\..\..\components\libraries\util\sdk_errors.h
+.\_build\chenyj.o: ..\..\..\..\..\..\components\libraries\util\app_error_weak.h
+.\_build\chenyj.o: ..\..\..\..\..\..\modules\nrfx\soc/nrfx_coredep.h
+.\_build\chenyj.o: ..\..\..\..\..\..\modules\nrfx\soc/nrfx_atomic.h
+.\_build\chenyj.o: ..\..\..\..\..\..\modules\nrfx\nrfx.h
+.\_build\chenyj.o: ..\..\..\..\..\..\components\libraries\util\sdk_resources.h
+.\_build\chenyj.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf_sd_def.h
+.\_build\chenyj.o: ..\..\..\..\..\..\modules\nrfx\drivers/nrfx_errors.h
+.\_build\chenyj.o: ..\..\..\..\..\..\components\drivers_nrf\twi_master\deprecated\twi_master.h
+.\_build\chenyj.o: ..\..\..\..\..\..\components\libraries\fstorage\nrf_fstorage.h
+.\_build\chenyj.o: ..\..\..\..\..\..\components\libraries\experimental_section_vars\nrf_section.h
+.\_build\chenyj.o: ..\..\..\..\..\..\components\libraries\log\nrf_log.h
+.\_build\chenyj.o: ..\..\..\..\..\..\components\libraries\util\sdk_common.h
+.\_build\chenyj.o: ..\..\..\..\..\..\components\libraries\util\sdk_os.h
+.\_build\chenyj.o: ..\..\..\..\..\..\components\libraries\util\sdk_macros.h
+.\_build\chenyj.o: ..\..\..\..\..\..\components\libraries\strerror\nrf_strerror.h
+.\_build\chenyj.o: ..\..\..\..\..\..\components\libraries\log\src\nrf_log_internal.h
+.\_build\chenyj.o: ..\..\..\..\..\..\components\libraries\log\nrf_log_instance.h
+.\_build\chenyj.o: ..\..\..\..\..\..\components\libraries\log\nrf_log_types.h
+.\_build\chenyj.o: ..\..\..\..\..\..\components\libraries\log\nrf_log_ctrl.h
+.\_build\chenyj.o: ..\..\..\..\..\..\components\libraries\log\src\nrf_log_ctrl_internal.h
+.\_build\chenyj.o: ..\..\..\..\..\..\components\libraries\log\nrf_log_backend_interface.h
+.\_build\chenyj.o: ..\..\..\..\..\..\components\libraries\memobj\nrf_memobj.h
+.\_build\chenyj.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdlib.h
+.\_build\chenyj.o: ..\..\..\..\..\..\components\libraries\balloc\nrf_balloc.h
+.\_build\chenyj.o: ..\..\..\..\..\..\components\libraries\log\nrf_log_default_backends.h
+.\_build\chenyj.o: ..\..\..\..\..\..\components\libraries\fds\fds.h
+.\_build\chenyj.o: ..\..\..\..\..\..\external\segger_rtt\SEGGER_RTT.h
+.\_build\chenyj.o: ..\..\..\..\..\..\external\segger_rtt\SEGGER_RTT_Conf.h

smart_shoes/nRF5_SDK_17.0.0_9d13099/examples/Shoes_just_traj_20201208/ble_app_uart_03_link_PC/pca10040/s132/arm5_no_packs/_build/crc16.d

@@ -0,0 +1,30 @@
+.\_build\crc16.o: ..\..\..\..\..\..\components\libraries\crc16\crc16.c
+.\_build\crc16.o: ..\..\..\..\..\..\components\libraries\util\sdk_common.h
+.\_build\crc16.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdint.h
+.\_build\crc16.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdbool.h
+.\_build\crc16.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\string.h
+.\_build\crc16.o: ..\config\sdk_config.h
+.\_build\crc16.o: ..\..\..\..\..\..\components\libraries\util\nordic_common.h
+.\_build\crc16.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\compiler_abstraction.h
+.\_build\crc16.o: ..\..\..\..\..\..\components\libraries\util\sdk_os.h
+.\_build\crc16.o: ..\..\..\..\..\..\components\libraries\util\sdk_errors.h
+.\_build\crc16.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf_error.h
+.\_build\crc16.o: ..\..\..\..\..\..\components\libraries\util\app_util.h
+.\_build\crc16.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stddef.h
+.\_build\crc16.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf.h
+.\_build\crc16.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf52.h
+.\_build\crc16.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\core_cm4.h
+.\_build\crc16.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\cmsis_version.h
+.\_build\crc16.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\cmsis_compiler.h
+.\_build\crc16.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\cmsis_armcc.h
+.\_build\crc16.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\mpu_armv7.h
+.\_build\crc16.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\system_nrf52.h
+.\_build\crc16.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf52_bitfields.h
+.\_build\crc16.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf51_to_nrf52.h
+.\_build\crc16.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf52_name_change.h
+.\_build\crc16.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf52\nrf_mbr.h
+.\_build\crc16.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf_svc.h
+.\_build\crc16.o: ..\..\..\..\..\..\components\libraries\util\sdk_macros.h
+.\_build\crc16.o: ..\..\..\..\..\..\components\libraries\util\nrf_assert.h
+.\_build\crc16.o: ..\..\..\..\..\..\components\libraries\crc16\crc16.h
+.\_build\crc16.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdlib.h

smart_shoes/nRF5_SDK_17.0.0_9d13099/examples/Shoes_just_traj_20201208/ble_app_uart_03_link_PC/pca10040/s132/arm5_no_packs/_build/data_builder.d

@@ -0,0 +1,17 @@
+.\_build\data_builder.o: ..\..\..\..\..\..\components\drivers_ext\mpu_dpm\mllite\data_builder.c
+.\_build\data_builder.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\string.h
+.\_build\data_builder.o: ..\..\..\..\..\..\components\drivers_ext\mpu_dpm\mllite\ml_math_func.h
+.\_build\data_builder.o: ..\..\..\..\..\..\components\drivers_ext\mpu_dpm\driver\include\mltypes.h
+.\_build\data_builder.o: ..\..\..\..\..\..\components\drivers_ext\mpu_dpm\driver\include\stdint_invensense.h
+.\_build\data_builder.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdint.h
+.\_build\data_builder.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\errno.h
+.\_build\data_builder.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\limits.h
+.\_build\data_builder.o: ..\..\..\..\..\..\components\drivers_ext\mpu_dpm\mllite\data_builder.h
+.\_build\data_builder.o: ..\..\..\..\..\..\components\drivers_ext\mpu_dpm\driver\include\mlmath.h
+.\_build\data_builder.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\math.h
+.\_build\data_builder.o: ..\..\..\..\..\..\components\drivers_ext\mpu_dpm\mllite\storage_manager.h
+.\_build\data_builder.o: ..\..\..\..\..\..\components\drivers_ext\mpu_dpm\mllite\message_layer.h
+.\_build\data_builder.o: ..\..\..\..\..\..\components\drivers_ext\mpu_dpm\mllite\results_holder.h
+.\_build\data_builder.o: ..\..\..\..\..\..\components\drivers_ext\mpu_dpm\driver\include\log.h
+.\_build\data_builder.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdlib.h
+.\_build\data_builder.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdarg.h

smart_shoes/nRF5_SDK_17.0.0_9d13099/examples/Shoes_just_traj_20201208/ble_app_uart_03_link_PC/pca10040/s132/arm5_no_packs/_build/drv_rtc.d

@@ -0,0 +1,59 @@
+.\_build\drv_rtc.o: ..\..\..\..\..\..\components\libraries\timer\drv_rtc.c
+.\_build\drv_rtc.o: ..\..\..\..\..\..\modules\nrfx\nrfx.h
+.\_build\drv_rtc.o: ..\..\..\..\..\..\integration\nrfx\nrfx_config.h
+.\_build\drv_rtc.o: ..\config\sdk_config.h
+.\_build\drv_rtc.o: ..\..\..\..\..\..\modules\nrfx\drivers/nrfx_common.h
+.\_build\drv_rtc.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdint.h
+.\_build\drv_rtc.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stddef.h
+.\_build\drv_rtc.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdbool.h
+.\_build\drv_rtc.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf.h
+.\_build\drv_rtc.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf52.h
+.\_build\drv_rtc.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\core_cm4.h
+.\_build\drv_rtc.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\cmsis_version.h
+.\_build\drv_rtc.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\cmsis_compiler.h
+.\_build\drv_rtc.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\cmsis_armcc.h
+.\_build\drv_rtc.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\mpu_armv7.h
+.\_build\drv_rtc.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\system_nrf52.h
+.\_build\drv_rtc.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf52_bitfields.h
+.\_build\drv_rtc.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf51_to_nrf52.h
+.\_build\drv_rtc.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf52_name_change.h
+.\_build\drv_rtc.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\compiler_abstraction.h
+.\_build\drv_rtc.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf_peripherals.h
+.\_build\drv_rtc.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf52832_peripherals.h
+.\_build\drv_rtc.o: ..\..\..\..\..\..\integration\nrfx\nrfx_glue.h
+.\_build\drv_rtc.o: ..\..\..\..\..\..\integration\nrfx\legacy/apply_old_config.h
+.\_build\drv_rtc.o: ..\..\..\..\..\..\modules\nrfx\soc/nrfx_irqs.h
+.\_build\drv_rtc.o: ..\..\..\..\..\..\modules\nrfx\soc/nrfx_irqs_nrf52832.h
+.\_build\drv_rtc.o: ..\..\..\..\..\..\components\libraries\util\nrf_assert.h
+.\_build\drv_rtc.o: ..\..\..\..\..\..\components\libraries\util\app_util.h
+.\_build\drv_rtc.o: ..\..\..\..\..\..\components\libraries\util\nordic_common.h
+.\_build\drv_rtc.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf52\nrf_mbr.h
+.\_build\drv_rtc.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf_svc.h
+.\_build\drv_rtc.o: ..\..\..\..\..\..\components\libraries\util\app_util_platform.h
+.\_build\drv_rtc.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf_soc.h
+.\_build\drv_rtc.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf_error.h
+.\_build\drv_rtc.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf_error_soc.h
+.\_build\drv_rtc.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf_nvic.h
+.\_build\drv_rtc.o: ..\..\..\..\..\..\components\libraries\util\app_error.h
+.\_build\drv_rtc.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdio.h
+.\_build\drv_rtc.o: ..\..\..\..\..\..\components\libraries\util\sdk_errors.h
+.\_build\drv_rtc.o: ..\..\..\..\..\..\components\libraries\util\app_error_weak.h
+.\_build\drv_rtc.o: ..\..\..\..\..\..\modules\nrfx\soc/nrfx_coredep.h
+.\_build\drv_rtc.o: ..\..\..\..\..\..\modules\nrfx\soc/nrfx_atomic.h
+.\_build\drv_rtc.o: ..\..\..\..\..\..\modules\nrfx\nrfx.h
+.\_build\drv_rtc.o: ..\..\..\..\..\..\components\libraries\util\sdk_resources.h
+.\_build\drv_rtc.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf_sd_def.h
+.\_build\drv_rtc.o: ..\..\..\..\..\..\modules\nrfx\drivers/nrfx_errors.h
+.\_build\drv_rtc.o: ..\..\..\..\..\..\components\libraries\delay\nrf_delay.h
+.\_build\drv_rtc.o: ..\..\..\..\..\..\components\libraries\timer\drv_rtc.h
+.\_build\drv_rtc.o: ..\..\..\..\..\..\modules\nrfx\hal/nrf_rtc.h
+.\_build\drv_rtc.o: ..\..\..\..\..\..\components\libraries\log\nrf_log.h
+.\_build\drv_rtc.o: ..\..\..\..\..\..\components\libraries\util\sdk_common.h
+.\_build\drv_rtc.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\string.h
+.\_build\drv_rtc.o: ..\..\..\..\..\..\components\libraries\util\sdk_os.h
+.\_build\drv_rtc.o: ..\..\..\..\..\..\components\libraries\util\sdk_macros.h
+.\_build\drv_rtc.o: ..\..\..\..\..\..\components\libraries\experimental_section_vars\nrf_section.h
+.\_build\drv_rtc.o: ..\..\..\..\..\..\components\libraries\strerror\nrf_strerror.h
+.\_build\drv_rtc.o: ..\..\..\..\..\..\components\libraries\log\src\nrf_log_internal.h
+.\_build\drv_rtc.o: ..\..\..\..\..\..\components\libraries\log\nrf_log_instance.h
+.\_build\drv_rtc.o: ..\..\..\..\..\..\components\libraries\log\nrf_log_types.h

smart_shoes/nRF5_SDK_17.0.0_9d13099/examples/Shoes_just_traj_20201208/ble_app_uart_03_link_PC/pca10040/s132/arm5_no_packs/_build/empl_outputs.d

@@ -0,0 +1,14 @@
+.\_build\empl_outputs.o: ..\..\..\..\..\..\components\drivers_ext\mpu_dpm\eMPL-hal\eMPL_outputs.c
+.\_build\empl_outputs.o: ..\..\..\..\..\..\components\drivers_ext\mpu_dpm\eMPL-hal\eMPL_outputs.h
+.\_build\empl_outputs.o: ..\..\..\..\..\..\components\drivers_ext\mpu_dpm\driver\include\mltypes.h
+.\_build\empl_outputs.o: ..\..\..\..\..\..\components\drivers_ext\mpu_dpm\driver\include\stdint_invensense.h
+.\_build\empl_outputs.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdint.h
+.\_build\empl_outputs.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\string.h
+.\_build\empl_outputs.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\errno.h
+.\_build\empl_outputs.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\limits.h
+.\_build\empl_outputs.o: ..\..\..\..\..\..\components\drivers_ext\mpu_dpm\mllite\ml_math_func.h
+.\_build\empl_outputs.o: ..\..\..\..\..\..\components\drivers_ext\mpu_dpm\driver\include\mlmath.h
+.\_build\empl_outputs.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\math.h
+.\_build\empl_outputs.o: ..\..\..\..\..\..\components\drivers_ext\mpu_dpm\mllite\start_manager.h
+.\_build\empl_outputs.o: ..\..\..\..\..\..\components\drivers_ext\mpu_dpm\mllite\data_builder.h
+.\_build\empl_outputs.o: ..\..\..\..\..\..\components\drivers_ext\mpu_dpm\mllite\results_holder.h

smart_shoes/nRF5_SDK_17.0.0_9d13099/examples/Shoes_just_traj_20201208/ble_app_uart_03_link_PC/pca10040/s132/arm5_no_packs/_build/fds.d

@@ -0,0 +1,45 @@
+.\_build\fds.o: ..\..\..\..\..\..\components\libraries\fds\fds.c
+.\_build\fds.o: ..\..\..\..\..\..\components\libraries\util\sdk_common.h
+.\_build\fds.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdint.h
+.\_build\fds.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdbool.h
+.\_build\fds.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\string.h
+.\_build\fds.o: ..\config\sdk_config.h
+.\_build\fds.o: ..\..\..\..\..\..\components\libraries\util\nordic_common.h
+.\_build\fds.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\compiler_abstraction.h
+.\_build\fds.o: ..\..\..\..\..\..\components\libraries\util\sdk_os.h
+.\_build\fds.o: ..\..\..\..\..\..\components\libraries\util\sdk_errors.h
+.\_build\fds.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf_error.h
+.\_build\fds.o: ..\..\..\..\..\..\components\libraries\util\app_util.h
+.\_build\fds.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stddef.h
+.\_build\fds.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf.h
+.\_build\fds.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf52.h
+.\_build\fds.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\core_cm4.h
+.\_build\fds.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\cmsis_version.h
+.\_build\fds.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\cmsis_compiler.h
+.\_build\fds.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\cmsis_armcc.h
+.\_build\fds.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\mpu_armv7.h
+.\_build\fds.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\system_nrf52.h
+.\_build\fds.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf52_bitfields.h
+.\_build\fds.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf51_to_nrf52.h
+.\_build\fds.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf52_name_change.h
+.\_build\fds.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf52\nrf_mbr.h
+.\_build\fds.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf_svc.h
+.\_build\fds.o: ..\..\..\..\..\..\components\libraries\util\sdk_macros.h
+.\_build\fds.o: ..\..\..\..\..\..\components\libraries\util\nrf_assert.h
+.\_build\fds.o: ..\..\..\..\..\..\components\libraries\fds\fds.h
+.\_build\fds.o: ..\..\..\..\..\..\components\libraries\util\app_util_platform.h
+.\_build\fds.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf_soc.h
+.\_build\fds.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf_error_soc.h
+.\_build\fds.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf_nvic.h
+.\_build\fds.o: ..\..\..\..\..\..\components\libraries\util\app_error.h
+.\_build\fds.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdio.h
+.\_build\fds.o: ..\..\..\..\..\..\components\libraries\util\app_error_weak.h
+.\_build\fds.o: ..\..\..\..\..\..\components\libraries\fds\fds_internal_defs.h
+.\_build\fds.o: ..\..\..\..\..\..\components\libraries\atomic\nrf_atomic.h
+.\_build\fds.o: ..\..\..\..\..\..\components\libraries\atomic_fifo\nrf_atfifo.h
+.\_build\fds.o: ..\..\..\..\..\..\components\libraries\log\nrf_log_instance.h
+.\_build\fds.o: ..\..\..\..\..\..\components\libraries\experimental_section_vars\nrf_section.h
+.\_build\fds.o: ..\..\..\..\..\..\components\libraries\log\nrf_log_types.h
+.\_build\fds.o: ..\..\..\..\..\..\components\libraries\fstorage\nrf_fstorage.h
+.\_build\fds.o: ..\..\..\..\..\..\components\libraries\fstorage\nrf_fstorage_sd.h
+.\_build\fds.o: ..\..\..\..\..\..\components\libraries\crc16\crc16.h

smart_shoes/nRF5_SDK_17.0.0_9d13099/examples/Shoes_just_traj_20201208/ble_app_uart_03_link_PC/pca10040/s132/arm5_no_packs/_build/footpdr.d

@@ -0,0 +1,6 @@
+.\_build\footpdr.o: ..\..\..\..\..\..\components\drivers_ext\mpu_dpm\mpu6050\footPDR.c
+.\_build\footpdr.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdio.h
+.\_build\footpdr.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\string.h
+.\_build\footpdr.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdlib.h
+.\_build\footpdr.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\math.h
+.\_build\footpdr.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdint.h

smart_shoes/nRF5_SDK_17.0.0_9d13099/examples/Shoes_just_traj_20201208/ble_app_uart_03_link_PC/pca10040/s132/arm5_no_packs/_build/hal_outputs.d

@@ -0,0 +1,17 @@
+.\_build\hal_outputs.o: ..\..\..\..\..\..\components\drivers_ext\mpu_dpm\mllite\hal_outputs.c
+.\_build\hal_outputs.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\string.h
+.\_build\hal_outputs.o: ..\..\..\..\..\..\components\drivers_ext\mpu_dpm\mllite\hal_outputs.h
+.\_build\hal_outputs.o: ..\..\..\..\..\..\components\drivers_ext\mpu_dpm\driver\include\mltypes.h
+.\_build\hal_outputs.o: ..\..\..\..\..\..\components\drivers_ext\mpu_dpm\driver\include\stdint_invensense.h
+.\_build\hal_outputs.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdint.h
+.\_build\hal_outputs.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\errno.h
+.\_build\hal_outputs.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\limits.h
+.\_build\hal_outputs.o: ..\..\..\..\..\..\components\drivers_ext\mpu_dpm\driver\include\log.h
+.\_build\hal_outputs.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdlib.h
+.\_build\hal_outputs.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdarg.h
+.\_build\hal_outputs.o: ..\..\..\..\..\..\components\drivers_ext\mpu_dpm\mllite\ml_math_func.h
+.\_build\hal_outputs.o: ..\..\..\..\..\..\components\drivers_ext\mpu_dpm\driver\include\mlmath.h
+.\_build\hal_outputs.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\math.h
+.\_build\hal_outputs.o: ..\..\..\..\..\..\components\drivers_ext\mpu_dpm\mllite\start_manager.h
+.\_build\hal_outputs.o: ..\..\..\..\..\..\components\drivers_ext\mpu_dpm\mllite\data_builder.h
+.\_build\hal_outputs.o: ..\..\..\..\..\..\components\drivers_ext\mpu_dpm\mllite\results_holder.h

smart_shoes/nRF5_SDK_17.0.0_9d13099/examples/Shoes_just_traj_20201208/ble_app_uart_03_link_PC/pca10040/s132/arm5_no_packs/_build/hardfault_implementation.d

@@ -0,0 +1,28 @@
+.\_build\hardfault_implementation.o: ..\..\..\..\..\..\components\libraries\hardfault\hardfault_implementation.c
+.\_build\hardfault_implementation.o: ..\..\..\..\..\..\components\libraries\util\sdk_common.h
+.\_build\hardfault_implementation.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdint.h
+.\_build\hardfault_implementation.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdbool.h
+.\_build\hardfault_implementation.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\string.h
+.\_build\hardfault_implementation.o: ..\config\sdk_config.h
+.\_build\hardfault_implementation.o: ..\..\..\..\..\..\components\libraries\util\nordic_common.h
+.\_build\hardfault_implementation.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\compiler_abstraction.h
+.\_build\hardfault_implementation.o: ..\..\..\..\..\..\components\libraries\util\sdk_os.h
+.\_build\hardfault_implementation.o: ..\..\..\..\..\..\components\libraries\util\sdk_errors.h
+.\_build\hardfault_implementation.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf_error.h
+.\_build\hardfault_implementation.o: ..\..\..\..\..\..\components\libraries\util\app_util.h
+.\_build\hardfault_implementation.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stddef.h
+.\_build\hardfault_implementation.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf.h
+.\_build\hardfault_implementation.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf52.h
+.\_build\hardfault_implementation.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\core_cm4.h
+.\_build\hardfault_implementation.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\cmsis_version.h
+.\_build\hardfault_implementation.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\cmsis_compiler.h
+.\_build\hardfault_implementation.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\cmsis_armcc.h
+.\_build\hardfault_implementation.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\mpu_armv7.h
+.\_build\hardfault_implementation.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\system_nrf52.h
+.\_build\hardfault_implementation.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf52_bitfields.h
+.\_build\hardfault_implementation.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf51_to_nrf52.h
+.\_build\hardfault_implementation.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf52_name_change.h
+.\_build\hardfault_implementation.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf52\nrf_mbr.h
+.\_build\hardfault_implementation.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf_svc.h
+.\_build\hardfault_implementation.o: ..\..\..\..\..\..\components\libraries\util\sdk_macros.h
+.\_build\hardfault_implementation.o: ..\..\..\..\..\..\components\libraries\util\nrf_assert.h

smart_shoes/nRF5_SDK_17.0.0_9d13099/examples/Shoes_just_traj_20201208/ble_app_uart_03_link_PC/pca10040/s132/arm5_no_packs/_build/imu.d

@@ -0,0 +1,2 @@
+.\_build\imu.o: ..\..\..\..\..\..\components\drivers_ext\mpu6050_dmp\imu\imu.c
+.\_build\imu.o: ..\..\..\..\..\..\components\drivers_ext\mpu6050_dmp\imu\imu.h

smart_shoes/nRF5_SDK_17.0.0_9d13099/examples/Shoes_just_traj_20201208/ble_app_uart_03_link_PC/pca10040/s132/arm5_no_packs/_build/inv_mpu.d

@@ -0,0 +1,55 @@
+.\_build\inv_mpu.o: ..\..\..\..\..\..\components\drivers_ext\mpu_dpm\driver\eMPL\inv_mpu.c
+.\_build\inv_mpu.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdio.h
+.\_build\inv_mpu.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdint.h
+.\_build\inv_mpu.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdlib.h
+.\_build\inv_mpu.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\string.h
+.\_build\inv_mpu.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\math.h
+.\_build\inv_mpu.o: ..\..\..\..\..\..\components\drivers_ext\mpu_dpm\driver\eMPL\inv_mpu.h
+.\_build\inv_mpu.o: ..\..\..\..\..\..\components\drivers_ext\mpu_dpm\driver\eMPL\inv_mpu_dmp_motion_driver.h
+.\_build\inv_mpu.o: ..\..\..\..\..\..\components\libraries\delay\nrf_delay.h
+.\_build\inv_mpu.o: ..\..\..\..\..\..\modules\nrfx\nrfx.h
+.\_build\inv_mpu.o: ..\..\..\..\..\..\integration\nrfx\nrfx_config.h
+.\_build\inv_mpu.o: ..\config\sdk_config.h
+.\_build\inv_mpu.o: ..\..\..\..\..\..\modules\nrfx\drivers/nrfx_common.h
+.\_build\inv_mpu.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stddef.h
+.\_build\inv_mpu.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdbool.h
+.\_build\inv_mpu.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf.h
+.\_build\inv_mpu.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf52.h
+.\_build\inv_mpu.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\core_cm4.h
+.\_build\inv_mpu.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\cmsis_version.h
+.\_build\inv_mpu.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\cmsis_compiler.h
+.\_build\inv_mpu.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\cmsis_armcc.h
+.\_build\inv_mpu.o: C:\Users\Administrator\AppData\Local\Arm\Packs\ARM\CMSIS\5.6.0\CMSIS\Core\Include\mpu_armv7.h
+.\_build\inv_mpu.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\system_nrf52.h
+.\_build\inv_mpu.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf52_bitfields.h
+.\_build\inv_mpu.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf51_to_nrf52.h
+.\_build\inv_mpu.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf52_name_change.h
+.\_build\inv_mpu.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\compiler_abstraction.h
+.\_build\inv_mpu.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf_peripherals.h
+.\_build\inv_mpu.o: C:\Users\Administrator\AppData\Local\Arm\Packs\NordicSemiconductor\nRF_DeviceFamilyPack\8.32.1\Device\Include\nrf52832_peripherals.h
+.\_build\inv_mpu.o: ..\..\..\..\..\..\integration\nrfx\nrfx_glue.h
+.\_build\inv_mpu.o: ..\..\..\..\..\..\integration\nrfx\legacy/apply_old_config.h
+.\_build\inv_mpu.o: ..\..\..\..\..\..\modules\nrfx\soc/nrfx_irqs.h
+.\_build\inv_mpu.o: ..\..\..\..\..\..\modules\nrfx\soc/nrfx_irqs_nrf52832.h
+.\_build\inv_mpu.o: ..\..\..\..\..\..\components\libraries\util\nrf_assert.h
+.\_build\inv_mpu.o: ..\..\..\..\..\..\components\libraries\util\app_util.h
+.\_build\inv_mpu.o: ..\..\..\..\..\..\components\libraries\util\nordic_common.h
+.\_build\inv_mpu.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf52\nrf_mbr.h
+.\_build\inv_mpu.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf_svc.h
+.\_build\inv_mpu.o: ..\..\..\..\..\..\components\libraries\util\app_util_platform.h
+.\_build\inv_mpu.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf_soc.h
+.\_build\inv_mpu.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf_error.h
+.\_build\inv_mpu.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf_error_soc.h
+.\_build\inv_mpu.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf_nvic.h
+.\_build\inv_mpu.o: ..\..\..\..\..\..\components\libraries\util\app_error.h
+.\_build\inv_mpu.o: ..\..\..\..\..\..\components\libraries\util\sdk_errors.h
+.\_build\inv_mpu.o: ..\..\..\..\..\..\components\libraries\util\app_error_weak.h
+.\_build\inv_mpu.o: ..\..\..\..\..\..\modules\nrfx\soc/nrfx_coredep.h
+.\_build\inv_mpu.o: ..\..\..\..\..\..\modules\nrfx\soc/nrfx_atomic.h
+.\_build\inv_mpu.o: ..\..\..\..\..\..\modules\nrfx\nrfx.h
+.\_build\inv_mpu.o: ..\..\..\..\..\..\components\libraries\util\sdk_resources.h
+.\_build\inv_mpu.o: ..\..\..\..\..\..\components\softdevice\s132\headers\nrf_sd_def.h
+.\_build\inv_mpu.o: ..\..\..\..\..\..\modules\nrfx\drivers/nrfx_errors.h
+.\_build\inv_mpu.o: ..\..\..\..\..\..\components\drivers_ext\mpu_dpm\mpu6050\mpu6050.h
+.\_build\inv_mpu.o: ..\..\..\..\..\..\components\drivers_nrf\twi_master\deprecated\twi_master.h
+.\_build\inv_mpu.o: ..\..\..\..\..\..\components\libraries\uart\app_uart.h

smart_shoes/nRF5_SDK_17.0.0_9d13099/examples/Shoes_just_traj_20201208/ble_app_uart_03_link_PC/pca10040/s132/arm5_no_packs/_build/inv_mpu_dmp_motion_driver.d

@@ -0,0 +1,12 @@
+.\_build\inv_mpu_dmp_motion_driver.o: ..\..\..\..\..\..\components\drivers_ext\mpu_dpm\driver\eMPL\inv_mpu_dmp_motion_driver.c
+.\_build\inv_mpu_dmp_motion_driver.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdio.h
+.\_build\inv_mpu_dmp_motion_driver.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdint.h
+.\_build\inv_mpu_dmp_motion_driver.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdlib.h
+.\_build\inv_mpu_dmp_motion_driver.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\string.h
+.\_build\inv_mpu_dmp_motion_driver.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\math.h
+.\_build\inv_mpu_dmp_motion_driver.o: ..\..\..\..\..\..\components\drivers_ext\mpu_dpm\driver\eMPL\inv_mpu.h
+.\_build\inv_mpu_dmp_motion_driver.o: ..\..\..\..\..\..\components\drivers_ext\mpu_dpm\driver\eMPL\inv_mpu_dmp_motion_driver.h
+.\_build\inv_mpu_dmp_motion_driver.o: ..\..\..\..\..\..\components\drivers_ext\mpu_dpm\driver\eMPL\dmpKey.h
+.\_build\inv_mpu_dmp_motion_driver.o: ..\..\..\..\..\..\components\drivers_ext\mpu_dpm\driver\eMPL\dmpmap.h
+.\_build\inv_mpu_dmp_motion_driver.o: ..\..\..\..\..\..\components\drivers_ext\mpu_dpm\mpu6050\mpu6050.h
+.\_build\inv_mpu_dmp_motion_driver.o: C:\Keil_v5\ARM\ARMCC\Bin\..\include\stdbool.h