vl53l1_nvm_map.h 59 KB

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  1. /*
  2. * Copyright (c) 2017, STMicroelectronics - All Rights Reserved
  3. *
  4. * This file is part of VL53L1 Core and is dual licensed,
  5. * either 'STMicroelectronics
  6. * Proprietary license'
  7. * or 'BSD 3-clause "New" or "Revised" License' , at your option.
  8. *
  9. ********************************************************************************
  10. *
  11. * 'STMicroelectronics Proprietary license'
  12. *
  13. ********************************************************************************
  14. *
  15. * License terms: STMicroelectronics Proprietary in accordance with licensing
  16. * terms at www.st.com/sla0081
  17. *
  18. * STMicroelectronics confidential
  19. * Reproduction and Communication of this document is strictly prohibited unless
  20. * specifically authorized in writing by STMicroelectronics.
  21. *
  22. *
  23. ********************************************************************************
  24. *
  25. * Alternatively, VL53L1 Core may be distributed under the terms of
  26. * 'BSD 3-clause "New" or "Revised" License', in which case the following
  27. * provisions apply instead of the ones mentioned above :
  28. *
  29. ********************************************************************************
  30. *
  31. * License terms: BSD 3-clause "New" or "Revised" License.
  32. *
  33. * Redistribution and use in source and binary forms, with or without
  34. * modification, are permitted provided that the following conditions are met:
  35. *
  36. * 1. Redistributions of source code must retain the above copyright notice, this
  37. * list of conditions and the following disclaimer.
  38. *
  39. * 2. Redistributions in binary form must reproduce the above copyright notice,
  40. * this list of conditions and the following disclaimer in the documentation
  41. * and/or other materials provided with the distribution.
  42. *
  43. * 3. Neither the name of the copyright holder nor the names of its contributors
  44. * may be used to endorse or promote products derived from this software
  45. * without specific prior written permission.
  46. *
  47. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  48. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  49. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  50. * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  51. * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  52. * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  53. * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  54. * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  55. * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  56. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  57. *
  58. *
  59. ********************************************************************************
  60. *
  61. */
  62. /**
  63. * @file vl53l1_nvm_map.h
  64. * @brief NVM Map definitions for EwokPlus25 NVM Interface Functions.
  65. *
  66. */
  67. /*
  68. * Include platform specific and register map definitions
  69. */
  70. #ifndef _VL53L1_NVM_MAP_H_
  71. #define _VL53L1_NVM_MAP_H_
  72. #ifdef __cplusplus
  73. extern "C"
  74. {
  75. #endif
  76. /** @defgroup VL53L1_nvm_DefineRegisters_group Define Registers * @brief List of all the defined registers
  77. * @{
  78. */
  79. #define VL53L1_NVM__IDENTIFICATION__MODEL_ID 0x0008
  80. /*!<
  81. type: uint8_t \n
  82. default: 0x00 \n
  83. info: \n
  84. - msb = 7
  85. - lsb = 0
  86. - i2c_size = 1
  87. groups: \n
  88. ['decoded_nvm_data']
  89. fields: \n
  90. - [7:0] = nvm__identification_model_id
  91. */
  92. #define VL53L1_NVM__IDENTIFICATION__MODULE_TYPE 0x000C
  93. /*!<
  94. type: uint8_t \n
  95. default: 0x00 \n
  96. info: \n
  97. - msb = 7
  98. - lsb = 0
  99. - i2c_size = 1
  100. groups: \n
  101. ['decoded_nvm_data']
  102. fields: \n
  103. - [7:0] = nvm__identification_module_type
  104. */
  105. #define VL53L1_NVM__IDENTIFICATION__REVISION_ID 0x000D
  106. /*!<
  107. type: uint8_t \n
  108. default: 0x00 \n
  109. info: \n
  110. - msb = 3
  111. - lsb = 0
  112. - i2c_size = 1
  113. groups: \n
  114. ['decoded_nvm_data']
  115. fields: \n
  116. - [3:0] = nvm__identification_revision_id
  117. */
  118. #define VL53L1_NVM__IDENTIFICATION__MODULE_ID 0x000E
  119. /*!<
  120. type: uint16_t \n
  121. default: 0x0000 \n
  122. info: \n
  123. - msb = 15
  124. - lsb = 0
  125. - i2c_size = 2
  126. groups: \n
  127. ['decoded_nvm_data']
  128. fields: \n
  129. - [15:0] = nvm__identification_module_id
  130. */
  131. #define VL53L1_NVM__I2C_VALID 0x0010
  132. /*!<
  133. type: uint8_t \n
  134. default: 0x00 \n
  135. info: \n
  136. - msb = 7
  137. - lsb = 0
  138. - i2c_size = 1
  139. groups: \n
  140. ['decoded_nvm_data']
  141. fields: \n
  142. - [7:0] = nvm__i2c_valid
  143. */
  144. #define VL53L1_NVM__I2C_SLAVE__DEVICE_ADDRESS 0x0011
  145. /*!<
  146. type: uint8_t \n
  147. default: 0x00 \n
  148. info: \n
  149. - msb = 7
  150. - lsb = 0
  151. - i2c_size = 1
  152. groups: \n
  153. ['decoded_nvm_data']
  154. fields: \n
  155. - [7:0] = nvm__i2c_device_address_ews
  156. */
  157. #define VL53L1_NVM__EWS__OSC_MEASURED__FAST_OSC_FREQUENCY 0x0014
  158. /*!<
  159. type: uint16_t \n
  160. default: 0x0000 \n
  161. info: \n
  162. - msb = 15
  163. - lsb = 0
  164. - i2c_size = 2
  165. groups: \n
  166. ['decoded_nvm_data']
  167. fields: \n
  168. - [15:0] = nvm__ews__fast_osc_frequency (fixed point 4.12)
  169. */
  170. #define VL53L1_NVM__EWS__FAST_OSC_TRIM_MAX 0x0016
  171. /*!<
  172. type: uint8_t \n
  173. default: 0x00 \n
  174. info: \n
  175. - msb = 6
  176. - lsb = 0
  177. - i2c_size = 1
  178. groups: \n
  179. ['decoded_nvm_data']
  180. fields: \n
  181. - [6:0] = nvm__ews__fast_osc_trim_max
  182. */
  183. #define VL53L1_NVM__EWS__FAST_OSC_FREQ_SET 0x0017
  184. /*!<
  185. type: uint8_t \n
  186. default: 0x00 \n
  187. info: \n
  188. - msb = 2
  189. - lsb = 0
  190. - i2c_size = 1
  191. groups: \n
  192. ['decoded_nvm_data']
  193. fields: \n
  194. - [2:0] = nvm__ews__fast_osc_freq_set
  195. */
  196. #define VL53L1_NVM__EWS__SLOW_OSC_CALIBRATION 0x0018
  197. /*!<
  198. type: uint16_t \n
  199. default: 0x0000 \n
  200. info: \n
  201. - msb = 9
  202. - lsb = 0
  203. - i2c_size = 2
  204. groups: \n
  205. ['decoded_nvm_data']
  206. fields: \n
  207. - [9:0] = nvm__ews__slow_osc_calibration
  208. */
  209. #define VL53L1_NVM__FMT__OSC_MEASURED__FAST_OSC_FREQUENCY 0x001C
  210. /*!<
  211. type: uint16_t \n
  212. default: 0x0000 \n
  213. info: \n
  214. - msb = 15
  215. - lsb = 0
  216. - i2c_size = 2
  217. groups: \n
  218. ['decoded_nvm_data']
  219. fields: \n
  220. - [15:0] = nvm__fmt__fast_osc_frequency (fixed point 4.12)
  221. */
  222. #define VL53L1_NVM__FMT__FAST_OSC_TRIM_MAX 0x001E
  223. /*!<
  224. type: uint8_t \n
  225. default: 0x00 \n
  226. info: \n
  227. - msb = 6
  228. - lsb = 0
  229. - i2c_size = 1
  230. groups: \n
  231. ['decoded_nvm_data']
  232. fields: \n
  233. - [6:0] = nvm__fmt__fast_osc_trim_max
  234. */
  235. #define VL53L1_NVM__FMT__FAST_OSC_FREQ_SET 0x001F
  236. /*!<
  237. type: uint8_t \n
  238. default: 0x00 \n
  239. info: \n
  240. - msb = 2
  241. - lsb = 0
  242. - i2c_size = 1
  243. groups: \n
  244. ['decoded_nvm_data']
  245. fields: \n
  246. - [2:0] = nvm__fmt__fast_osc_freq_set
  247. */
  248. #define VL53L1_NVM__FMT__SLOW_OSC_CALIBRATION 0x0020
  249. /*!<
  250. type: uint16_t \n
  251. default: 0x0000 \n
  252. info: \n
  253. - msb = 9
  254. - lsb = 0
  255. - i2c_size = 2
  256. groups: \n
  257. ['decoded_nvm_data']
  258. fields: \n
  259. - [9:0] = nvm__fmt__slow_osc_calibration
  260. */
  261. #define VL53L1_NVM__VHV_CONFIG_UNLOCK 0x0028
  262. /*!<
  263. type: uint8_t \n
  264. default: 0x00 \n
  265. info: \n
  266. - msb = 7
  267. - lsb = 0
  268. - i2c_size = 1
  269. groups: \n
  270. ['decoded_nvm_data']
  271. fields: \n
  272. - [7:0] = nvm__vhv_config_unlock
  273. */
  274. #define VL53L1_NVM__REF_SELVDDPIX 0x0029
  275. /*!<
  276. type: uint8_t \n
  277. default: 0x00 \n
  278. info: \n
  279. - msb = 3
  280. - lsb = 0
  281. - i2c_size = 1
  282. groups: \n
  283. ['decoded_nvm_data']
  284. fields: \n
  285. - [3:0] = nvm__ref_selvddpix
  286. */
  287. #define VL53L1_NVM__REF_SELVQUENCH 0x002A
  288. /*!<
  289. type: uint8_t \n
  290. default: 0x00 \n
  291. info: \n
  292. - msb = 6
  293. - lsb = 3
  294. - i2c_size = 1
  295. groups: \n
  296. ['decoded_nvm_data']
  297. fields: \n
  298. - [6:3] = nvm__ref_selvquench
  299. */
  300. #define VL53L1_NVM__REGAVDD1V2_SEL_REGDVDD1V2_SEL 0x002B
  301. /*!<
  302. type: uint8_t \n
  303. default: 0x00 \n
  304. info: \n
  305. - msb = 3
  306. - lsb = 0
  307. - i2c_size = 1
  308. groups: \n
  309. ['decoded_nvm_data']
  310. fields: \n
  311. - [3:2] = nvm__regavdd1v2_sel
  312. - [1:0] = nvm__regdvdd1v2_sel
  313. */
  314. #define VL53L1_NVM__VHV_CONFIG__TIMEOUT_MACROP_LOOP_BOUND 0x002C
  315. /*!<
  316. type: uint8_t \n
  317. default: 0x00 \n
  318. info: \n
  319. - msb = 7
  320. - lsb = 0
  321. - i2c_size = 1
  322. groups: \n
  323. ['decoded_nvm_data']
  324. fields: \n
  325. - [1:0] = nvm__vhv_timeout__macrop
  326. - [7:2] = nvm__vhv_loop_bound
  327. */
  328. #define VL53L1_NVM__VHV_CONFIG__COUNT_THRESH 0x002D
  329. /*!<
  330. type: uint8_t \n
  331. default: 0x00 \n
  332. info: \n
  333. - msb = 7
  334. - lsb = 0
  335. - i2c_size = 1
  336. groups: \n
  337. ['decoded_nvm_data']
  338. fields: \n
  339. - [7:0] = nvm__vhv_count_threshold
  340. */
  341. #define VL53L1_NVM__VHV_CONFIG__OFFSET 0x002E
  342. /*!<
  343. type: uint8_t \n
  344. default: 0x00 \n
  345. info: \n
  346. - msb = 5
  347. - lsb = 0
  348. - i2c_size = 1
  349. groups: \n
  350. ['decoded_nvm_data']
  351. fields: \n
  352. - [5:0] = nvm__vhv_offset
  353. */
  354. #define VL53L1_NVM__VHV_CONFIG__INIT 0x002F
  355. /*!<
  356. type: uint8_t \n
  357. default: 0x00 \n
  358. info: \n
  359. - msb = 7
  360. - lsb = 0
  361. - i2c_size = 1
  362. groups: \n
  363. ['decoded_nvm_data']
  364. fields: \n
  365. - [7] = nvm__vhv_init_enable
  366. - [5:0] = nvm__vhv_init_value
  367. */
  368. #define VL53L1_NVM__LASER_SAFETY__VCSEL_TRIM_LL 0x0030
  369. /*!<
  370. type: uint8_t \n
  371. default: 0x00 \n
  372. info: \n
  373. - msb = 2
  374. - lsb = 0
  375. - i2c_size = 1
  376. groups: \n
  377. ['decoded_nvm_data']
  378. fields: \n
  379. - [2:0] = nvm__laser_safety_vcsel_trim_ll
  380. */
  381. #define VL53L1_NVM__LASER_SAFETY__VCSEL_SELION_LL 0x0031
  382. /*!<
  383. type: uint8_t \n
  384. default: 0x00 \n
  385. info: \n
  386. - msb = 5
  387. - lsb = 0
  388. - i2c_size = 1
  389. groups: \n
  390. ['decoded_nvm_data']
  391. fields: \n
  392. - [5:0] = nvm__laser_safety_vcsel_selion_ll
  393. */
  394. #define VL53L1_NVM__LASER_SAFETY__VCSEL_SELION_MAX_LL 0x0032
  395. /*!<
  396. type: uint8_t \n
  397. default: 0x00 \n
  398. info: \n
  399. - msb = 5
  400. - lsb = 0
  401. - i2c_size = 1
  402. groups: \n
  403. ['decoded_nvm_data']
  404. fields: \n
  405. - [5:0] = nvm__laser_safety_vcsel_selion_max_ll
  406. */
  407. #define VL53L1_NVM__LASER_SAFETY__MULT_LL 0x0034
  408. /*!<
  409. type: uint8_t \n
  410. default: 0x00 \n
  411. info: \n
  412. - msb = 5
  413. - lsb = 0
  414. - i2c_size = 1
  415. groups: \n
  416. ['decoded_nvm_data']
  417. fields: \n
  418. - [5:0] = nvm__laser_safety_mult_ll
  419. */
  420. #define VL53L1_NVM__LASER_SAFETY__CLIP_LL 0x0035
  421. /*!<
  422. type: uint8_t \n
  423. default: 0x00 \n
  424. info: \n
  425. - msb = 5
  426. - lsb = 0
  427. - i2c_size = 1
  428. groups: \n
  429. ['decoded_nvm_data']
  430. fields: \n
  431. - [5:0] = nvm__laser_safety_clip_ll
  432. */
  433. #define VL53L1_NVM__LASER_SAFETY__VCSEL_TRIM_LD 0x0038
  434. /*!<
  435. type: uint8_t \n
  436. default: 0x00 \n
  437. info: \n
  438. - msb = 2
  439. - lsb = 0
  440. - i2c_size = 1
  441. groups: \n
  442. ['decoded_nvm_data']
  443. fields: \n
  444. - [2:0] = nvm__laser_safety_vcsel_trim_ld
  445. */
  446. #define VL53L1_NVM__LASER_SAFETY__VCSEL_SELION_LD 0x0039
  447. /*!<
  448. type: uint8_t \n
  449. default: 0x00 \n
  450. info: \n
  451. - msb = 5
  452. - lsb = 0
  453. - i2c_size = 1
  454. groups: \n
  455. ['decoded_nvm_data']
  456. fields: \n
  457. - [5:0] = nvm__laser_safety_vcsel_selion_ld
  458. */
  459. #define VL53L1_NVM__LASER_SAFETY__VCSEL_SELION_MAX_LD 0x003A
  460. /*!<
  461. type: uint8_t \n
  462. default: 0x00 \n
  463. info: \n
  464. - msb = 5
  465. - lsb = 0
  466. - i2c_size = 1
  467. groups: \n
  468. ['decoded_nvm_data']
  469. fields: \n
  470. - [5:0] = nvm__laser_safety_vcsel_selion_max_ld
  471. */
  472. #define VL53L1_NVM__LASER_SAFETY__MULT_LD 0x003C
  473. /*!<
  474. type: uint8_t \n
  475. default: 0x00 \n
  476. info: \n
  477. - msb = 5
  478. - lsb = 0
  479. - i2c_size = 1
  480. groups: \n
  481. ['decoded_nvm_data']
  482. fields: \n
  483. - [5:0] = nvm__laser_safety_mult_ld
  484. */
  485. #define VL53L1_NVM__LASER_SAFETY__CLIP_LD 0x003D
  486. /*!<
  487. type: uint8_t \n
  488. default: 0x00 \n
  489. info: \n
  490. - msb = 5
  491. - lsb = 0
  492. - i2c_size = 1
  493. groups: \n
  494. ['decoded_nvm_data']
  495. fields: \n
  496. - [5:0] = nvm__laser_safety_clip_ld
  497. */
  498. #define VL53L1_NVM__LASER_SAFETY_LOCK_BYTE 0x0040
  499. /*!<
  500. type: uint8_t \n
  501. default: 0x00 \n
  502. info: \n
  503. - msb = 7
  504. - lsb = 0
  505. - i2c_size = 1
  506. groups: \n
  507. ['decoded_nvm_data']
  508. fields: \n
  509. - [7:0] = nvm__laser_safety_lock_byte
  510. */
  511. #define VL53L1_NVM__LASER_SAFETY_UNLOCK_BYTE 0x0044
  512. /*!<
  513. type: uint8_t \n
  514. default: 0x00 \n
  515. info: \n
  516. - msb = 7
  517. - lsb = 0
  518. - i2c_size = 1
  519. groups: \n
  520. ['decoded_nvm_data']
  521. fields: \n
  522. - [7:0] = nvm__laser_safety_unlock_byte
  523. */
  524. #define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_0_ 0x0048
  525. /*!<
  526. type: uint8_t \n
  527. default: 0x00 \n
  528. info: \n
  529. - msb = 7
  530. - lsb = 0
  531. - i2c_size = 1
  532. groups: \n
  533. ['decoded_nvm_data']
  534. fields: \n
  535. - [7:0] = nvm__ews__spad_enables_rtn_0_
  536. */
  537. #define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_1_ 0x0049
  538. /*!<
  539. type: uint8_t \n
  540. default: 0x00 \n
  541. info: \n
  542. - msb = 7
  543. - lsb = 0
  544. - i2c_size = 1
  545. groups: \n
  546. ['decoded_nvm_data']
  547. fields: \n
  548. - [7:0] = nvm__ews__spad_enables_rtn_1_
  549. */
  550. #define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_2_ 0x004A
  551. /*!<
  552. type: uint8_t \n
  553. default: 0x00 \n
  554. info: \n
  555. - msb = 7
  556. - lsb = 0
  557. - i2c_size = 1
  558. groups: \n
  559. ['decoded_nvm_data']
  560. fields: \n
  561. - [7:0] = nvm__ews__spad_enables_rtn_2_
  562. */
  563. #define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_3_ 0x004B
  564. /*!<
  565. type: uint8_t \n
  566. default: 0x00 \n
  567. info: \n
  568. - msb = 7
  569. - lsb = 0
  570. - i2c_size = 1
  571. groups: \n
  572. ['decoded_nvm_data']
  573. fields: \n
  574. - [7:0] = nvm__ews__spad_enables_rtn_3_
  575. */
  576. #define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_4_ 0x004C
  577. /*!<
  578. type: uint8_t \n
  579. default: 0x00 \n
  580. info: \n
  581. - msb = 7
  582. - lsb = 0
  583. - i2c_size = 1
  584. groups: \n
  585. ['decoded_nvm_data']
  586. fields: \n
  587. - [7:0] = nvm__ews__spad_enables_rtn_4_
  588. */
  589. #define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_5_ 0x004D
  590. /*!<
  591. type: uint8_t \n
  592. default: 0x00 \n
  593. info: \n
  594. - msb = 7
  595. - lsb = 0
  596. - i2c_size = 1
  597. groups: \n
  598. ['decoded_nvm_data']
  599. fields: \n
  600. - [7:0] = nvm__ews__spad_enables_rtn_5_
  601. */
  602. #define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_6_ 0x004E
  603. /*!<
  604. type: uint8_t \n
  605. default: 0x00 \n
  606. info: \n
  607. - msb = 7
  608. - lsb = 0
  609. - i2c_size = 1
  610. groups: \n
  611. ['decoded_nvm_data']
  612. fields: \n
  613. - [7:0] = nvm__ews__spad_enables_rtn_6_
  614. */
  615. #define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_7_ 0x004F
  616. /*!<
  617. type: uint8_t \n
  618. default: 0x00 \n
  619. info: \n
  620. - msb = 7
  621. - lsb = 0
  622. - i2c_size = 1
  623. groups: \n
  624. ['decoded_nvm_data']
  625. fields: \n
  626. - [7:0] = nvm__ews__spad_enables_rtn_7_
  627. */
  628. #define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_8_ 0x0050
  629. /*!<
  630. type: uint8_t \n
  631. default: 0x00 \n
  632. info: \n
  633. - msb = 7
  634. - lsb = 0
  635. - i2c_size = 1
  636. groups: \n
  637. ['decoded_nvm_data']
  638. fields: \n
  639. - [7:0] = nvm__ews__spad_enables_rtn_8_
  640. */
  641. #define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_9_ 0x0051
  642. /*!<
  643. type: uint8_t \n
  644. default: 0x00 \n
  645. info: \n
  646. - msb = 7
  647. - lsb = 0
  648. - i2c_size = 1
  649. groups: \n
  650. ['decoded_nvm_data']
  651. fields: \n
  652. - [7:0] = nvm__ews__spad_enables_rtn_9_
  653. */
  654. #define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_10_ 0x0052
  655. /*!<
  656. type: uint8_t \n
  657. default: 0x00 \n
  658. info: \n
  659. - msb = 7
  660. - lsb = 0
  661. - i2c_size = 1
  662. groups: \n
  663. ['decoded_nvm_data']
  664. fields: \n
  665. - [7:0] = nvm__ews__spad_enables_rtn_10_
  666. */
  667. #define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_11_ 0x0053
  668. /*!<
  669. type: uint8_t \n
  670. default: 0x00 \n
  671. info: \n
  672. - msb = 7
  673. - lsb = 0
  674. - i2c_size = 1
  675. groups: \n
  676. ['decoded_nvm_data']
  677. fields: \n
  678. - [7:0] = nvm__ews__spad_enables_rtn_11_
  679. */
  680. #define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_12_ 0x0054
  681. /*!<
  682. type: uint8_t \n
  683. default: 0x00 \n
  684. info: \n
  685. - msb = 7
  686. - lsb = 0
  687. - i2c_size = 1
  688. groups: \n
  689. ['decoded_nvm_data']
  690. fields: \n
  691. - [7:0] = nvm__ews__spad_enables_rtn_12_
  692. */
  693. #define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_13_ 0x0055
  694. /*!<
  695. type: uint8_t \n
  696. default: 0x00 \n
  697. info: \n
  698. - msb = 7
  699. - lsb = 0
  700. - i2c_size = 1
  701. groups: \n
  702. ['decoded_nvm_data']
  703. fields: \n
  704. - [7:0] = nvm__ews__spad_enables_rtn_13_
  705. */
  706. #define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_14_ 0x0056
  707. /*!<
  708. type: uint8_t \n
  709. default: 0x00 \n
  710. info: \n
  711. - msb = 7
  712. - lsb = 0
  713. - i2c_size = 1
  714. groups: \n
  715. ['decoded_nvm_data']
  716. fields: \n
  717. - [7:0] = nvm__ews__spad_enables_rtn_14_
  718. */
  719. #define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_15_ 0x0057
  720. /*!<
  721. type: uint8_t \n
  722. default: 0x00 \n
  723. info: \n
  724. - msb = 7
  725. - lsb = 0
  726. - i2c_size = 1
  727. groups: \n
  728. ['decoded_nvm_data']
  729. fields: \n
  730. - [7:0] = nvm__ews__spad_enables_rtn_15_
  731. */
  732. #define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_16_ 0x0058
  733. /*!<
  734. type: uint8_t \n
  735. default: 0x00 \n
  736. info: \n
  737. - msb = 7
  738. - lsb = 0
  739. - i2c_size = 1
  740. groups: \n
  741. ['decoded_nvm_data']
  742. fields: \n
  743. - [7:0] = nvm__ews__spad_enables_rtn_16_
  744. */
  745. #define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_17_ 0x0059
  746. /*!<
  747. type: uint8_t \n
  748. default: 0x00 \n
  749. info: \n
  750. - msb = 7
  751. - lsb = 0
  752. - i2c_size = 1
  753. groups: \n
  754. ['decoded_nvm_data']
  755. fields: \n
  756. - [7:0] = nvm__ews__spad_enables_rtn_17_
  757. */
  758. #define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_18_ 0x005A
  759. /*!<
  760. type: uint8_t \n
  761. default: 0x00 \n
  762. info: \n
  763. - msb = 7
  764. - lsb = 0
  765. - i2c_size = 1
  766. groups: \n
  767. ['decoded_nvm_data']
  768. fields: \n
  769. - [7:0] = nvm__ews__spad_enables_rtn_18_
  770. */
  771. #define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_19_ 0x005B
  772. /*!<
  773. type: uint8_t \n
  774. default: 0x00 \n
  775. info: \n
  776. - msb = 7
  777. - lsb = 0
  778. - i2c_size = 1
  779. groups: \n
  780. ['decoded_nvm_data']
  781. fields: \n
  782. - [7:0] = nvm__ews__spad_enables_rtn_19_
  783. */
  784. #define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_20_ 0x005C
  785. /*!<
  786. type: uint8_t \n
  787. default: 0x00 \n
  788. info: \n
  789. - msb = 7
  790. - lsb = 0
  791. - i2c_size = 1
  792. groups: \n
  793. ['decoded_nvm_data']
  794. fields: \n
  795. - [7:0] = nvm__ews__spad_enables_rtn_20_
  796. */
  797. #define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_21_ 0x005D
  798. /*!<
  799. type: uint8_t \n
  800. default: 0x00 \n
  801. info: \n
  802. - msb = 7
  803. - lsb = 0
  804. - i2c_size = 1
  805. groups: \n
  806. ['decoded_nvm_data']
  807. fields: \n
  808. - [7:0] = nvm__ews__spad_enables_rtn_21_
  809. */
  810. #define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_22_ 0x005E
  811. /*!<
  812. type: uint8_t \n
  813. default: 0x00 \n
  814. info: \n
  815. - msb = 7
  816. - lsb = 0
  817. - i2c_size = 1
  818. groups: \n
  819. ['decoded_nvm_data']
  820. fields: \n
  821. - [7:0] = nvm__ews__spad_enables_rtn_22_
  822. */
  823. #define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_23_ 0x005F
  824. /*!<
  825. type: uint8_t \n
  826. default: 0x00 \n
  827. info: \n
  828. - msb = 7
  829. - lsb = 0
  830. - i2c_size = 1
  831. groups: \n
  832. ['decoded_nvm_data']
  833. fields: \n
  834. - [7:0] = nvm__ews__spad_enables_rtn_23_
  835. */
  836. #define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_24_ 0x0060
  837. /*!<
  838. type: uint8_t \n
  839. default: 0x00 \n
  840. info: \n
  841. - msb = 7
  842. - lsb = 0
  843. - i2c_size = 1
  844. groups: \n
  845. ['decoded_nvm_data']
  846. fields: \n
  847. - [7:0] = nvm__ews__spad_enables_rtn_24_
  848. */
  849. #define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_25_ 0x0061
  850. /*!<
  851. type: uint8_t \n
  852. default: 0x00 \n
  853. info: \n
  854. - msb = 7
  855. - lsb = 0
  856. - i2c_size = 1
  857. groups: \n
  858. ['decoded_nvm_data']
  859. fields: \n
  860. - [7:0] = nvm__ews__spad_enables_rtn_25_
  861. */
  862. #define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_26_ 0x0062
  863. /*!<
  864. type: uint8_t \n
  865. default: 0x00 \n
  866. info: \n
  867. - msb = 7
  868. - lsb = 0
  869. - i2c_size = 1
  870. groups: \n
  871. ['decoded_nvm_data']
  872. fields: \n
  873. - [7:0] = nvm__ews__spad_enables_rtn_26_
  874. */
  875. #define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_27_ 0x0063
  876. /*!<
  877. type: uint8_t \n
  878. default: 0x00 \n
  879. info: \n
  880. - msb = 7
  881. - lsb = 0
  882. - i2c_size = 1
  883. groups: \n
  884. ['decoded_nvm_data']
  885. fields: \n
  886. - [7:0] = nvm__ews__spad_enables_rtn_27_
  887. */
  888. #define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_28_ 0x0064
  889. /*!<
  890. type: uint8_t \n
  891. default: 0x00 \n
  892. info: \n
  893. - msb = 7
  894. - lsb = 0
  895. - i2c_size = 1
  896. groups: \n
  897. ['decoded_nvm_data']
  898. fields: \n
  899. - [7:0] = nvm__ews__spad_enables_rtn_28_
  900. */
  901. #define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_29_ 0x0065
  902. /*!<
  903. type: uint8_t \n
  904. default: 0x00 \n
  905. info: \n
  906. - msb = 7
  907. - lsb = 0
  908. - i2c_size = 1
  909. groups: \n
  910. ['decoded_nvm_data']
  911. fields: \n
  912. - [7:0] = nvm__ews__spad_enables_rtn_29_
  913. */
  914. #define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_30_ 0x0066
  915. /*!<
  916. type: uint8_t \n
  917. default: 0x00 \n
  918. info: \n
  919. - msb = 7
  920. - lsb = 0
  921. - i2c_size = 1
  922. groups: \n
  923. ['decoded_nvm_data']
  924. fields: \n
  925. - [7:0] = nvm__ews__spad_enables_rtn_30_
  926. */
  927. #define VL53L1_NVM__EWS__SPAD_ENABLES_RTN_31_ 0x0067
  928. /*!<
  929. type: uint8_t \n
  930. default: 0x00 \n
  931. info: \n
  932. - msb = 7
  933. - lsb = 0
  934. - i2c_size = 1
  935. groups: \n
  936. ['decoded_nvm_data']
  937. fields: \n
  938. - [7:0] = nvm__ews__spad_enables_rtn_31_
  939. */
  940. #define VL53L1_NVM__EWS__SPAD_ENABLES_REF__LOC1_0_ 0x0068
  941. /*!<
  942. type: uint8_t \n
  943. default: 0x00 \n
  944. info: \n
  945. - msb = 7
  946. - lsb = 0
  947. - i2c_size = 1
  948. groups: \n
  949. ['decoded_nvm_data']
  950. fields: \n
  951. - [7:0] = nvm__ews__spad_enables_ref__loc1_0_
  952. */
  953. #define VL53L1_NVM__EWS__SPAD_ENABLES_REF__LOC1_1_ 0x0069
  954. /*!<
  955. type: uint8_t \n
  956. default: 0x00 \n
  957. info: \n
  958. - msb = 7
  959. - lsb = 0
  960. - i2c_size = 1
  961. groups: \n
  962. ['decoded_nvm_data']
  963. fields: \n
  964. - [7:0] = nvm__ews__spad_enables_ref__loc1_1_
  965. */
  966. #define VL53L1_NVM__EWS__SPAD_ENABLES_REF__LOC1_2_ 0x006A
  967. /*!<
  968. type: uint8_t \n
  969. default: 0x00 \n
  970. info: \n
  971. - msb = 7
  972. - lsb = 0
  973. - i2c_size = 1
  974. groups: \n
  975. ['decoded_nvm_data']
  976. fields: \n
  977. - [7:0] = nvm__ews__spad_enables_ref__loc1_2_
  978. */
  979. #define VL53L1_NVM__EWS__SPAD_ENABLES_REF__LOC1_3_ 0x006B
  980. /*!<
  981. type: uint8_t \n
  982. default: 0x00 \n
  983. info: \n
  984. - msb = 7
  985. - lsb = 0
  986. - i2c_size = 1
  987. groups: \n
  988. ['decoded_nvm_data']
  989. fields: \n
  990. - [7:0] = nvm__ews__spad_enables_ref__loc1_3_
  991. */
  992. #define VL53L1_NVM__EWS__SPAD_ENABLES_REF__LOC1_4_ 0x006C
  993. /*!<
  994. type: uint8_t \n
  995. default: 0x00 \n
  996. info: \n
  997. - msb = 7
  998. - lsb = 0
  999. - i2c_size = 1
  1000. groups: \n
  1001. ['decoded_nvm_data']
  1002. fields: \n
  1003. - [7:0] = nvm__ews__spad_enables_ref__loc1_4_
  1004. */
  1005. #define VL53L1_NVM__EWS__SPAD_ENABLES_REF__LOC1_5_ 0x006D
  1006. /*!<
  1007. type: uint8_t \n
  1008. default: 0x00 \n
  1009. info: \n
  1010. - msb = 7
  1011. - lsb = 0
  1012. - i2c_size = 1
  1013. groups: \n
  1014. ['decoded_nvm_data']
  1015. fields: \n
  1016. - [7:0] = nvm__ews__spad_enables_ref__loc1_5_
  1017. */
  1018. #define VL53L1_NVM__EWS__SPAD_ENABLES_REF__LOC2_0_ 0x0070
  1019. /*!<
  1020. type: uint8_t \n
  1021. default: 0x00 \n
  1022. info: \n
  1023. - msb = 7
  1024. - lsb = 0
  1025. - i2c_size = 1
  1026. groups: \n
  1027. ['decoded_nvm_data']
  1028. fields: \n
  1029. - [7:0] = nvm__ews__spad_enables_ref__loc2_0_
  1030. */
  1031. #define VL53L1_NVM__EWS__SPAD_ENABLES_REF__LOC2_1_ 0x0071
  1032. /*!<
  1033. type: uint8_t \n
  1034. default: 0x00 \n
  1035. info: \n
  1036. - msb = 7
  1037. - lsb = 0
  1038. - i2c_size = 1
  1039. groups: \n
  1040. ['decoded_nvm_data']
  1041. fields: \n
  1042. - [7:0] = nvm__ews__spad_enables_ref__loc2_1_
  1043. */
  1044. #define VL53L1_NVM__EWS__SPAD_ENABLES_REF__LOC2_2_ 0x0072
  1045. /*!<
  1046. type: uint8_t \n
  1047. default: 0x00 \n
  1048. info: \n
  1049. - msb = 7
  1050. - lsb = 0
  1051. - i2c_size = 1
  1052. groups: \n
  1053. ['decoded_nvm_data']
  1054. fields: \n
  1055. - [7:0] = nvm__ews__spad_enables_ref__loc2_2_
  1056. */
  1057. #define VL53L1_NVM__EWS__SPAD_ENABLES_REF__LOC2_3_ 0x0073
  1058. /*!<
  1059. type: uint8_t \n
  1060. default: 0x00 \n
  1061. info: \n
  1062. - msb = 7
  1063. - lsb = 0
  1064. - i2c_size = 1
  1065. groups: \n
  1066. ['decoded_nvm_data']
  1067. fields: \n
  1068. - [7:0] = nvm__ews__spad_enables_ref__loc2_3_
  1069. */
  1070. #define VL53L1_NVM__EWS__SPAD_ENABLES_REF__LOC2_4_ 0x0074
  1071. /*!<
  1072. type: uint8_t \n
  1073. default: 0x00 \n
  1074. info: \n
  1075. - msb = 7
  1076. - lsb = 0
  1077. - i2c_size = 1
  1078. groups: \n
  1079. ['decoded_nvm_data']
  1080. fields: \n
  1081. - [7:0] = nvm__ews__spad_enables_ref__loc2_4_
  1082. */
  1083. #define VL53L1_NVM__EWS__SPAD_ENABLES_REF__LOC2_5_ 0x0075
  1084. /*!<
  1085. type: uint8_t \n
  1086. default: 0x00 \n
  1087. info: \n
  1088. - msb = 7
  1089. - lsb = 0
  1090. - i2c_size = 1
  1091. groups: \n
  1092. ['decoded_nvm_data']
  1093. fields: \n
  1094. - [7:0] = nvm__ews__spad_enables_ref__loc2_5_
  1095. */
  1096. #define VL53L1_NVM__EWS__SPAD_ENABLES_REF__LOC3_0_ 0x0078
  1097. /*!<
  1098. type: uint8_t \n
  1099. default: 0x00 \n
  1100. info: \n
  1101. - msb = 7
  1102. - lsb = 0
  1103. - i2c_size = 1
  1104. groups: \n
  1105. ['decoded_nvm_data']
  1106. fields: \n
  1107. - [7:0] = nvm__ews__spad_enables_ref__loc3_0_
  1108. */
  1109. #define VL53L1_NVM__EWS__SPAD_ENABLES_REF__LOC3_1_ 0x0079
  1110. /*!<
  1111. type: uint8_t \n
  1112. default: 0x00 \n
  1113. info: \n
  1114. - msb = 7
  1115. - lsb = 0
  1116. - i2c_size = 1
  1117. groups: \n
  1118. ['decoded_nvm_data']
  1119. fields: \n
  1120. - [7:0] = nvm__ews__spad_enables_ref__loc3_1_
  1121. */
  1122. #define VL53L1_NVM__EWS__SPAD_ENABLES_REF__LOC3_2_ 0x007A
  1123. /*!<
  1124. type: uint8_t \n
  1125. default: 0x00 \n
  1126. info: \n
  1127. - msb = 7
  1128. - lsb = 0
  1129. - i2c_size = 1
  1130. groups: \n
  1131. ['decoded_nvm_data']
  1132. fields: \n
  1133. - [7:0] = nvm__ews__spad_enables_ref__loc3_2_
  1134. */
  1135. #define VL53L1_NVM__EWS__SPAD_ENABLES_REF__LOC3_3_ 0x007B
  1136. /*!<
  1137. type: uint8_t \n
  1138. default: 0x00 \n
  1139. info: \n
  1140. - msb = 7
  1141. - lsb = 0
  1142. - i2c_size = 1
  1143. groups: \n
  1144. ['decoded_nvm_data']
  1145. fields: \n
  1146. - [7:0] = nvm__ews__spad_enables_ref__loc3_3_
  1147. */
  1148. #define VL53L1_NVM__EWS__SPAD_ENABLES_REF__LOC3_4_ 0x007C
  1149. /*!<
  1150. type: uint8_t \n
  1151. default: 0x00 \n
  1152. info: \n
  1153. - msb = 7
  1154. - lsb = 0
  1155. - i2c_size = 1
  1156. groups: \n
  1157. ['decoded_nvm_data']
  1158. fields: \n
  1159. - [7:0] = nvm__ews__spad_enables_ref__loc3_4_
  1160. */
  1161. #define VL53L1_NVM__EWS__SPAD_ENABLES_REF__LOC3_5_ 0x007D
  1162. /*!<
  1163. type: uint8_t \n
  1164. default: 0x00 \n
  1165. info: \n
  1166. - msb = 7
  1167. - lsb = 0
  1168. - i2c_size = 1
  1169. groups: \n
  1170. ['decoded_nvm_data']
  1171. fields: \n
  1172. - [7:0] = nvm__ews__spad_enables_ref__loc3_5_
  1173. */
  1174. #define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_0_ 0x0080
  1175. /*!<
  1176. type: uint8_t \n
  1177. default: 0x00 \n
  1178. info: \n
  1179. - msb = 7
  1180. - lsb = 0
  1181. - i2c_size = 1
  1182. groups: \n
  1183. ['decoded_nvm_data']
  1184. fields: \n
  1185. - [7:0] = nvm__fmt__spad_enables_rtn_0_
  1186. */
  1187. #define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_1_ 0x0081
  1188. /*!<
  1189. type: uint8_t \n
  1190. default: 0x00 \n
  1191. info: \n
  1192. - msb = 7
  1193. - lsb = 0
  1194. - i2c_size = 1
  1195. groups: \n
  1196. ['decoded_nvm_data']
  1197. fields: \n
  1198. - [7:0] = nvm__fmt__spad_enables_rtn_1_
  1199. */
  1200. #define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_2_ 0x0082
  1201. /*!<
  1202. type: uint8_t \n
  1203. default: 0x00 \n
  1204. info: \n
  1205. - msb = 7
  1206. - lsb = 0
  1207. - i2c_size = 1
  1208. groups: \n
  1209. ['decoded_nvm_data']
  1210. fields: \n
  1211. - [7:0] = nvm__fmt__spad_enables_rtn_2_
  1212. */
  1213. #define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_3_ 0x0083
  1214. /*!<
  1215. type: uint8_t \n
  1216. default: 0x00 \n
  1217. info: \n
  1218. - msb = 7
  1219. - lsb = 0
  1220. - i2c_size = 1
  1221. groups: \n
  1222. ['decoded_nvm_data']
  1223. fields: \n
  1224. - [7:0] = nvm__fmt__spad_enables_rtn_3_
  1225. */
  1226. #define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_4_ 0x0084
  1227. /*!<
  1228. type: uint8_t \n
  1229. default: 0x00 \n
  1230. info: \n
  1231. - msb = 7
  1232. - lsb = 0
  1233. - i2c_size = 1
  1234. groups: \n
  1235. ['decoded_nvm_data']
  1236. fields: \n
  1237. - [7:0] = nvm__fmt__spad_enables_rtn_4_
  1238. */
  1239. #define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_5_ 0x0085
  1240. /*!<
  1241. type: uint8_t \n
  1242. default: 0x00 \n
  1243. info: \n
  1244. - msb = 7
  1245. - lsb = 0
  1246. - i2c_size = 1
  1247. groups: \n
  1248. ['decoded_nvm_data']
  1249. fields: \n
  1250. - [7:0] = nvm__fmt__spad_enables_rtn_5_
  1251. */
  1252. #define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_6_ 0x0086
  1253. /*!<
  1254. type: uint8_t \n
  1255. default: 0x00 \n
  1256. info: \n
  1257. - msb = 7
  1258. - lsb = 0
  1259. - i2c_size = 1
  1260. groups: \n
  1261. ['decoded_nvm_data']
  1262. fields: \n
  1263. - [7:0] = nvm__fmt__spad_enables_rtn_6_
  1264. */
  1265. #define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_7_ 0x0087
  1266. /*!<
  1267. type: uint8_t \n
  1268. default: 0x00 \n
  1269. info: \n
  1270. - msb = 7
  1271. - lsb = 0
  1272. - i2c_size = 1
  1273. groups: \n
  1274. ['decoded_nvm_data']
  1275. fields: \n
  1276. - [7:0] = nvm__fmt__spad_enables_rtn_7_
  1277. */
  1278. #define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_8_ 0x0088
  1279. /*!<
  1280. type: uint8_t \n
  1281. default: 0x00 \n
  1282. info: \n
  1283. - msb = 7
  1284. - lsb = 0
  1285. - i2c_size = 1
  1286. groups: \n
  1287. ['decoded_nvm_data']
  1288. fields: \n
  1289. - [7:0] = nvm__fmt__spad_enables_rtn_8_
  1290. */
  1291. #define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_9_ 0x0089
  1292. /*!<
  1293. type: uint8_t \n
  1294. default: 0x00 \n
  1295. info: \n
  1296. - msb = 7
  1297. - lsb = 0
  1298. - i2c_size = 1
  1299. groups: \n
  1300. ['decoded_nvm_data']
  1301. fields: \n
  1302. - [7:0] = nvm__fmt__spad_enables_rtn_9_
  1303. */
  1304. #define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_10_ 0x008A
  1305. /*!<
  1306. type: uint8_t \n
  1307. default: 0x00 \n
  1308. info: \n
  1309. - msb = 7
  1310. - lsb = 0
  1311. - i2c_size = 1
  1312. groups: \n
  1313. ['decoded_nvm_data']
  1314. fields: \n
  1315. - [7:0] = nvm__fmt__spad_enables_rtn_10_
  1316. */
  1317. #define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_11_ 0x008B
  1318. /*!<
  1319. type: uint8_t \n
  1320. default: 0x00 \n
  1321. info: \n
  1322. - msb = 7
  1323. - lsb = 0
  1324. - i2c_size = 1
  1325. groups: \n
  1326. ['decoded_nvm_data']
  1327. fields: \n
  1328. - [7:0] = nvm__fmt__spad_enables_rtn_11_
  1329. */
  1330. #define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_12_ 0x008C
  1331. /*!<
  1332. type: uint8_t \n
  1333. default: 0x00 \n
  1334. info: \n
  1335. - msb = 7
  1336. - lsb = 0
  1337. - i2c_size = 1
  1338. groups: \n
  1339. ['decoded_nvm_data']
  1340. fields: \n
  1341. - [7:0] = nvm__fmt__spad_enables_rtn_12_
  1342. */
  1343. #define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_13_ 0x008D
  1344. /*!<
  1345. type: uint8_t \n
  1346. default: 0x00 \n
  1347. info: \n
  1348. - msb = 7
  1349. - lsb = 0
  1350. - i2c_size = 1
  1351. groups: \n
  1352. ['decoded_nvm_data']
  1353. fields: \n
  1354. - [7:0] = nvm__fmt__spad_enables_rtn_13_
  1355. */
  1356. #define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_14_ 0x008E
  1357. /*!<
  1358. type: uint8_t \n
  1359. default: 0x00 \n
  1360. info: \n
  1361. - msb = 7
  1362. - lsb = 0
  1363. - i2c_size = 1
  1364. groups: \n
  1365. ['decoded_nvm_data']
  1366. fields: \n
  1367. - [7:0] = nvm__fmt__spad_enables_rtn_14_
  1368. */
  1369. #define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_15_ 0x008F
  1370. /*!<
  1371. type: uint8_t \n
  1372. default: 0x00 \n
  1373. info: \n
  1374. - msb = 7
  1375. - lsb = 0
  1376. - i2c_size = 1
  1377. groups: \n
  1378. ['decoded_nvm_data']
  1379. fields: \n
  1380. - [7:0] = nvm__fmt__spad_enables_rtn_15_
  1381. */
  1382. #define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_16_ 0x0090
  1383. /*!<
  1384. type: uint8_t \n
  1385. default: 0x00 \n
  1386. info: \n
  1387. - msb = 7
  1388. - lsb = 0
  1389. - i2c_size = 1
  1390. groups: \n
  1391. ['decoded_nvm_data']
  1392. fields: \n
  1393. - [7:0] = nvm__fmt__spad_enables_rtn_16_
  1394. */
  1395. #define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_17_ 0x0091
  1396. /*!<
  1397. type: uint8_t \n
  1398. default: 0x00 \n
  1399. info: \n
  1400. - msb = 7
  1401. - lsb = 0
  1402. - i2c_size = 1
  1403. groups: \n
  1404. ['decoded_nvm_data']
  1405. fields: \n
  1406. - [7:0] = nvm__fmt__spad_enables_rtn_17_
  1407. */
  1408. #define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_18_ 0x0092
  1409. /*!<
  1410. type: uint8_t \n
  1411. default: 0x00 \n
  1412. info: \n
  1413. - msb = 7
  1414. - lsb = 0
  1415. - i2c_size = 1
  1416. groups: \n
  1417. ['decoded_nvm_data']
  1418. fields: \n
  1419. - [7:0] = nvm__fmt__spad_enables_rtn_18_
  1420. */
  1421. #define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_19_ 0x0093
  1422. /*!<
  1423. type: uint8_t \n
  1424. default: 0x00 \n
  1425. info: \n
  1426. - msb = 7
  1427. - lsb = 0
  1428. - i2c_size = 1
  1429. groups: \n
  1430. ['decoded_nvm_data']
  1431. fields: \n
  1432. - [7:0] = nvm__fmt__spad_enables_rtn_19_
  1433. */
  1434. #define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_20_ 0x0094
  1435. /*!<
  1436. type: uint8_t \n
  1437. default: 0x00 \n
  1438. info: \n
  1439. - msb = 7
  1440. - lsb = 0
  1441. - i2c_size = 1
  1442. groups: \n
  1443. ['decoded_nvm_data']
  1444. fields: \n
  1445. - [7:0] = nvm__fmt__spad_enables_rtn_20_
  1446. */
  1447. #define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_21_ 0x0095
  1448. /*!<
  1449. type: uint8_t \n
  1450. default: 0x00 \n
  1451. info: \n
  1452. - msb = 7
  1453. - lsb = 0
  1454. - i2c_size = 1
  1455. groups: \n
  1456. ['decoded_nvm_data']
  1457. fields: \n
  1458. - [7:0] = nvm__fmt__spad_enables_rtn_21_
  1459. */
  1460. #define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_22_ 0x0096
  1461. /*!<
  1462. type: uint8_t \n
  1463. default: 0x00 \n
  1464. info: \n
  1465. - msb = 7
  1466. - lsb = 0
  1467. - i2c_size = 1
  1468. groups: \n
  1469. ['decoded_nvm_data']
  1470. fields: \n
  1471. - [7:0] = nvm__fmt__spad_enables_rtn_22_
  1472. */
  1473. #define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_23_ 0x0097
  1474. /*!<
  1475. type: uint8_t \n
  1476. default: 0x00 \n
  1477. info: \n
  1478. - msb = 7
  1479. - lsb = 0
  1480. - i2c_size = 1
  1481. groups: \n
  1482. ['decoded_nvm_data']
  1483. fields: \n
  1484. - [7:0] = nvm__fmt__spad_enables_rtn_23_
  1485. */
  1486. #define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_24_ 0x0098
  1487. /*!<
  1488. type: uint8_t \n
  1489. default: 0x00 \n
  1490. info: \n
  1491. - msb = 7
  1492. - lsb = 0
  1493. - i2c_size = 1
  1494. groups: \n
  1495. ['decoded_nvm_data']
  1496. fields: \n
  1497. - [7:0] = nvm__fmt__spad_enables_rtn_24_
  1498. */
  1499. #define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_25_ 0x0099
  1500. /*!<
  1501. type: uint8_t \n
  1502. default: 0x00 \n
  1503. info: \n
  1504. - msb = 7
  1505. - lsb = 0
  1506. - i2c_size = 1
  1507. groups: \n
  1508. ['decoded_nvm_data']
  1509. fields: \n
  1510. - [7:0] = nvm__fmt__spad_enables_rtn_25_
  1511. */
  1512. #define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_26_ 0x009A
  1513. /*!<
  1514. type: uint8_t \n
  1515. default: 0x00 \n
  1516. info: \n
  1517. - msb = 7
  1518. - lsb = 0
  1519. - i2c_size = 1
  1520. groups: \n
  1521. ['decoded_nvm_data']
  1522. fields: \n
  1523. - [7:0] = nvm__fmt__spad_enables_rtn_26_
  1524. */
  1525. #define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_27_ 0x009B
  1526. /*!<
  1527. type: uint8_t \n
  1528. default: 0x00 \n
  1529. info: \n
  1530. - msb = 7
  1531. - lsb = 0
  1532. - i2c_size = 1
  1533. groups: \n
  1534. ['decoded_nvm_data']
  1535. fields: \n
  1536. - [7:0] = nvm__fmt__spad_enables_rtn_27_
  1537. */
  1538. #define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_28_ 0x009C
  1539. /*!<
  1540. type: uint8_t \n
  1541. default: 0x00 \n
  1542. info: \n
  1543. - msb = 7
  1544. - lsb = 0
  1545. - i2c_size = 1
  1546. groups: \n
  1547. ['decoded_nvm_data']
  1548. fields: \n
  1549. - [7:0] = nvm__fmt__spad_enables_rtn_28_
  1550. */
  1551. #define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_29_ 0x009D
  1552. /*!<
  1553. type: uint8_t \n
  1554. default: 0x00 \n
  1555. info: \n
  1556. - msb = 7
  1557. - lsb = 0
  1558. - i2c_size = 1
  1559. groups: \n
  1560. ['decoded_nvm_data']
  1561. fields: \n
  1562. - [7:0] = nvm__fmt__spad_enables_rtn_29_
  1563. */
  1564. #define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_30_ 0x009E
  1565. /*!<
  1566. type: uint8_t \n
  1567. default: 0x00 \n
  1568. info: \n
  1569. - msb = 7
  1570. - lsb = 0
  1571. - i2c_size = 1
  1572. groups: \n
  1573. ['decoded_nvm_data']
  1574. fields: \n
  1575. - [7:0] = nvm__fmt__spad_enables_rtn_30_
  1576. */
  1577. #define VL53L1_NVM__FMT__SPAD_ENABLES_RTN_31_ 0x009F
  1578. /*!<
  1579. type: uint8_t \n
  1580. default: 0x00 \n
  1581. info: \n
  1582. - msb = 7
  1583. - lsb = 0
  1584. - i2c_size = 1
  1585. groups: \n
  1586. ['decoded_nvm_data']
  1587. fields: \n
  1588. - [7:0] = nvm__fmt__spad_enables_rtn_31_
  1589. */
  1590. #define VL53L1_NVM__FMT__SPAD_ENABLES_REF__LOC1_0_ 0x00A0
  1591. /*!<
  1592. type: uint8_t \n
  1593. default: 0x00 \n
  1594. info: \n
  1595. - msb = 7
  1596. - lsb = 0
  1597. - i2c_size = 1
  1598. groups: \n
  1599. ['decoded_nvm_data']
  1600. fields: \n
  1601. - [7:0] = nvm__fmt__spad_enables_ref__loc1_0_
  1602. */
  1603. #define VL53L1_NVM__FMT__SPAD_ENABLES_REF__LOC1_1_ 0x00A1
  1604. /*!<
  1605. type: uint8_t \n
  1606. default: 0x00 \n
  1607. info: \n
  1608. - msb = 7
  1609. - lsb = 0
  1610. - i2c_size = 1
  1611. groups: \n
  1612. ['decoded_nvm_data']
  1613. fields: \n
  1614. - [7:0] = nvm__fmt__spad_enables_ref__loc1_1_
  1615. */
  1616. #define VL53L1_NVM__FMT__SPAD_ENABLES_REF__LOC1_2_ 0x00A2
  1617. /*!<
  1618. type: uint8_t \n
  1619. default: 0x00 \n
  1620. info: \n
  1621. - msb = 7
  1622. - lsb = 0
  1623. - i2c_size = 1
  1624. groups: \n
  1625. ['decoded_nvm_data']
  1626. fields: \n
  1627. - [7:0] = nvm__fmt__spad_enables_ref__loc1_2_
  1628. */
  1629. #define VL53L1_NVM__FMT__SPAD_ENABLES_REF__LOC1_3_ 0x00A3
  1630. /*!<
  1631. type: uint8_t \n
  1632. default: 0x00 \n
  1633. info: \n
  1634. - msb = 7
  1635. - lsb = 0
  1636. - i2c_size = 1
  1637. groups: \n
  1638. ['decoded_nvm_data']
  1639. fields: \n
  1640. - [7:0] = nvm__fmt__spad_enables_ref__loc1_3_
  1641. */
  1642. #define VL53L1_NVM__FMT__SPAD_ENABLES_REF__LOC1_4_ 0x00A4
  1643. /*!<
  1644. type: uint8_t \n
  1645. default: 0x00 \n
  1646. info: \n
  1647. - msb = 7
  1648. - lsb = 0
  1649. - i2c_size = 1
  1650. groups: \n
  1651. ['decoded_nvm_data']
  1652. fields: \n
  1653. - [7:0] = nvm__fmt__spad_enables_ref__loc1_4_
  1654. */
  1655. #define VL53L1_NVM__FMT__SPAD_ENABLES_REF__LOC1_5_ 0x00A5
  1656. /*!<
  1657. type: uint8_t \n
  1658. default: 0x00 \n
  1659. info: \n
  1660. - msb = 7
  1661. - lsb = 0
  1662. - i2c_size = 1
  1663. groups: \n
  1664. ['decoded_nvm_data']
  1665. fields: \n
  1666. - [7:0] = nvm__fmt__spad_enables_ref__loc1_5_
  1667. */
  1668. #define VL53L1_NVM__FMT__SPAD_ENABLES_REF__LOC2_0_ 0x00A8
  1669. /*!<
  1670. type: uint8_t \n
  1671. default: 0x00 \n
  1672. info: \n
  1673. - msb = 7
  1674. - lsb = 0
  1675. - i2c_size = 1
  1676. groups: \n
  1677. ['decoded_nvm_data']
  1678. fields: \n
  1679. - [7:0] = nvm__fmt__spad_enables_ref__loc2_0_
  1680. */
  1681. #define VL53L1_NVM__FMT__SPAD_ENABLES_REF__LOC2_1_ 0x00A9
  1682. /*!<
  1683. type: uint8_t \n
  1684. default: 0x00 \n
  1685. info: \n
  1686. - msb = 7
  1687. - lsb = 0
  1688. - i2c_size = 1
  1689. groups: \n
  1690. ['decoded_nvm_data']
  1691. fields: \n
  1692. - [7:0] = nvm__fmt__spad_enables_ref__loc2_1_
  1693. */
  1694. #define VL53L1_NVM__FMT__SPAD_ENABLES_REF__LOC2_2_ 0x00AA
  1695. /*!<
  1696. type: uint8_t \n
  1697. default: 0x00 \n
  1698. info: \n
  1699. - msb = 7
  1700. - lsb = 0
  1701. - i2c_size = 1
  1702. groups: \n
  1703. ['decoded_nvm_data']
  1704. fields: \n
  1705. - [7:0] = nvm__fmt__spad_enables_ref__loc2_2_
  1706. */
  1707. #define VL53L1_NVM__FMT__SPAD_ENABLES_REF__LOC2_3_ 0x00AB
  1708. /*!<
  1709. type: uint8_t \n
  1710. default: 0x00 \n
  1711. info: \n
  1712. - msb = 7
  1713. - lsb = 0
  1714. - i2c_size = 1
  1715. groups: \n
  1716. ['decoded_nvm_data']
  1717. fields: \n
  1718. - [7:0] = nvm__fmt__spad_enables_ref__loc2_3_
  1719. */
  1720. #define VL53L1_NVM__FMT__SPAD_ENABLES_REF__LOC2_4_ 0x00AC
  1721. /*!<
  1722. type: uint8_t \n
  1723. default: 0x00 \n
  1724. info: \n
  1725. - msb = 7
  1726. - lsb = 0
  1727. - i2c_size = 1
  1728. groups: \n
  1729. ['decoded_nvm_data']
  1730. fields: \n
  1731. - [7:0] = nvm__fmt__spad_enables_ref__loc2_4_
  1732. */
  1733. #define VL53L1_NVM__FMT__SPAD_ENABLES_REF__LOC2_5_ 0x00AD
  1734. /*!<
  1735. type: uint8_t \n
  1736. default: 0x00 \n
  1737. info: \n
  1738. - msb = 7
  1739. - lsb = 0
  1740. - i2c_size = 1
  1741. groups: \n
  1742. ['decoded_nvm_data']
  1743. fields: \n
  1744. - [7:0] = nvm__fmt__spad_enables_ref__loc2_5_
  1745. */
  1746. #define VL53L1_NVM__FMT__SPAD_ENABLES_REF__LOC3_0_ 0x00B0
  1747. /*!<
  1748. type: uint8_t \n
  1749. default: 0x00 \n
  1750. info: \n
  1751. - msb = 7
  1752. - lsb = 0
  1753. - i2c_size = 1
  1754. groups: \n
  1755. ['decoded_nvm_data']
  1756. fields: \n
  1757. - [7:0] = nvm__fmt__spad_enables_ref__loc3_0_
  1758. */
  1759. #define VL53L1_NVM__FMT__SPAD_ENABLES_REF__LOC3_1_ 0x00B1
  1760. /*!<
  1761. type: uint8_t \n
  1762. default: 0x00 \n
  1763. info: \n
  1764. - msb = 7
  1765. - lsb = 0
  1766. - i2c_size = 1
  1767. groups: \n
  1768. ['decoded_nvm_data']
  1769. fields: \n
  1770. - [7:0] = nvm__fmt__spad_enables_ref__loc3_1_
  1771. */
  1772. #define VL53L1_NVM__FMT__SPAD_ENABLES_REF__LOC3_2_ 0x00B2
  1773. /*!<
  1774. type: uint8_t \n
  1775. default: 0x00 \n
  1776. info: \n
  1777. - msb = 7
  1778. - lsb = 0
  1779. - i2c_size = 1
  1780. groups: \n
  1781. ['decoded_nvm_data']
  1782. fields: \n
  1783. - [7:0] = nvm__fmt__spad_enables_ref__loc3_2_
  1784. */
  1785. #define VL53L1_NVM__FMT__SPAD_ENABLES_REF__LOC3_3_ 0x00B3
  1786. /*!<
  1787. type: uint8_t \n
  1788. default: 0x00 \n
  1789. info: \n
  1790. - msb = 7
  1791. - lsb = 0
  1792. - i2c_size = 1
  1793. groups: \n
  1794. ['decoded_nvm_data']
  1795. fields: \n
  1796. - [7:0] = nvm__fmt__spad_enables_ref__loc3_3_
  1797. */
  1798. #define VL53L1_NVM__FMT__SPAD_ENABLES_REF__LOC3_4_ 0x00B4
  1799. /*!<
  1800. type: uint8_t \n
  1801. default: 0x00 \n
  1802. info: \n
  1803. - msb = 7
  1804. - lsb = 0
  1805. - i2c_size = 1
  1806. groups: \n
  1807. ['decoded_nvm_data']
  1808. fields: \n
  1809. - [7:0] = nvm__fmt__spad_enables_ref__loc3_4_
  1810. */
  1811. #define VL53L1_NVM__FMT__SPAD_ENABLES_REF__LOC3_5_ 0x00B5
  1812. /*!<
  1813. type: uint8_t \n
  1814. default: 0x00 \n
  1815. info: \n
  1816. - msb = 7
  1817. - lsb = 0
  1818. - i2c_size = 1
  1819. groups: \n
  1820. ['decoded_nvm_data']
  1821. fields: \n
  1822. - [7:0] = nvm__fmt__spad_enables_ref__loc3_5_
  1823. */
  1824. #define VL53L1_NVM__FMT__ROI_CONFIG__MODE_ROI_CENTRE_SPAD 0x00B8
  1825. /*!<
  1826. type: uint8_t \n
  1827. default: 0x00 \n
  1828. info: \n
  1829. - msb = 7
  1830. - lsb = 0
  1831. - i2c_size = 1
  1832. groups: \n
  1833. ['decoded_nvm_data']
  1834. fields: \n
  1835. - [7:0] = nvm__fmt__roi_config__mode_roi_centre_spad
  1836. */
  1837. #define VL53L1_NVM__FMT__ROI_CONFIG__MODE_ROI_XY_SIZE 0x00B9
  1838. /*!<
  1839. type: uint8_t \n
  1840. default: 0x00 \n
  1841. info: \n
  1842. - msb = 7
  1843. - lsb = 0
  1844. - i2c_size = 1
  1845. groups: \n
  1846. ['decoded_nvm_data']
  1847. fields: \n
  1848. - [7:4] = nvm__fmt__roi_config__mode_roi_x_size
  1849. - [3:0] = nvm__fmt__roi_config__mode_roi_y_size
  1850. */
  1851. #define VL53L1_NVM__FMT__REF_SPAD_APPLY__NUM_REQUESTED_REF_SPAD 0x00BC
  1852. /*!<
  1853. type: uint8_t \n
  1854. default: 0x00 \n
  1855. info: \n
  1856. - msb = 7
  1857. - lsb = 0
  1858. - i2c_size = 1
  1859. groups: \n
  1860. ['decoded_nvm_data']
  1861. fields: \n
  1862. - [7:0] = nvm__fmt__ref_spad_apply__num_requested_ref_spad
  1863. */
  1864. #define VL53L1_NVM__FMT__REF_SPAD_MAN__REF_LOCATION 0x00BD
  1865. /*!<
  1866. type: uint8_t \n
  1867. default: 0x00 \n
  1868. info: \n
  1869. - msb = 1
  1870. - lsb = 0
  1871. - i2c_size = 1
  1872. groups: \n
  1873. ['decoded_nvm_data']
  1874. fields: \n
  1875. - [1:0] = nvm__fmt__ref_spad_man__ref_location
  1876. */
  1877. #define VL53L1_NVM__FMT__MM_CONFIG__INNER_OFFSET_MM 0x00C0
  1878. /*!<
  1879. type: uint16_t \n
  1880. default: 0x0000 \n
  1881. info: \n
  1882. - msb = 15
  1883. - lsb = 0
  1884. - i2c_size = 2
  1885. groups: \n
  1886. ['decoded_nvm_data']
  1887. fields: \n
  1888. - [15:0] = nvm__fmt__mm_config__inner_offset_mm
  1889. */
  1890. #define VL53L1_NVM__FMT__MM_CONFIG__OUTER_OFFSET_MM 0x00C2
  1891. /*!<
  1892. type: uint16_t \n
  1893. default: 0x0000 \n
  1894. info: \n
  1895. - msb = 15
  1896. - lsb = 0
  1897. - i2c_size = 2
  1898. groups: \n
  1899. ['decoded_nvm_data']
  1900. fields: \n
  1901. - [15:0] = nvm__fmt__mm_config__outer_offset_mm
  1902. */
  1903. #define VL53L1_NVM__FMT__ALGO__PART_TO_PART_RANGE_OFFSET_MM 0x00C4
  1904. /*!<
  1905. type: uint16_t \n
  1906. default: 0x0000 \n
  1907. info: \n
  1908. - msb = 11
  1909. - lsb = 0
  1910. - i2c_size = 2
  1911. groups: \n
  1912. ['decoded_nvm_data']
  1913. fields: \n
  1914. - [11:0] = nvm__fmt__algo_part_to_part_range_offset_mm (fixed point 10.2)
  1915. */
  1916. #define VL53L1_NVM__FMT__ALGO__CROSSTALK_COMPENSATION_PLANE_OFFSET_KCPS 0x00C8
  1917. /*!<
  1918. type: uint16_t \n
  1919. default: 0x0000 \n
  1920. info: \n
  1921. - msb = 15
  1922. - lsb = 0
  1923. - i2c_size = 2
  1924. groups: \n
  1925. ['decoded_nvm_data']
  1926. fields: \n
  1927. - [15:0] = nvm__fmt__algo__crosstalk_compensation_plane_offset_kcps (fixed point 7.9)
  1928. */
  1929. #define VL53L1_NVM__FMT__ALGO__CROSSTALK_COMPENSATION_X_PLANE_GRADIENT_KCPS 0x00CA
  1930. /*!<
  1931. type: uint16_t \n
  1932. default: 0x0000 \n
  1933. info: \n
  1934. - msb = 15
  1935. - lsb = 0
  1936. - i2c_size = 2
  1937. groups: \n
  1938. ['decoded_nvm_data']
  1939. fields: \n
  1940. - [15:0] = nvm__fmt__algo__crosstalk_compensation_x_plane_gradient_kcps (fixed point 5.11)
  1941. */
  1942. #define VL53L1_NVM__FMT__ALGO__CROSSTALK_COMPENSATION_Y_PLANE_GRADIENT_KCPS 0x00CC
  1943. /*!<
  1944. type: uint16_t \n
  1945. default: 0x0000 \n
  1946. info: \n
  1947. - msb = 15
  1948. - lsb = 0
  1949. - i2c_size = 2
  1950. groups: \n
  1951. ['decoded_nvm_data']
  1952. fields: \n
  1953. - [15:0] = nvm__fmt__algo__crosstalk_compensation_y_plane_gradient_kcps (fixed point 5.11)
  1954. */
  1955. #define VL53L1_NVM__FMT__SPARE_HOST_CONFIG__NVM_CONFIG_SPARE_0 0x00CE
  1956. /*!<
  1957. type: uint8_t \n
  1958. default: 0x00 \n
  1959. info: \n
  1960. - msb = 7
  1961. - lsb = 0
  1962. - i2c_size = 1
  1963. groups: \n
  1964. ['decoded_nvm_data']
  1965. fields: \n
  1966. - [7:0] = nvm__fmt__spare__host_config__nvm_config_spare_0
  1967. */
  1968. #define VL53L1_NVM__FMT__SPARE_HOST_CONFIG__NVM_CONFIG_SPARE_1 0x00CF
  1969. /*!<
  1970. type: uint8_t \n
  1971. default: 0x00 \n
  1972. info: \n
  1973. - msb = 7
  1974. - lsb = 0
  1975. - i2c_size = 1
  1976. groups: \n
  1977. ['decoded_nvm_data']
  1978. fields: \n
  1979. - [7:0] = nvm__fmt__spare__host_config__nvm_config_spare_1
  1980. */
  1981. #define VL53L1_NVM__CUSTOMER_NVM_SPACE_PROGRAMMED 0x00E0
  1982. /*!<
  1983. type: uint8_t \n
  1984. default: 0x00 \n
  1985. info: \n
  1986. - msb = 7
  1987. - lsb = 0
  1988. - i2c_size = 1
  1989. groups: \n
  1990. ['decoded_nvm_data']
  1991. fields: \n
  1992. - [7:0] = nvm__customer_space_programmed
  1993. */
  1994. #define VL53L1_NVM__CUST__I2C_SLAVE__DEVICE_ADDRESS 0x00E4
  1995. /*!<
  1996. type: uint8_t \n
  1997. default: 0x00 \n
  1998. info: \n
  1999. - msb = 7
  2000. - lsb = 0
  2001. - i2c_size = 1
  2002. groups: \n
  2003. ['decoded_nvm_data']
  2004. fields: \n
  2005. - [7:0] = nvm__cust__i2c_device_address
  2006. */
  2007. #define VL53L1_NVM__CUST__REF_SPAD_APPLY__NUM_REQUESTED_REF_SPAD 0x00E8
  2008. /*!<
  2009. type: uint8_t \n
  2010. default: 0x00 \n
  2011. info: \n
  2012. - msb = 7
  2013. - lsb = 0
  2014. - i2c_size = 1
  2015. groups: \n
  2016. ['decoded_nvm_data']
  2017. fields: \n
  2018. - [7:0] = nvm__cust__ref_spad_apply__num_requested_ref_spad
  2019. */
  2020. #define VL53L1_NVM__CUST__REF_SPAD_MAN__REF_LOCATION 0x00E9
  2021. /*!<
  2022. type: uint8_t \n
  2023. default: 0x00 \n
  2024. info: \n
  2025. - msb = 1
  2026. - lsb = 0
  2027. - i2c_size = 1
  2028. groups: \n
  2029. ['decoded_nvm_data']
  2030. fields: \n
  2031. - [1:0] = nvm__cust__ref_spad_man__ref_location
  2032. */
  2033. #define VL53L1_NVM__CUST__MM_CONFIG__INNER_OFFSET_MM 0x00EC
  2034. /*!<
  2035. type: uint16_t \n
  2036. default: 0x0000 \n
  2037. info: \n
  2038. - msb = 15
  2039. - lsb = 0
  2040. - i2c_size = 2
  2041. groups: \n
  2042. ['decoded_nvm_data']
  2043. fields: \n
  2044. - [15:0] = nvm__cust__mm_config__inner_offset_mm
  2045. */
  2046. #define VL53L1_NVM__CUST__MM_CONFIG__OUTER_OFFSET_MM 0x00EE
  2047. /*!<
  2048. type: uint16_t \n
  2049. default: 0x0000 \n
  2050. info: \n
  2051. - msb = 15
  2052. - lsb = 0
  2053. - i2c_size = 2
  2054. groups: \n
  2055. ['decoded_nvm_data']
  2056. fields: \n
  2057. - [15:0] = nvm__cust__mm_config__outer_offset_mm
  2058. */
  2059. #define VL53L1_NVM__CUST__ALGO__PART_TO_PART_RANGE_OFFSET_MM 0x00F0
  2060. /*!<
  2061. type: uint16_t \n
  2062. default: 0x0000 \n
  2063. info: \n
  2064. - msb = 11
  2065. - lsb = 0
  2066. - i2c_size = 2
  2067. groups: \n
  2068. ['decoded_nvm_data']
  2069. fields: \n
  2070. - [11:0] = nvm__cust__algo_part_to_part_range_offset_mm (fixed point 10.2)
  2071. */
  2072. #define VL53L1_NVM__CUST__ALGO__CROSSTALK_COMPENSATION_PLANE_OFFSET_KCPS 0x00F4
  2073. /*!<
  2074. type: uint16_t \n
  2075. default: 0x0000 \n
  2076. info: \n
  2077. - msb = 15
  2078. - lsb = 0
  2079. - i2c_size = 2
  2080. groups: \n
  2081. ['decoded_nvm_data']
  2082. fields: \n
  2083. - [15:0] = nvm__cust__algo__crosstalk_compensation_plane_offset_kcps (fixed point 7.9)
  2084. */
  2085. #define VL53L1_NVM__CUST__ALGO__CROSSTALK_COMPENSATION_X_PLANE_GRADIENT_KCPS 0x00F6
  2086. /*!<
  2087. type: uint16_t \n
  2088. default: 0x0000 \n
  2089. info: \n
  2090. - msb = 15
  2091. - lsb = 0
  2092. - i2c_size = 2
  2093. groups: \n
  2094. ['decoded_nvm_data']
  2095. fields: \n
  2096. - [15:0] = nvm__cust__algo__crosstalk_compensation_x_plane_gradient_kcps (fixed point 5.11)
  2097. */
  2098. #define VL53L1_NVM__CUST__ALGO__CROSSTALK_COMPENSATION_Y_PLANE_GRADIENT_KCPS 0x00F8
  2099. /*!<
  2100. type: uint16_t \n
  2101. default: 0x0000 \n
  2102. info: \n
  2103. - msb = 15
  2104. - lsb = 0
  2105. - i2c_size = 2
  2106. groups: \n
  2107. ['decoded_nvm_data']
  2108. fields: \n
  2109. - [15:0] = nvm__cust__algo__crosstalk_compensation_y_plane_gradient_kcps (fixed point 5.11)
  2110. */
  2111. #define VL53L1_NVM__CUST__SPARE_HOST_CONFIG__NVM_CONFIG_SPARE_0 0x00FA
  2112. /*!<
  2113. type: uint8_t \n
  2114. default: 0x00 \n
  2115. info: \n
  2116. - msb = 7
  2117. - lsb = 0
  2118. - i2c_size = 1
  2119. groups: \n
  2120. ['decoded_nvm_data']
  2121. fields: \n
  2122. - [7:0] = nvm__cust__spare__host_config__nvm_config_spare_0
  2123. */
  2124. #define VL53L1_NVM__CUST__SPARE_HOST_CONFIG__NVM_CONFIG_SPARE_1 0x00FB
  2125. /*!<
  2126. type: uint8_t \n
  2127. default: 0x00 \n
  2128. info: \n
  2129. - msb = 7
  2130. - lsb = 0
  2131. - i2c_size = 1
  2132. groups: \n
  2133. ['decoded_nvm_data']
  2134. fields: \n
  2135. - [7:0] = nvm__cust__spare__host_config__nvm_config_spare_1
  2136. */
  2137. #define VL53L1_NVM__FMT__FGC__BYTE_0 0x01DC
  2138. /*!<
  2139. type: char \n
  2140. default: 0x00 \n
  2141. info: \n
  2142. - msb = 7
  2143. - lsb = 1
  2144. - i2c_size = 1
  2145. groups: \n
  2146. ['decoded_nvm_data']
  2147. fields: \n
  2148. - [7:1] = nvm__fmt__fgc_0_
  2149. */
  2150. #define VL53L1_NVM__FMT__FGC__BYTE_1 0x01DD
  2151. /*!<
  2152. type: char \n
  2153. default: 0x0000 \n
  2154. info: \n
  2155. - msb = 8
  2156. - lsb = 2
  2157. - i2c_size = 2
  2158. groups: \n
  2159. ['decoded_nvm_data']
  2160. fields: \n
  2161. - [8:2] = nvm__fmt__fgc_1_
  2162. */
  2163. #define VL53L1_NVM__FMT__FGC__BYTE_2 0x01DE
  2164. /*!<
  2165. type: char \n
  2166. default: 0x0000 \n
  2167. info: \n
  2168. - msb = 9
  2169. - lsb = 3
  2170. - i2c_size = 2
  2171. groups: \n
  2172. ['decoded_nvm_data']
  2173. fields: \n
  2174. - [9:3] = nvm__fmt__fgc_2_
  2175. */
  2176. #define VL53L1_NVM__FMT__FGC__BYTE_3 0x01DF
  2177. /*!<
  2178. type: char \n
  2179. default: 0x0000 \n
  2180. info: \n
  2181. - msb = 10
  2182. - lsb = 4
  2183. - i2c_size = 2
  2184. groups: \n
  2185. ['decoded_nvm_data']
  2186. fields: \n
  2187. - [10:4] = nvm__fmt__fgc_3_
  2188. */
  2189. #define VL53L1_NVM__FMT__FGC__BYTE_4 0x01E0
  2190. /*!<
  2191. type: char \n
  2192. default: 0x0000 \n
  2193. info: \n
  2194. - msb = 11
  2195. - lsb = 5
  2196. - i2c_size = 2
  2197. groups: \n
  2198. ['decoded_nvm_data']
  2199. fields: \n
  2200. - [11:5] = nvm__fmt__fgc_4_
  2201. */
  2202. #define VL53L1_NVM__FMT__FGC__BYTE_5 0x01E1
  2203. /*!<
  2204. type: char \n
  2205. default: 0x0000 \n
  2206. info: \n
  2207. - msb = 12
  2208. - lsb = 6
  2209. - i2c_size = 2
  2210. groups: \n
  2211. ['decoded_nvm_data']
  2212. fields: \n
  2213. - [12:6] = nvm__fmt__fgc_5_
  2214. */
  2215. #define VL53L1_NVM__FMT__FGC__BYTE_6 0x01E2
  2216. /*!<
  2217. type: char \n
  2218. default: 0x0000 \n
  2219. info: \n
  2220. - msb = 13
  2221. - lsb = 0
  2222. - i2c_size = 2
  2223. groups: \n
  2224. ['decoded_nvm_data']
  2225. fields: \n
  2226. - [13:7] = nvm__fmt__fgc_6_
  2227. - [6:0] = nvm__fmt__fgc_7_
  2228. */
  2229. #define VL53L1_NVM__FMT__FGC__BYTE_7 0x01E3
  2230. /*!<
  2231. type: char \n
  2232. default: 0x00 \n
  2233. info: \n
  2234. - msb = 7
  2235. - lsb = 1
  2236. - i2c_size = 1
  2237. groups: \n
  2238. ['decoded_nvm_data']
  2239. fields: \n
  2240. - [7:1] = nvm__fmt__fgc_8_
  2241. */
  2242. #define VL53L1_NVM__FMT__FGC__BYTE_8 0x01E4
  2243. /*!<
  2244. type: char \n
  2245. default: 0x0000 \n
  2246. info: \n
  2247. - msb = 8
  2248. - lsb = 2
  2249. - i2c_size = 2
  2250. groups: \n
  2251. ['decoded_nvm_data']
  2252. fields: \n
  2253. - [8:2] = nvm__fmt__fgc_9_
  2254. */
  2255. #define VL53L1_NVM__FMT__FGC__BYTE_9 0x01E5
  2256. /*!<
  2257. type: char \n
  2258. default: 0x0000 \n
  2259. info: \n
  2260. - msb = 9
  2261. - lsb = 3
  2262. - i2c_size = 2
  2263. groups: \n
  2264. ['decoded_nvm_data']
  2265. fields: \n
  2266. - [9:3] = nvm__fmt__fgc_10_
  2267. */
  2268. #define VL53L1_NVM__FMT__FGC__BYTE_10 0x01E6
  2269. /*!<
  2270. type: char \n
  2271. default: 0x0000 \n
  2272. info: \n
  2273. - msb = 10
  2274. - lsb = 4
  2275. - i2c_size = 2
  2276. groups: \n
  2277. ['decoded_nvm_data']
  2278. fields: \n
  2279. - [10:4] = nvm__fmt__fgc_11_
  2280. */
  2281. #define VL53L1_NVM__FMT__FGC__BYTE_11 0x01E7
  2282. /*!<
  2283. type: char \n
  2284. default: 0x0000 \n
  2285. info: \n
  2286. - msb = 11
  2287. - lsb = 5
  2288. - i2c_size = 2
  2289. groups: \n
  2290. ['decoded_nvm_data']
  2291. fields: \n
  2292. - [11:5] = nvm__fmt__fgc_12_
  2293. */
  2294. #define VL53L1_NVM__FMT__FGC__BYTE_12 0x01E8
  2295. /*!<
  2296. type: char \n
  2297. default: 0x0000 \n
  2298. info: \n
  2299. - msb = 12
  2300. - lsb = 6
  2301. - i2c_size = 2
  2302. groups: \n
  2303. ['decoded_nvm_data']
  2304. fields: \n
  2305. - [12:6] = nvm__fmt__fgc_13_
  2306. */
  2307. #define VL53L1_NVM__FMT__FGC__BYTE_13 0x01E9
  2308. /*!<
  2309. type: char \n
  2310. default: 0x0000 \n
  2311. info: \n
  2312. - msb = 13
  2313. - lsb = 0
  2314. - i2c_size = 2
  2315. groups: \n
  2316. ['decoded_nvm_data']
  2317. fields: \n
  2318. - [13:7] = nvm__fmt__fgc_14_
  2319. - [6:0] = nvm__fmt__fgc_15_
  2320. */
  2321. #define VL53L1_NVM__FMT__FGC__BYTE_14 0x01EA
  2322. /*!<
  2323. type: char \n
  2324. default: 0x00 \n
  2325. info: \n
  2326. - msb = 7
  2327. - lsb = 1
  2328. - i2c_size = 1
  2329. groups: \n
  2330. ['decoded_nvm_data']
  2331. fields: \n
  2332. - [7:1] = nvm__fmt__fgc_16_
  2333. */
  2334. #define VL53L1_NVM__FMT__FGC__BYTE_15 0x01EB
  2335. /*!<
  2336. type: char \n
  2337. default: 0x0000 \n
  2338. info: \n
  2339. - msb = 8
  2340. - lsb = 2
  2341. - i2c_size = 2
  2342. groups: \n
  2343. ['decoded_nvm_data']
  2344. fields: \n
  2345. - [8:2] = nvm__fmt__fgc_17_
  2346. */
  2347. #define VL53L1_NVM__FMT__TEST_PROGRAM_MAJOR_MINOR 0x01EC
  2348. /*!<
  2349. type: uint8_t \n
  2350. default: 0x00 \n
  2351. info: \n
  2352. - msb = 7
  2353. - lsb = 0
  2354. - i2c_size = 1
  2355. groups: \n
  2356. ['decoded_nvm_data']
  2357. fields: \n
  2358. - [7:5] = nvm__fmt__test_program_major
  2359. - [4:0] = nvm__fmt__test_program_minor
  2360. */
  2361. #define VL53L1_NVM__FMT__MAP_MAJOR_MINOR 0x01ED
  2362. /*!<
  2363. type: uint8_t \n
  2364. default: 0x00 \n
  2365. info: \n
  2366. - msb = 7
  2367. - lsb = 0
  2368. - i2c_size = 1
  2369. groups: \n
  2370. ['decoded_nvm_data']
  2371. fields: \n
  2372. - [7:5] = nvm__fmt__map_major
  2373. - [4:0] = nvm__fmt__map_minor
  2374. */
  2375. #define VL53L1_NVM__FMT__YEAR_MONTH 0x01EE
  2376. /*!<
  2377. type: uint8_t \n
  2378. default: 0x00 \n
  2379. info: \n
  2380. - msb = 7
  2381. - lsb = 0
  2382. - i2c_size = 1
  2383. groups: \n
  2384. ['decoded_nvm_data']
  2385. fields: \n
  2386. - [7:4] = nvm__fmt__year
  2387. - [3:0] = nvm__fmt__month
  2388. */
  2389. #define VL53L1_NVM__FMT__DAY_MODULE_DATE_PHASE 0x01EF
  2390. /*!<
  2391. type: uint8_t \n
  2392. default: 0x00 \n
  2393. info: \n
  2394. - msb = 7
  2395. - lsb = 0
  2396. - i2c_size = 1
  2397. groups: \n
  2398. ['decoded_nvm_data']
  2399. fields: \n
  2400. - [7:3] = nvm__fmt__day
  2401. - [2:0] = nvm__fmt__module_date_phase
  2402. */
  2403. #define VL53L1_NVM__FMT__TIME 0x01F0
  2404. /*!<
  2405. type: uint16_t \n
  2406. default: 0x0000 \n
  2407. info: \n
  2408. - msb = 15
  2409. - lsb = 0
  2410. - i2c_size = 2
  2411. groups: \n
  2412. ['decoded_nvm_data']
  2413. fields: \n
  2414. - [15:0] = nvm__fmt__time
  2415. */
  2416. #define VL53L1_NVM__FMT__TESTER_ID 0x01F2
  2417. /*!<
  2418. type: uint8_t \n
  2419. default: 0x00 \n
  2420. info: \n
  2421. - msb = 7
  2422. - lsb = 0
  2423. - i2c_size = 1
  2424. groups: \n
  2425. ['decoded_nvm_data']
  2426. fields: \n
  2427. - [7:0] = nvm__fmt__tester_id
  2428. */
  2429. #define VL53L1_NVM__FMT__SITE_ID 0x01F3
  2430. /*!<
  2431. type: uint8_t \n
  2432. default: 0x00 \n
  2433. info: \n
  2434. - msb = 7
  2435. - lsb = 0
  2436. - i2c_size = 1
  2437. groups: \n
  2438. ['decoded_nvm_data']
  2439. fields: \n
  2440. - [7:0] = nvm__fmt__site_id
  2441. */
  2442. #define VL53L1_NVM__EWS__TEST_PROGRAM_MAJOR_MINOR 0x01F4
  2443. /*!<
  2444. type: uint8_t \n
  2445. default: 0x00 \n
  2446. info: \n
  2447. - msb = 7
  2448. - lsb = 0
  2449. - i2c_size = 1
  2450. groups: \n
  2451. ['decoded_nvm_data']
  2452. fields: \n
  2453. - [7:5] = nvm__ews__test_program_major
  2454. - [4:0] = nvm__ews__test_program_minor
  2455. */
  2456. #define VL53L1_NVM__EWS__PROBE_CARD_MAJOR_MINOR 0x01F5
  2457. /*!<
  2458. type: uint8_t \n
  2459. default: 0x00 \n
  2460. info: \n
  2461. - msb = 7
  2462. - lsb = 0
  2463. - i2c_size = 1
  2464. groups: \n
  2465. ['decoded_nvm_data']
  2466. fields: \n
  2467. - [7:4] = nvm__ews__probe_card_major
  2468. - [3:0] = nvm__ews__probe_card_minor
  2469. */
  2470. #define VL53L1_NVM__EWS__TESTER_ID 0x01F6
  2471. /*!<
  2472. type: uint8_t \n
  2473. default: 0x00 \n
  2474. info: \n
  2475. - msb = 7
  2476. - lsb = 0
  2477. - i2c_size = 1
  2478. groups: \n
  2479. ['decoded_nvm_data']
  2480. fields: \n
  2481. - [7:0] = nvm__ews__tester_id
  2482. */
  2483. #define VL53L1_NVM__EWS__LOT__BYTE_0 0x01F8
  2484. /*!<
  2485. type: char \n
  2486. default: 0x00 \n
  2487. info: \n
  2488. - msb = 7
  2489. - lsb = 2
  2490. - i2c_size = 1
  2491. groups: \n
  2492. ['decoded_nvm_data']
  2493. fields: \n
  2494. - [7:2] = nvm__ews__lot_6_
  2495. */
  2496. #define VL53L1_NVM__EWS__LOT__BYTE_1 0x01F9
  2497. /*!<
  2498. type: char \n
  2499. default: 0x0000 \n
  2500. info: \n
  2501. - msb = 9
  2502. - lsb = 4
  2503. - i2c_size = 2
  2504. groups: \n
  2505. ['decoded_nvm_data']
  2506. fields: \n
  2507. - [9:4] = nvm__ews__lot_5_
  2508. */
  2509. #define VL53L1_NVM__EWS__LOT__BYTE_2 0x01FA
  2510. /*!<
  2511. type: char \n
  2512. default: 0x0000 \n
  2513. info: \n
  2514. - msb = 11
  2515. - lsb = 0
  2516. - i2c_size = 2
  2517. groups: \n
  2518. ['decoded_nvm_data']
  2519. fields: \n
  2520. - [11:6] = nvm__ews__lot_4_
  2521. - [5:0] = nvm__ews__lot_3_
  2522. */
  2523. #define VL53L1_NVM__EWS__LOT__BYTE_3 0x01FB
  2524. /*!<
  2525. type: char \n
  2526. default: 0x00 \n
  2527. info: \n
  2528. - msb = 7
  2529. - lsb = 2
  2530. - i2c_size = 1
  2531. groups: \n
  2532. ['decoded_nvm_data']
  2533. fields: \n
  2534. - [7:2] = nvm__ews__lot_2_
  2535. */
  2536. #define VL53L1_NVM__EWS__LOT__BYTE_4 0x01FC
  2537. /*!<
  2538. type: char \n
  2539. default: 0x0000 \n
  2540. info: \n
  2541. - msb = 9
  2542. - lsb = 4
  2543. - i2c_size = 2
  2544. groups: \n
  2545. ['decoded_nvm_data']
  2546. fields: \n
  2547. - [9:4] = nvm__ews__lot_1_
  2548. */
  2549. #define VL53L1_NVM__EWS__LOT__BYTE_5 0x01FD
  2550. /*!<
  2551. type: char \n
  2552. default: 0x0000 \n
  2553. info: \n
  2554. - msb = 11
  2555. - lsb = 6
  2556. - i2c_size = 2
  2557. groups: \n
  2558. ['decoded_nvm_data']
  2559. fields: \n
  2560. - [11:6] = nvm__ews__lot_0_
  2561. */
  2562. #define VL53L1_NVM__EWS__WAFER 0x01FD
  2563. /*!<
  2564. type: uint8_t \n
  2565. default: 0x00 \n
  2566. info: \n
  2567. - msb = 4
  2568. - lsb = 0
  2569. - i2c_size = 1
  2570. groups: \n
  2571. ['decoded_nvm_data']
  2572. fields: \n
  2573. - [4:0] = nvm__ews__wafer
  2574. */
  2575. #define VL53L1_NVM__EWS__XCOORD 0x01FE
  2576. /*!<
  2577. type: uint8_t \n
  2578. default: 0x00 \n
  2579. info: \n
  2580. - msb = 7
  2581. - lsb = 0
  2582. - i2c_size = 1
  2583. groups: \n
  2584. ['decoded_nvm_data']
  2585. fields: \n
  2586. - [7:0] = nvm__ews__xcoord
  2587. */
  2588. #define VL53L1_NVM__EWS__YCOORD 0x01FF
  2589. /*!<
  2590. type: uint8_t \n
  2591. default: 0x00 \n
  2592. info: \n
  2593. - msb = 7
  2594. - lsb = 0
  2595. - i2c_size = 1
  2596. groups: \n
  2597. ['decoded_nvm_data']
  2598. fields: \n
  2599. - [7:0] = nvm__ews__ycoord
  2600. */
  2601. #define VL53L1_NVM__FMT__OPTICAL_CENTRE_DATA_INDEX 0x00B8
  2602. #define VL53L1_NVM__FMT__OPTICAL_CENTRE_DATA_SIZE 4
  2603. #define VL53L1_NVM__FMT__CAL_PEAK_RATE_MAP_DATA_INDEX 0x015C
  2604. #define VL53L1_NVM__FMT__CAL_PEAK_RATE_MAP_DATA_SIZE 56
  2605. #define VL53L1_NVM__FMT__ADDITIONAL_OFFSET_CAL_DATA_INDEX 0x0194
  2606. #define VL53L1_NVM__FMT__ADDITIONAL_OFFSET_CAL_DATA_SIZE 8
  2607. #define VL53L1_NVM__FMT__RANGE_RESULTS__140MM_MM_PRE_RANGE 0x019C
  2608. #define VL53L1_NVM__FMT__RANGE_RESULTS__140MM_DARK 0x01AC
  2609. #define VL53L1_NVM__FMT__RANGE_RESULTS__400MM_DARK 0x01BC
  2610. #define VL53L1_NVM__FMT__RANGE_RESULTS__400MM_AMBIENT 0x01CC
  2611. #define VL53L1_NVM__FMT__RANGE_RESULTS__SIZE_BYTES 16
  2612. /** @} VL53L1_nvm_DefineRegisters_group */
  2613. #ifdef __cplusplus
  2614. }
  2615. #endif
  2616. #endif